Compare commits
79
Commits
stable-5.0
...
v2.6.1
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+1
-1
@@ -270,7 +270,7 @@ f_sample *mixeng_clip[2][2][2][3] = {
|
||||
* August 21, 1998
|
||||
* Copyright 1998 Fabrice Bellard.
|
||||
*
|
||||
* [Rewrote completly the code of Lance Norskog And Sundry
|
||||
* [Rewrote completely the code of Lance Norskog And Sundry
|
||||
* Contributors with a more efficient algorithm.]
|
||||
*
|
||||
* This source code is freely redistributable and may be used for
|
||||
|
||||
+1
-1
@@ -898,7 +898,7 @@ static struct audio_option oss_options[] = {
|
||||
.name = "EXCLUSIVE",
|
||||
.tag = AUD_OPT_BOOL,
|
||||
.valp = &glob_conf.exclusive,
|
||||
.descr = "Open device in exclusive mode (vmix wont work)"
|
||||
.descr = "Open device in exclusive mode (vmix won't work)"
|
||||
},
|
||||
#ifdef USE_DSP_POLICY
|
||||
{
|
||||
|
||||
+5
-2
@@ -504,6 +504,7 @@ void backup_start(BlockDriverState *bs, BlockDriverState *target,
|
||||
{
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||||
int64_t len;
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||||
BlockDriverInfo bdi;
|
||||
BackupBlockJob *job = NULL;
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||||
int ret;
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||||
|
||||
assert(bs);
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||||
@@ -568,8 +569,7 @@ void backup_start(BlockDriverState *bs, BlockDriverState *target,
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||||
goto error;
|
||||
}
|
||||
|
||||
BackupBlockJob *job = block_job_create(&backup_job_driver, bs, speed,
|
||||
cb, opaque, errp);
|
||||
job = block_job_create(&backup_job_driver, bs, speed, cb, opaque, errp);
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||||
if (!job) {
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||||
goto error;
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||||
}
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||||
@@ -610,4 +610,7 @@ void backup_start(BlockDriverState *bs, BlockDriverState *target,
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||||
if (sync_bitmap) {
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||||
bdrv_reclaim_dirty_bitmap(bs, sync_bitmap, NULL);
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||||
}
|
||||
if (job) {
|
||||
block_job_unref(&job->common);
|
||||
}
|
||||
}
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||||
|
||||
+2
-18
@@ -2595,19 +2595,6 @@ int bdrv_discard(BlockDriverState *bs, int64_t sector_num, int nb_sectors)
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||||
return rwco.ret;
|
||||
}
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||||
|
||||
typedef struct {
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||||
CoroutineIOCompletion *co;
|
||||
QEMUBH *bh;
|
||||
} BdrvIoctlCompletionData;
|
||||
|
||||
static void bdrv_ioctl_bh_cb(void *opaque)
|
||||
{
|
||||
BdrvIoctlCompletionData *data = opaque;
|
||||
|
||||
bdrv_co_io_em_complete(data->co, -ENOTSUP);
|
||||
qemu_bh_delete(data->bh);
|
||||
}
|
||||
|
||||
static int bdrv_co_do_ioctl(BlockDriverState *bs, int req, void *buf)
|
||||
{
|
||||
BlockDriver *drv = bs->drv;
|
||||
@@ -2625,11 +2612,8 @@ static int bdrv_co_do_ioctl(BlockDriverState *bs, int req, void *buf)
|
||||
|
||||
acb = drv->bdrv_aio_ioctl(bs, req, buf, bdrv_co_io_em_complete, &co);
|
||||
if (!acb) {
|
||||
BdrvIoctlCompletionData *data = g_new(BdrvIoctlCompletionData, 1);
|
||||
data->bh = aio_bh_new(bdrv_get_aio_context(bs),
|
||||
bdrv_ioctl_bh_cb, data);
|
||||
data->co = &co;
|
||||
qemu_bh_schedule(data->bh);
|
||||
co.ret = -ENOTSUP;
|
||||
goto out;
|
||||
}
|
||||
qemu_coroutine_yield();
|
||||
out:
|
||||
|
||||
+12
-3
@@ -425,12 +425,14 @@ static unsigned long *iscsi_allocationmap_init(IscsiLun *iscsilun)
|
||||
static void iscsi_allocationmap_set(IscsiLun *iscsilun, int64_t sector_num,
|
||||
int nb_sectors)
|
||||
{
|
||||
int64_t cluster_num, nb_clusters;
|
||||
if (iscsilun->allocationmap == NULL) {
|
||||
return;
|
||||
}
|
||||
bitmap_set(iscsilun->allocationmap,
|
||||
sector_num / iscsilun->cluster_sectors,
|
||||
DIV_ROUND_UP(nb_sectors, iscsilun->cluster_sectors));
|
||||
cluster_num = sector_num / iscsilun->cluster_sectors;
|
||||
nb_clusters = DIV_ROUND_UP(sector_num + nb_sectors,
|
||||
iscsilun->cluster_sectors) - cluster_num;
|
||||
bitmap_set(iscsilun->allocationmap, cluster_num, nb_clusters);
|
||||
}
|
||||
|
||||
static void iscsi_allocationmap_clear(IscsiLun *iscsilun, int64_t sector_num,
|
||||
@@ -837,6 +839,13 @@ static BlockAIOCB *iscsi_aio_ioctl(BlockDriverState *bs,
|
||||
return &acb->common;
|
||||
}
|
||||
|
||||
if (acb->ioh->cmd_len > SCSI_CDB_MAX_SIZE) {
|
||||
error_report("iSCSI: ioctl error CDB exceeds max size (%d > %d)",
|
||||
acb->ioh->cmd_len, SCSI_CDB_MAX_SIZE);
|
||||
qemu_aio_unref(acb);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
acb->task = malloc(sizeof(struct scsi_task));
|
||||
if (acb->task == NULL) {
|
||||
error_report("iSCSI: Failed to allocate task for scsi command. %s",
|
||||
|
||||
@@ -269,10 +269,6 @@ static int nbd_co_writev_1(BlockDriverState *bs, int64_t sector_num,
|
||||
return -reply.error;
|
||||
}
|
||||
|
||||
/* qemu-nbd has a limit of slightly less than 1M per request. Try to
|
||||
* remain aligned to 4K. */
|
||||
#define NBD_MAX_SECTORS 2040
|
||||
|
||||
int nbd_client_co_readv(BlockDriverState *bs, int64_t sector_num,
|
||||
int nb_sectors, QEMUIOVector *qiov)
|
||||
{
|
||||
|
||||
+1
-1
@@ -20,7 +20,7 @@
|
||||
typedef struct NbdClientSession {
|
||||
QIOChannelSocket *sioc; /* The master data channel */
|
||||
QIOChannel *ioc; /* The current I/O channel which may differ (eg TLS) */
|
||||
uint32_t nbdflags;
|
||||
uint16_t nbdflags;
|
||||
off_t size;
|
||||
|
||||
CoMutex send_mutex;
|
||||
|
||||
+16
-4
@@ -1,7 +1,7 @@
|
||||
/*
|
||||
* QEMU Block driver for native access to files on NFS shares
|
||||
*
|
||||
* Copyright (c) 2014 Peter Lieven <pl@kamp.de>
|
||||
* Copyright (c) 2014-2016 Peter Lieven <pl@kamp.de>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@@ -47,6 +47,7 @@ typedef struct NFSClient {
|
||||
bool has_zero_init;
|
||||
AioContext *aio_context;
|
||||
blkcnt_t st_blocks;
|
||||
bool cache_used;
|
||||
} NFSClient;
|
||||
|
||||
typedef struct NFSRPC {
|
||||
@@ -278,7 +279,7 @@ static void nfs_file_close(BlockDriverState *bs)
|
||||
}
|
||||
|
||||
static int64_t nfs_client_open(NFSClient *client, const char *filename,
|
||||
int flags, Error **errp)
|
||||
int flags, Error **errp, int open_flags)
|
||||
{
|
||||
int ret = -EINVAL, i;
|
||||
struct stat st;
|
||||
@@ -330,12 +331,18 @@ static int64_t nfs_client_open(NFSClient *client, const char *filename,
|
||||
nfs_set_tcp_syncnt(client->context, val);
|
||||
#ifdef LIBNFS_FEATURE_READAHEAD
|
||||
} else if (!strcmp(qp->p[i].name, "readahead")) {
|
||||
if (open_flags & BDRV_O_NOCACHE) {
|
||||
error_setg(errp, "Cannot enable NFS readahead "
|
||||
"if cache.direct = on");
|
||||
goto fail;
|
||||
}
|
||||
if (val > QEMU_NFS_MAX_READAHEAD_SIZE) {
|
||||
error_report("NFS Warning: Truncating NFS readahead"
|
||||
" size to %d", QEMU_NFS_MAX_READAHEAD_SIZE);
|
||||
val = QEMU_NFS_MAX_READAHEAD_SIZE;
|
||||
}
|
||||
nfs_set_readahead(client->context, val);
|
||||
client->cache_used = true;
|
||||
#endif
|
||||
#ifdef LIBNFS_FEATURE_DEBUG
|
||||
} else if (!strcmp(qp->p[i].name, "debug")) {
|
||||
@@ -418,7 +425,7 @@ static int nfs_file_open(BlockDriverState *bs, QDict *options, int flags,
|
||||
}
|
||||
ret = nfs_client_open(client, qemu_opt_get(opts, "filename"),
|
||||
(flags & BDRV_O_RDWR) ? O_RDWR : O_RDONLY,
|
||||
errp);
|
||||
errp, bs->open_flags);
|
||||
if (ret < 0) {
|
||||
goto out;
|
||||
}
|
||||
@@ -454,7 +461,7 @@ static int nfs_file_create(const char *url, QemuOpts *opts, Error **errp)
|
||||
total_size = ROUND_UP(qemu_opt_get_size_del(opts, BLOCK_OPT_SIZE, 0),
|
||||
BDRV_SECTOR_SIZE);
|
||||
|
||||
ret = nfs_client_open(client, url, O_CREAT, errp);
|
||||
ret = nfs_client_open(client, url, O_CREAT, errp, 0);
|
||||
if (ret < 0) {
|
||||
goto out;
|
||||
}
|
||||
@@ -516,6 +523,11 @@ static int nfs_reopen_prepare(BDRVReopenState *state,
|
||||
return -EACCES;
|
||||
}
|
||||
|
||||
if ((state->flags & BDRV_O_NOCACHE) && client->cache_used) {
|
||||
error_setg(errp, "Cannot disable cache if libnfs readahead is enabled");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Update cache for read-only reopens */
|
||||
if (!(state->flags & BDRV_O_RDWR)) {
|
||||
ret = nfs_fstat(client->context, client->fh, &st);
|
||||
|
||||
@@ -64,7 +64,8 @@ int qcow2_grow_l1_table(BlockDriverState *bs, uint64_t min_size,
|
||||
}
|
||||
}
|
||||
|
||||
if (new_l1_size > INT_MAX / sizeof(uint64_t)) {
|
||||
QEMU_BUILD_BUG_ON(QCOW_MAX_L1_SIZE > INT_MAX);
|
||||
if (new_l1_size > QCOW_MAX_L1_SIZE / sizeof(uint64_t)) {
|
||||
return -EFBIG;
|
||||
}
|
||||
|
||||
|
||||
+6
-3
@@ -481,6 +481,7 @@ static BlockBackend *blockdev_init(const char *file, QDict *bs_opts,
|
||||
const char *id;
|
||||
BlockdevDetectZeroesOptions detect_zeroes =
|
||||
BLOCKDEV_DETECT_ZEROES_OPTIONS_OFF;
|
||||
const char *blk_id;
|
||||
const char *throttling_group = NULL;
|
||||
|
||||
/* Check common options by copying from bs_opts to opts, all other options
|
||||
@@ -510,6 +511,8 @@ static BlockBackend *blockdev_init(const char *file, QDict *bs_opts,
|
||||
|
||||
writethrough = !qemu_opt_get_bool(opts, BDRV_OPT_CACHE_WB, true);
|
||||
|
||||
blk_id = qemu_opts_id(opts);
|
||||
|
||||
qdict_extract_subqdict(bs_opts, &interval_dict, "stats-intervals.");
|
||||
qdict_array_split(interval_dict, &interval_list);
|
||||
|
||||
@@ -579,7 +582,7 @@ static BlockBackend *blockdev_init(const char *file, QDict *bs_opts,
|
||||
|
||||
if (throttle_enabled(&cfg)) {
|
||||
if (!throttling_group) {
|
||||
throttling_group = blk_name(blk);
|
||||
throttling_group = blk_id;
|
||||
}
|
||||
blk_rs->throttle_group = g_strdup(throttling_group);
|
||||
blk_rs->throttle_state = throttle_group_incref(throttling_group);
|
||||
@@ -614,7 +617,7 @@ static BlockBackend *blockdev_init(const char *file, QDict *bs_opts,
|
||||
/* disk I/O throttling */
|
||||
if (throttle_enabled(&cfg)) {
|
||||
if (!throttling_group) {
|
||||
throttling_group = blk_name(blk);
|
||||
throttling_group = blk_id;
|
||||
}
|
||||
bdrv_io_limits_enable(bs, throttling_group);
|
||||
bdrv_set_io_limits(bs, &cfg);
|
||||
@@ -636,7 +639,7 @@ static BlockBackend *blockdev_init(const char *file, QDict *bs_opts,
|
||||
blk_set_enable_write_cache(blk, !writethrough);
|
||||
blk_set_on_error(blk, on_read_error, on_write_error);
|
||||
|
||||
if (!monitor_add_blk(blk, qemu_opts_id(opts), errp)) {
|
||||
if (!monitor_add_blk(blk, blk_id, errp)) {
|
||||
blk_unref(blk);
|
||||
blk = NULL;
|
||||
goto err_no_bs_opts;
|
||||
|
||||
@@ -2342,6 +2342,7 @@ if test "$nettle" != "no"; then
|
||||
nettle="yes"
|
||||
|
||||
cat > $TMPC << EOF
|
||||
#include <stddef.h>
|
||||
#include <nettle/pbkdf2.h>
|
||||
int main(void) {
|
||||
pbkdf2_hmac_sha256(8, NULL, 1000, 8, NULL, 8, NULL);
|
||||
@@ -2967,7 +2968,7 @@ int main(void) {
|
||||
}
|
||||
EOF
|
||||
|
||||
if ! compile_prog "-Werror $CFLAGS" "$LIBS" ; then
|
||||
if ! compile_prog "$CFLAGS" "$LIBS" ; then
|
||||
error_exit "sizeof(size_t) doesn't match GLIB_SIZEOF_SIZE_T."\
|
||||
"You probably need to set PKG_CONFIG_LIBDIR"\
|
||||
"to point to the right pkg-config files for your"\
|
||||
|
||||
@@ -15,7 +15,7 @@
|
||||
* unix socket. For each client, the server will create some eventfd
|
||||
* (see EVENTFD(2)), one per vector. These fd are transmitted to all
|
||||
* clients using the SCM_RIGHTS cmsg message. Therefore, each client is
|
||||
* able to send a notification to another client without beeing
|
||||
* able to send a notification to another client without being
|
||||
* "profixied" by the server.
|
||||
*
|
||||
* We use this mechanism to send interruptions between guests.
|
||||
|
||||
@@ -303,7 +303,7 @@ Endianness
|
||||
----------
|
||||
|
||||
Device registers are hard-coded to little-endian (LE). The driver should
|
||||
convert to/from host endianess to LE for device register accesses.
|
||||
convert to/from host endianness to LE for device register accesses.
|
||||
|
||||
Descriptors are LE. Descriptor buffer TLVs will have LE type and length
|
||||
fields, but the value field can either be LE or network-byte-order, depending
|
||||
|
||||
+1
-1
@@ -10,7 +10,7 @@ Introduction
|
||||
------------
|
||||
QEMU includes a throttling module that can be used to set limits to
|
||||
I/O operations. The code itself is generic and independent of the I/O
|
||||
units, but it is currenly used to limit the number of bytes per second
|
||||
units, but it is currently used to limit the number of bytes per second
|
||||
and operations per second (IOPS) when performing disk I/O.
|
||||
|
||||
This document explains how to use the throttling code in QEMU, and how
|
||||
|
||||
@@ -1296,7 +1296,7 @@ static void *file_ram_alloc(RAMBlock *block,
|
||||
}
|
||||
|
||||
page_size = qemu_fd_getpagesize(fd);
|
||||
block->mr->align = page_size;
|
||||
block->mr->align = MAX(page_size, QEMU_VMALLOC_ALIGN);
|
||||
|
||||
if (memory < page_size) {
|
||||
error_setg(errp, "memory size 0x" RAM_ADDR_FMT " must be equal to "
|
||||
@@ -1317,7 +1317,8 @@ static void *file_ram_alloc(RAMBlock *block,
|
||||
perror("ftruncate");
|
||||
}
|
||||
|
||||
area = qemu_ram_mmap(fd, memory, page_size, block->flags & RAM_SHARED);
|
||||
area = qemu_ram_mmap(fd, memory, block->mr->align,
|
||||
block->flags & RAM_SHARED);
|
||||
if (area == MAP_FAILED) {
|
||||
error_setg_errno(errp, errno,
|
||||
"unable to map backing store for guest RAM");
|
||||
|
||||
+5
-1
@@ -1114,10 +1114,14 @@ static void machvirt_init(MachineState *machine)
|
||||
* KVM is not available yet
|
||||
*/
|
||||
if (!gic_version) {
|
||||
if (!kvm_enabled()) {
|
||||
error_report("gic-version=host requires KVM");
|
||||
exit(1);
|
||||
}
|
||||
|
||||
gic_version = kvm_arm_vgic_probe();
|
||||
if (!gic_version) {
|
||||
error_report("Unable to determine GIC version supported by host");
|
||||
error_printf("KVM acceleration is probably not supported\n");
|
||||
exit(1);
|
||||
}
|
||||
}
|
||||
|
||||
+28
-22
@@ -149,6 +149,11 @@ static inline bool vbe_enabled(VGACommonState *s)
|
||||
return s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED;
|
||||
}
|
||||
|
||||
static inline uint8_t sr(VGACommonState *s, int idx)
|
||||
{
|
||||
return vbe_enabled(s) ? s->sr_vbe[idx] : s->sr[idx];
|
||||
}
|
||||
|
||||
static void vga_update_memory_access(VGACommonState *s)
|
||||
{
|
||||
hwaddr base, offset, size;
|
||||
@@ -163,8 +168,8 @@ static void vga_update_memory_access(VGACommonState *s)
|
||||
s->has_chain4_alias = false;
|
||||
s->plane_updated = 0xf;
|
||||
}
|
||||
if ((s->sr[VGA_SEQ_PLANE_WRITE] & VGA_SR02_ALL_PLANES) ==
|
||||
VGA_SR02_ALL_PLANES && s->sr[VGA_SEQ_MEMORY_MODE] & VGA_SR04_CHN_4M) {
|
||||
if ((sr(s, VGA_SEQ_PLANE_WRITE) & VGA_SR02_ALL_PLANES) ==
|
||||
VGA_SR02_ALL_PLANES && sr(s, VGA_SEQ_MEMORY_MODE) & VGA_SR04_CHN_4M) {
|
||||
offset = 0;
|
||||
switch ((s->gr[VGA_GFX_MISC] >> 2) & 3) {
|
||||
case 0:
|
||||
@@ -234,7 +239,7 @@ static void vga_precise_update_retrace_info(VGACommonState *s)
|
||||
((s->cr[VGA_CRTC_OVERFLOW] >> 6) & 2)) << 8);
|
||||
vretr_end_line = s->cr[VGA_CRTC_V_SYNC_END] & 0xf;
|
||||
|
||||
clocking_mode = (s->sr[VGA_SEQ_CLOCK_MODE] >> 3) & 1;
|
||||
clocking_mode = (sr(s, VGA_SEQ_CLOCK_MODE) >> 3) & 1;
|
||||
clock_sel = (s->msr >> 2) & 3;
|
||||
dots = (s->msr & 1) ? 8 : 9;
|
||||
|
||||
@@ -486,7 +491,6 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
|
||||
printf("vga: write SR%x = 0x%02x\n", s->sr_index, val);
|
||||
#endif
|
||||
s->sr[s->sr_index] = val & sr_mask[s->sr_index];
|
||||
vbe_update_vgaregs(s);
|
||||
if (s->sr_index == VGA_SEQ_CLOCK_MODE) {
|
||||
s->update_retrace_info(s);
|
||||
}
|
||||
@@ -680,13 +684,13 @@ static void vbe_update_vgaregs(VGACommonState *s)
|
||||
|
||||
if (s->vbe_regs[VBE_DISPI_INDEX_BPP] == 4) {
|
||||
shift_control = 0;
|
||||
s->sr[VGA_SEQ_CLOCK_MODE] &= ~8; /* no double line */
|
||||
s->sr_vbe[VGA_SEQ_CLOCK_MODE] &= ~8; /* no double line */
|
||||
} else {
|
||||
shift_control = 2;
|
||||
/* set chain 4 mode */
|
||||
s->sr[VGA_SEQ_MEMORY_MODE] |= VGA_SR04_CHN_4M;
|
||||
s->sr_vbe[VGA_SEQ_MEMORY_MODE] |= VGA_SR04_CHN_4M;
|
||||
/* activate all planes */
|
||||
s->sr[VGA_SEQ_PLANE_WRITE] |= VGA_SR02_ALL_PLANES;
|
||||
s->sr_vbe[VGA_SEQ_PLANE_WRITE] |= VGA_SR02_ALL_PLANES;
|
||||
}
|
||||
s->gr[VGA_GFX_MODE] = (s->gr[VGA_GFX_MODE] & ~0x60) |
|
||||
(shift_control << 5);
|
||||
@@ -836,7 +840,7 @@ uint32_t vga_mem_readb(VGACommonState *s, hwaddr addr)
|
||||
break;
|
||||
}
|
||||
|
||||
if (s->sr[VGA_SEQ_MEMORY_MODE] & VGA_SR04_CHN_4M) {
|
||||
if (sr(s, VGA_SEQ_MEMORY_MODE) & VGA_SR04_CHN_4M) {
|
||||
/* chain 4 mode : simplest access */
|
||||
assert(addr < s->vram_size);
|
||||
ret = s->vram_ptr[addr];
|
||||
@@ -904,11 +908,11 @@ void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val)
|
||||
break;
|
||||
}
|
||||
|
||||
if (s->sr[VGA_SEQ_MEMORY_MODE] & VGA_SR04_CHN_4M) {
|
||||
if (sr(s, VGA_SEQ_MEMORY_MODE) & VGA_SR04_CHN_4M) {
|
||||
/* chain 4 mode : simplest access */
|
||||
plane = addr & 3;
|
||||
mask = (1 << plane);
|
||||
if (s->sr[VGA_SEQ_PLANE_WRITE] & mask) {
|
||||
if (sr(s, VGA_SEQ_PLANE_WRITE) & mask) {
|
||||
assert(addr < s->vram_size);
|
||||
s->vram_ptr[addr] = val;
|
||||
#ifdef DEBUG_VGA_MEM
|
||||
@@ -921,7 +925,7 @@ void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val)
|
||||
/* odd/even mode (aka text mode mapping) */
|
||||
plane = (s->gr[VGA_GFX_PLANE_READ] & 2) | (addr & 1);
|
||||
mask = (1 << plane);
|
||||
if (s->sr[VGA_SEQ_PLANE_WRITE] & mask) {
|
||||
if (sr(s, VGA_SEQ_PLANE_WRITE) & mask) {
|
||||
addr = ((addr & ~1) << 1) | plane;
|
||||
if (addr >= s->vram_size) {
|
||||
return;
|
||||
@@ -996,7 +1000,7 @@ void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val)
|
||||
|
||||
do_write:
|
||||
/* mask data according to sr[2] */
|
||||
mask = s->sr[VGA_SEQ_PLANE_WRITE];
|
||||
mask = sr(s, VGA_SEQ_PLANE_WRITE);
|
||||
s->plane_updated |= mask; /* only used to detect font change */
|
||||
write_mask = mask16[mask];
|
||||
if (addr * sizeof(uint32_t) >= s->vram_size) {
|
||||
@@ -1152,10 +1156,10 @@ static void vga_get_text_resolution(VGACommonState *s, int *pwidth, int *pheight
|
||||
/* total width & height */
|
||||
cheight = (s->cr[VGA_CRTC_MAX_SCAN] & 0x1f) + 1;
|
||||
cwidth = 8;
|
||||
if (!(s->sr[VGA_SEQ_CLOCK_MODE] & VGA_SR01_CHAR_CLK_8DOTS)) {
|
||||
if (!(sr(s, VGA_SEQ_CLOCK_MODE) & VGA_SR01_CHAR_CLK_8DOTS)) {
|
||||
cwidth = 9;
|
||||
}
|
||||
if (s->sr[VGA_SEQ_CLOCK_MODE] & 0x08) {
|
||||
if (sr(s, VGA_SEQ_CLOCK_MODE) & 0x08) {
|
||||
cwidth = 16; /* NOTE: no 18 pixel wide */
|
||||
}
|
||||
width = (s->cr[VGA_CRTC_H_DISP] + 1);
|
||||
@@ -1197,7 +1201,7 @@ static void vga_draw_text(VGACommonState *s, int full_update)
|
||||
int64_t now = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL);
|
||||
|
||||
/* compute font data address (in plane 2) */
|
||||
v = s->sr[VGA_SEQ_CHARACTER_MAP];
|
||||
v = sr(s, VGA_SEQ_CHARACTER_MAP);
|
||||
offset = (((v >> 4) & 1) | ((v << 1) & 6)) * 8192 * 4 + 2;
|
||||
if (offset != s->font_offsets[0]) {
|
||||
s->font_offsets[0] = offset;
|
||||
@@ -1506,11 +1510,11 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
|
||||
}
|
||||
|
||||
if (shift_control == 0) {
|
||||
if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {
|
||||
if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
|
||||
disp_width <<= 1;
|
||||
}
|
||||
} else if (shift_control == 1) {
|
||||
if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {
|
||||
if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
|
||||
disp_width <<= 1;
|
||||
}
|
||||
}
|
||||
@@ -1574,7 +1578,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
|
||||
|
||||
if (shift_control == 0) {
|
||||
full_update |= update_palette16(s);
|
||||
if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {
|
||||
if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
|
||||
v = VGA_DRAW_LINE4D2;
|
||||
} else {
|
||||
v = VGA_DRAW_LINE4;
|
||||
@@ -1582,7 +1586,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
|
||||
bits = 4;
|
||||
} else if (shift_control == 1) {
|
||||
full_update |= update_palette16(s);
|
||||
if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {
|
||||
if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
|
||||
v = VGA_DRAW_LINE2D2;
|
||||
} else {
|
||||
v = VGA_DRAW_LINE2;
|
||||
@@ -1629,7 +1633,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
|
||||
#if 0
|
||||
printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n",
|
||||
width, height, v, line_offset, s->cr[9], s->cr[VGA_CRTC_MODE],
|
||||
s->line_compare, s->sr[VGA_SEQ_CLOCK_MODE]);
|
||||
s->line_compare, sr(s, VGA_SEQ_CLOCK_MODE));
|
||||
#endif
|
||||
addr1 = (s->start_addr * 4);
|
||||
bwidth = (width * bits + 7) / 8;
|
||||
@@ -1781,6 +1785,7 @@ void vga_common_reset(VGACommonState *s)
|
||||
{
|
||||
s->sr_index = 0;
|
||||
memset(s->sr, '\0', sizeof(s->sr));
|
||||
memset(s->sr_vbe, '\0', sizeof(s->sr_vbe));
|
||||
s->gr_index = 0;
|
||||
memset(s->gr, '\0', sizeof(s->gr));
|
||||
s->ar_index = 0;
|
||||
@@ -1883,10 +1888,10 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
|
||||
/* total width & height */
|
||||
cheight = (s->cr[VGA_CRTC_MAX_SCAN] & 0x1f) + 1;
|
||||
cw = 8;
|
||||
if (!(s->sr[VGA_SEQ_CLOCK_MODE] & VGA_SR01_CHAR_CLK_8DOTS)) {
|
||||
if (!(sr(s, VGA_SEQ_CLOCK_MODE) & VGA_SR01_CHAR_CLK_8DOTS)) {
|
||||
cw = 9;
|
||||
}
|
||||
if (s->sr[VGA_SEQ_CLOCK_MODE] & 0x08) {
|
||||
if (sr(s, VGA_SEQ_CLOCK_MODE) & 0x08) {
|
||||
cw = 16; /* NOTE: no 18 pixel wide */
|
||||
}
|
||||
width = (s->cr[VGA_CRTC_H_DISP] + 1);
|
||||
@@ -2053,6 +2058,7 @@ static int vga_common_post_load(void *opaque, int version_id)
|
||||
|
||||
/* force refresh */
|
||||
s->graphic_mode = -1;
|
||||
vbe_update_vgaregs(s);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -98,6 +98,7 @@ typedef struct VGACommonState {
|
||||
MemoryRegion chain4_alias;
|
||||
uint8_t sr_index;
|
||||
uint8_t sr[256];
|
||||
uint8_t sr_vbe[256];
|
||||
uint8_t gr_index;
|
||||
uint8_t gr[256];
|
||||
uint8_t ar_index;
|
||||
|
||||
+41
-37
@@ -66,17 +66,11 @@ struct vmsvga_state_s {
|
||||
uint8_t *fifo_ptr;
|
||||
unsigned int fifo_size;
|
||||
|
||||
union {
|
||||
uint32_t *fifo;
|
||||
struct QEMU_PACKED {
|
||||
uint32_t min;
|
||||
uint32_t max;
|
||||
uint32_t next_cmd;
|
||||
uint32_t stop;
|
||||
/* Add registers here when adding capabilities. */
|
||||
uint32_t fifo[0];
|
||||
} *cmd;
|
||||
};
|
||||
uint32_t *fifo;
|
||||
uint32_t fifo_min;
|
||||
uint32_t fifo_max;
|
||||
uint32_t fifo_next;
|
||||
uint32_t fifo_stop;
|
||||
|
||||
#define REDRAW_FIFO_LEN 512
|
||||
struct vmsvga_rect_s {
|
||||
@@ -198,7 +192,7 @@ enum {
|
||||
*/
|
||||
SVGA_FIFO_MIN = 0,
|
||||
SVGA_FIFO_MAX, /* The distance from MIN to MAX must be at least 10K */
|
||||
SVGA_FIFO_NEXT_CMD,
|
||||
SVGA_FIFO_NEXT,
|
||||
SVGA_FIFO_STOP,
|
||||
|
||||
/*
|
||||
@@ -546,8 +540,6 @@ static inline void vmsvga_cursor_define(struct vmsvga_state_s *s,
|
||||
}
|
||||
#endif
|
||||
|
||||
#define CMD(f) le32_to_cpu(s->cmd->f)
|
||||
|
||||
static inline int vmsvga_fifo_length(struct vmsvga_state_s *s)
|
||||
{
|
||||
int num;
|
||||
@@ -555,21 +547,45 @@ static inline int vmsvga_fifo_length(struct vmsvga_state_s *s)
|
||||
if (!s->config || !s->enable) {
|
||||
return 0;
|
||||
}
|
||||
num = CMD(next_cmd) - CMD(stop);
|
||||
|
||||
s->fifo_min = le32_to_cpu(s->fifo[SVGA_FIFO_MIN]);
|
||||
s->fifo_max = le32_to_cpu(s->fifo[SVGA_FIFO_MAX]);
|
||||
s->fifo_next = le32_to_cpu(s->fifo[SVGA_FIFO_NEXT]);
|
||||
s->fifo_stop = le32_to_cpu(s->fifo[SVGA_FIFO_STOP]);
|
||||
|
||||
/* Check range and alignment. */
|
||||
if ((s->fifo_min | s->fifo_max | s->fifo_next | s->fifo_stop) & 3) {
|
||||
return 0;
|
||||
}
|
||||
if (s->fifo_min < sizeof(uint32_t) * 4) {
|
||||
return 0;
|
||||
}
|
||||
if (s->fifo_max > SVGA_FIFO_SIZE ||
|
||||
s->fifo_min >= SVGA_FIFO_SIZE ||
|
||||
s->fifo_stop >= SVGA_FIFO_SIZE ||
|
||||
s->fifo_next >= SVGA_FIFO_SIZE) {
|
||||
return 0;
|
||||
}
|
||||
if (s->fifo_max < s->fifo_min + 10 * 1024) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
num = s->fifo_next - s->fifo_stop;
|
||||
if (num < 0) {
|
||||
num += CMD(max) - CMD(min);
|
||||
num += s->fifo_max - s->fifo_min;
|
||||
}
|
||||
return num >> 2;
|
||||
}
|
||||
|
||||
static inline uint32_t vmsvga_fifo_read_raw(struct vmsvga_state_s *s)
|
||||
{
|
||||
uint32_t cmd = s->fifo[CMD(stop) >> 2];
|
||||
uint32_t cmd = s->fifo[s->fifo_stop >> 2];
|
||||
|
||||
s->cmd->stop = cpu_to_le32(CMD(stop) + 4);
|
||||
if (CMD(stop) >= CMD(max)) {
|
||||
s->cmd->stop = s->cmd->min;
|
||||
s->fifo_stop += 4;
|
||||
if (s->fifo_stop >= s->fifo_max) {
|
||||
s->fifo_stop = s->fifo_min;
|
||||
}
|
||||
s->fifo[SVGA_FIFO_STOP] = cpu_to_le32(s->fifo_stop);
|
||||
return cmd;
|
||||
}
|
||||
|
||||
@@ -581,15 +597,15 @@ static inline uint32_t vmsvga_fifo_read(struct vmsvga_state_s *s)
|
||||
static void vmsvga_fifo_run(struct vmsvga_state_s *s)
|
||||
{
|
||||
uint32_t cmd, colour;
|
||||
int args, len;
|
||||
int args, len, maxloop = 1024;
|
||||
int x, y, dx, dy, width, height;
|
||||
struct vmsvga_cursor_definition_s cursor;
|
||||
uint32_t cmd_start;
|
||||
|
||||
len = vmsvga_fifo_length(s);
|
||||
while (len > 0) {
|
||||
while (len > 0 && --maxloop > 0) {
|
||||
/* May need to go back to the start of the command if incomplete */
|
||||
cmd_start = s->cmd->stop;
|
||||
cmd_start = s->fifo_stop;
|
||||
|
||||
switch (cmd = vmsvga_fifo_read(s)) {
|
||||
case SVGA_CMD_UPDATE:
|
||||
@@ -748,7 +764,8 @@ static void vmsvga_fifo_run(struct vmsvga_state_s *s)
|
||||
break;
|
||||
|
||||
rewind:
|
||||
s->cmd->stop = cmd_start;
|
||||
s->fifo_stop = cmd_start;
|
||||
s->fifo[SVGA_FIFO_STOP] = cpu_to_le32(s->fifo_stop);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@@ -1005,19 +1022,6 @@ static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value)
|
||||
case SVGA_REG_CONFIG_DONE:
|
||||
if (value) {
|
||||
s->fifo = (uint32_t *) s->fifo_ptr;
|
||||
/* Check range and alignment. */
|
||||
if ((CMD(min) | CMD(max) | CMD(next_cmd) | CMD(stop)) & 3) {
|
||||
break;
|
||||
}
|
||||
if (CMD(min) < (uint8_t *) s->cmd->fifo - (uint8_t *) s->fifo) {
|
||||
break;
|
||||
}
|
||||
if (CMD(max) > SVGA_FIFO_SIZE) {
|
||||
break;
|
||||
}
|
||||
if (CMD(max) < CMD(min) + 10 * 1024) {
|
||||
break;
|
||||
}
|
||||
vga_dirty_log_stop(&s->vga);
|
||||
}
|
||||
s->config = !!value;
|
||||
|
||||
+1
-1
@@ -247,7 +247,7 @@ static void imx_i2c_write(void *opaque, hwaddr offset,
|
||||
if (s->address == ADDR_RESET) {
|
||||
if (i2c_start_transfer(s->bus, extract32(s->i2dr_write, 1, 7),
|
||||
extract32(s->i2dr_write, 0, 1))) {
|
||||
/* if non zero is returned, the adress is not valid */
|
||||
/* if non zero is returned, the address is not valid */
|
||||
s->i2sr |= I2SR_RXAK;
|
||||
} else {
|
||||
s->address = s->i2dr_write;
|
||||
|
||||
@@ -1891,8 +1891,4 @@ static void assigned_dev_load_option_rom(AssignedDevice *dev)
|
||||
pci_assign_dev_load_option_rom(&dev->dev, OBJECT(dev), &size,
|
||||
dev->host.domain, dev->host.bus,
|
||||
dev->host.slot, dev->host.function);
|
||||
|
||||
if (!size) {
|
||||
error_report("pci-assign: Invalid ROM.");
|
||||
}
|
||||
}
|
||||
|
||||
+1
-1
@@ -394,7 +394,7 @@ static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip)
|
||||
CPUX86State *env = &cpu->env;
|
||||
VAPICHandlers *handlers;
|
||||
uint8_t opcode[2];
|
||||
uint32_t imm32;
|
||||
uint32_t imm32 = 0;
|
||||
target_ulong current_pc = 0;
|
||||
target_ulong current_cs_base = 0;
|
||||
int current_flags = 0;
|
||||
|
||||
@@ -40,6 +40,9 @@ void *pci_assign_dev_load_option_rom(PCIDevice *dev, struct Object *owner,
|
||||
domain, bus, slot, function);
|
||||
|
||||
if (stat(rom_file, &st)) {
|
||||
if (errno != ENOENT) {
|
||||
error_report("pci-assign: Invalid ROM.");
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
||||
+2
-2
@@ -919,6 +919,7 @@ static void ncq_err(NCQTransferState *ncq_tfs)
|
||||
ide_state->error = ABRT_ERR;
|
||||
ide_state->status = READY_STAT | ERR_STAT;
|
||||
ncq_tfs->drive->port_regs.scr_err |= (1 << ncq_tfs->tag);
|
||||
qemu_sglist_destroy(&ncq_tfs->sglist);
|
||||
ncq_tfs->used = 0;
|
||||
}
|
||||
|
||||
@@ -1023,7 +1024,6 @@ static void execute_ncq_command(NCQTransferState *ncq_tfs)
|
||||
default:
|
||||
DPRINTF(port, "error: unsupported NCQ command (0x%02x) received\n",
|
||||
ncq_tfs->cmd);
|
||||
qemu_sglist_destroy(&ncq_tfs->sglist);
|
||||
ncq_err(ncq_tfs);
|
||||
}
|
||||
}
|
||||
@@ -1090,7 +1090,6 @@ static void process_ncq_command(AHCIState *s, int port, uint8_t *cmd_fis,
|
||||
error_report("ahci: PRDT length for NCQ command (0x%zx) "
|
||||
"is smaller than the requested size (0x%zx)",
|
||||
ncq_tfs->sglist.size, size);
|
||||
qemu_sglist_destroy(&ncq_tfs->sglist);
|
||||
ncq_err(ncq_tfs);
|
||||
ahci_trigger_irq(ad->hba, ad, PORT_IRQ_OVERFLOW);
|
||||
return;
|
||||
@@ -1476,6 +1475,7 @@ void ahci_realize(AHCIState *s, DeviceState *qdev, AddressSpace *as, int ports)
|
||||
ad->port.dma->ops = &ahci_dma_ops;
|
||||
ide_register_restart_cb(&ad->port);
|
||||
}
|
||||
g_free(irqs);
|
||||
}
|
||||
|
||||
void ahci_uninit(AHCIState *s)
|
||||
|
||||
@@ -383,6 +383,7 @@ static void ide_atapi_cmd_read_dma_cb(void *opaque, int ret)
|
||||
if (ret < 0) {
|
||||
if (ide_handle_rw_error(s, -ret, ide_dma_cmd_to_retry(s->dma_cmd))) {
|
||||
if (s->bus->error_status) {
|
||||
s->bus->dma->aiocb = NULL;
|
||||
return;
|
||||
}
|
||||
goto eot;
|
||||
|
||||
@@ -806,6 +806,8 @@ static void ide_dma_cb(void *opaque, int ret)
|
||||
}
|
||||
if (ret < 0) {
|
||||
if (ide_handle_rw_error(s, -ret, ide_dma_cmd_to_retry(s->dma_cmd))) {
|
||||
s->bus->dma->aiocb = NULL;
|
||||
dma_buf_commit(s, 0);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -275,6 +275,7 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
|
||||
/* Non-block ATAPI transfer - just copy to RAM */
|
||||
s->io_buffer_size = MIN(s->io_buffer_size, io->len);
|
||||
cpu_physical_memory_write(io->addr, s->io_buffer, s->io_buffer_size);
|
||||
io->len = 0;
|
||||
ide_atapi_cmd_ok(s);
|
||||
m->dma_active = false;
|
||||
goto done;
|
||||
|
||||
@@ -83,6 +83,9 @@ static ssize_t mipsnet_receive(NetClientState *nc, const uint8_t *buf, size_t si
|
||||
if (!mipsnet_can_receive(nc))
|
||||
return 0;
|
||||
|
||||
if (size >= sizeof(s->rx_buffer)) {
|
||||
return 0;
|
||||
}
|
||||
s->busy = 1;
|
||||
|
||||
/* Just accept everything. */
|
||||
|
||||
+17
-23
@@ -1542,33 +1542,11 @@ static int virtio_net_load(QEMUFile *f, void *opaque, int version_id)
|
||||
{
|
||||
VirtIONet *n = opaque;
|
||||
VirtIODevice *vdev = VIRTIO_DEVICE(n);
|
||||
int ret;
|
||||
|
||||
if (version_id < 2 || version_id > VIRTIO_NET_VM_VERSION)
|
||||
return -EINVAL;
|
||||
|
||||
ret = virtio_load(vdev, f, version_id);
|
||||
if (ret) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (virtio_vdev_has_feature(vdev, VIRTIO_NET_F_CTRL_GUEST_OFFLOADS)) {
|
||||
n->curr_guest_offloads = qemu_get_be64(f);
|
||||
} else {
|
||||
n->curr_guest_offloads = virtio_net_supported_guest_offloads(n);
|
||||
}
|
||||
|
||||
if (peer_has_vnet_hdr(n)) {
|
||||
virtio_net_apply_guest_offloads(n);
|
||||
}
|
||||
|
||||
if (virtio_vdev_has_feature(vdev, VIRTIO_NET_F_GUEST_ANNOUNCE) &&
|
||||
virtio_vdev_has_feature(vdev, VIRTIO_NET_F_CTRL_VQ)) {
|
||||
n->announce_counter = SELF_ANNOUNCE_ROUNDS;
|
||||
timer_mod(n->announce_timer, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL));
|
||||
}
|
||||
|
||||
return 0;
|
||||
return virtio_load(vdev, f, version_id);
|
||||
}
|
||||
|
||||
static int virtio_net_load_device(VirtIODevice *vdev, QEMUFile *f,
|
||||
@@ -1665,6 +1643,16 @@ static int virtio_net_load_device(VirtIODevice *vdev, QEMUFile *f,
|
||||
}
|
||||
}
|
||||
|
||||
if (virtio_vdev_has_feature(vdev, VIRTIO_NET_F_CTRL_GUEST_OFFLOADS)) {
|
||||
n->curr_guest_offloads = qemu_get_be64(f);
|
||||
} else {
|
||||
n->curr_guest_offloads = virtio_net_supported_guest_offloads(n);
|
||||
}
|
||||
|
||||
if (peer_has_vnet_hdr(n)) {
|
||||
virtio_net_apply_guest_offloads(n);
|
||||
}
|
||||
|
||||
virtio_net_set_queues(n);
|
||||
|
||||
/* Find the first multicast entry in the saved MAC filter */
|
||||
@@ -1682,6 +1670,12 @@ static int virtio_net_load_device(VirtIODevice *vdev, QEMUFile *f,
|
||||
qemu_get_subqueue(n->nic, i)->link_down = link_down;
|
||||
}
|
||||
|
||||
if (virtio_vdev_has_feature(vdev, VIRTIO_NET_F_GUEST_ANNOUNCE) &&
|
||||
virtio_vdev_has_feature(vdev, VIRTIO_NET_F_CTRL_VQ)) {
|
||||
n->announce_counter = SELF_ANNOUNCE_ROUNDS;
|
||||
timer_mod(n->announce_timer, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL));
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
+2
-2
@@ -37,7 +37,7 @@
|
||||
#define VMXNET3_MSIX_BAR_SIZE 0x2000
|
||||
#define MIN_BUF_SIZE 60
|
||||
|
||||
/* Compatability flags for migration */
|
||||
/* Compatibility flags for migration */
|
||||
#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT 0
|
||||
#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS \
|
||||
(1 << VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT)
|
||||
@@ -341,7 +341,7 @@ typedef struct {
|
||||
uint32_t mcast_list_len;
|
||||
uint32_t mcast_list_buff_size; /* needed for live migration. */
|
||||
|
||||
/* Compatability flags for migration */
|
||||
/* Compatibility flags for migration */
|
||||
uint32_t compat_flags;
|
||||
} VMXNET3State;
|
||||
|
||||
|
||||
+1
-1
@@ -40,7 +40,7 @@
|
||||
*
|
||||
* Setting this flag to false will remove MSI/MSI-X capability from all devices.
|
||||
*
|
||||
* It is preferrable for controllers to set this to true (non-broken) even if
|
||||
* It is preferable for controllers to set this to true (non-broken) even if
|
||||
* they do not actually support MSI/MSI-X: guests normally probe the controller
|
||||
* type and do not attempt to enable MSI/MSI-X with interrupt controllers not
|
||||
* supporting such, so removing the capability is not required, and
|
||||
|
||||
@@ -62,6 +62,8 @@ static Property pci_props[] = {
|
||||
QEMU_PCI_CAP_MULTIFUNCTION_BITNR, false),
|
||||
DEFINE_PROP_BIT("command_serr_enable", PCIDevice, cap_present,
|
||||
QEMU_PCI_CAP_SERR_BITNR, true),
|
||||
DEFINE_PROP_BIT("x-pcie-lnksta-dllla", PCIDevice, cap_present,
|
||||
QEMU_PCIE_LNKSTA_DLLLA_BITNR, true),
|
||||
DEFINE_PROP_END_OF_LIST()
|
||||
};
|
||||
|
||||
|
||||
+1
-1
@@ -116,7 +116,7 @@ pcibus_t pci_bridge_get_base(const PCIDevice *bridge, uint8_t type)
|
||||
return base;
|
||||
}
|
||||
|
||||
/* accessor funciton to get bridge filtering limit */
|
||||
/* accessor function to get bridge filtering limit */
|
||||
pcibus_t pci_bridge_get_limit(const PCIDevice *bridge, uint8_t type)
|
||||
{
|
||||
pcibus_t limit;
|
||||
|
||||
+14
-1
@@ -47,6 +47,7 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
|
||||
{
|
||||
int pos;
|
||||
uint8_t *exp_cap;
|
||||
uint8_t *cmask;
|
||||
|
||||
assert(pci_is_express(dev));
|
||||
|
||||
@@ -57,6 +58,7 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
|
||||
}
|
||||
dev->exp.exp_cap = pos;
|
||||
exp_cap = dev->config + pos;
|
||||
cmask = dev->cmask + pos;
|
||||
|
||||
/* capability register
|
||||
interrupt message number defaults to 0 */
|
||||
@@ -80,7 +82,18 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
|
||||
PCI_EXP_LNK_LS_25);
|
||||
|
||||
pci_set_word(exp_cap + PCI_EXP_LNKSTA,
|
||||
PCI_EXP_LNK_MLW_1 | PCI_EXP_LNK_LS_25 |PCI_EXP_LNKSTA_DLLLA);
|
||||
PCI_EXP_LNK_MLW_1 | PCI_EXP_LNK_LS_25);
|
||||
|
||||
if (dev->cap_present & QEMU_PCIE_LNKSTA_DLLLA) {
|
||||
pci_word_test_and_set_mask(exp_cap + PCI_EXP_LNKSTA,
|
||||
PCI_EXP_LNKSTA_DLLLA);
|
||||
}
|
||||
|
||||
/* We changed link status bits over time, and changing them across
|
||||
* migrations is generally fine as hardware changes them too.
|
||||
* Let's not bother checking.
|
||||
*/
|
||||
pci_set_word(cmask + PCI_EXP_LNKSTA, 0);
|
||||
|
||||
pci_set_long(exp_cap + PCI_EXP_DEVCAP2,
|
||||
PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP);
|
||||
|
||||
+9
-2
@@ -47,8 +47,8 @@ static const VMStateDescription vmstate_ipl = {
|
||||
.version_id = 0,
|
||||
.minimum_version_id = 0,
|
||||
.fields = (VMStateField[]) {
|
||||
VMSTATE_UINT64(start_addr, S390IPLState),
|
||||
VMSTATE_UINT64(bios_start_addr, S390IPLState),
|
||||
VMSTATE_UINT64(compat_start_addr, S390IPLState),
|
||||
VMSTATE_UINT64(compat_bios_start_addr, S390IPLState),
|
||||
VMSTATE_STRUCT(iplb, S390IPLState, 0, vmstate_iplb, IplParameterBlock),
|
||||
VMSTATE_BOOL(iplb_valid, S390IPLState),
|
||||
VMSTATE_UINT8(cssid, S390IPLState),
|
||||
@@ -170,6 +170,13 @@ static void s390_ipl_realize(DeviceState *dev, Error **errp)
|
||||
stq_p(rom_ptr(INITRD_PARM_SIZE), initrd_size);
|
||||
}
|
||||
}
|
||||
/*
|
||||
* Don't ever use the migrated values, they could come from a different
|
||||
* BIOS and therefore don't work. But still migrate the values, so
|
||||
* QEMUs relying on it don't break.
|
||||
*/
|
||||
ipl->compat_start_addr = ipl->start_addr;
|
||||
ipl->compat_bios_start_addr = ipl->bios_start_addr;
|
||||
qemu_register_reset(qdev_reset_all_fn, dev);
|
||||
error:
|
||||
error_propagate(errp, err);
|
||||
|
||||
@@ -33,7 +33,9 @@ struct S390IPLState {
|
||||
/*< private >*/
|
||||
DeviceState parent_obj;
|
||||
uint64_t start_addr;
|
||||
uint64_t compat_start_addr;
|
||||
uint64_t bios_start_addr;
|
||||
uint64_t compat_bios_start_addr;
|
||||
bool enforce_bios;
|
||||
IplParameterBlock iplb;
|
||||
bool iplb_valid;
|
||||
|
||||
+32
-25
@@ -82,7 +82,7 @@ void esp_request_cancelled(SCSIRequest *req)
|
||||
}
|
||||
}
|
||||
|
||||
static uint32_t get_cmd(ESPState *s, uint8_t *buf)
|
||||
static uint32_t get_cmd(ESPState *s, uint8_t *buf, uint8_t buflen)
|
||||
{
|
||||
uint32_t dmalen;
|
||||
int target;
|
||||
@@ -92,9 +92,15 @@ static uint32_t get_cmd(ESPState *s, uint8_t *buf)
|
||||
dmalen = s->rregs[ESP_TCLO];
|
||||
dmalen |= s->rregs[ESP_TCMID] << 8;
|
||||
dmalen |= s->rregs[ESP_TCHI] << 16;
|
||||
if (dmalen > buflen) {
|
||||
return 0;
|
||||
}
|
||||
s->dma_memory_read(s->dma_opaque, buf, dmalen);
|
||||
} else {
|
||||
dmalen = s->ti_size;
|
||||
if (dmalen > TI_BUFSZ) {
|
||||
return 0;
|
||||
}
|
||||
memcpy(buf, s->ti_buf, dmalen);
|
||||
buf[0] = buf[2] >> 5;
|
||||
}
|
||||
@@ -166,7 +172,7 @@ static void handle_satn(ESPState *s)
|
||||
s->dma_cb = handle_satn;
|
||||
return;
|
||||
}
|
||||
len = get_cmd(s, buf);
|
||||
len = get_cmd(s, buf, sizeof(buf));
|
||||
if (len)
|
||||
do_cmd(s, buf);
|
||||
}
|
||||
@@ -180,7 +186,7 @@ static void handle_s_without_atn(ESPState *s)
|
||||
s->dma_cb = handle_s_without_atn;
|
||||
return;
|
||||
}
|
||||
len = get_cmd(s, buf);
|
||||
len = get_cmd(s, buf, sizeof(buf));
|
||||
if (len) {
|
||||
do_busid_cmd(s, buf, 0);
|
||||
}
|
||||
@@ -192,7 +198,7 @@ static void handle_satn_stop(ESPState *s)
|
||||
s->dma_cb = handle_satn_stop;
|
||||
return;
|
||||
}
|
||||
s->cmdlen = get_cmd(s, s->cmdbuf);
|
||||
s->cmdlen = get_cmd(s, s->cmdbuf, sizeof(s->cmdbuf));
|
||||
if (s->cmdlen) {
|
||||
trace_esp_handle_satn_stop(s->cmdlen);
|
||||
s->do_cmd = 1;
|
||||
@@ -216,7 +222,7 @@ static void write_response(ESPState *s)
|
||||
} else {
|
||||
s->ti_size = 2;
|
||||
s->ti_rptr = 0;
|
||||
s->ti_wptr = 0;
|
||||
s->ti_wptr = 2;
|
||||
s->rregs[ESP_RFLAGS] = 2;
|
||||
}
|
||||
esp_raise_irq(s);
|
||||
@@ -239,15 +245,12 @@ static void esp_do_dma(ESPState *s)
|
||||
uint32_t len;
|
||||
int to_device;
|
||||
|
||||
to_device = (s->ti_size < 0);
|
||||
len = s->dma_left;
|
||||
if (s->do_cmd) {
|
||||
trace_esp_do_dma(s->cmdlen, len);
|
||||
assert (s->cmdlen <= sizeof(s->cmdbuf) &&
|
||||
len <= sizeof(s->cmdbuf) - s->cmdlen);
|
||||
s->dma_memory_read(s->dma_opaque, &s->cmdbuf[s->cmdlen], len);
|
||||
s->ti_size = 0;
|
||||
s->cmdlen = 0;
|
||||
s->do_cmd = 0;
|
||||
do_cmd(s, s->cmdbuf);
|
||||
return;
|
||||
}
|
||||
if (s->async_len == 0) {
|
||||
@@ -257,6 +260,7 @@ static void esp_do_dma(ESPState *s)
|
||||
if (len > s->async_len) {
|
||||
len = s->async_len;
|
||||
}
|
||||
to_device = (s->ti_size < 0);
|
||||
if (to_device) {
|
||||
s->dma_memory_read(s->dma_opaque, s->async_buf, len);
|
||||
} else {
|
||||
@@ -312,6 +316,7 @@ void esp_transfer_data(SCSIRequest *req, uint32_t len)
|
||||
{
|
||||
ESPState *s = req->hba_private;
|
||||
|
||||
assert(!s->do_cmd);
|
||||
trace_esp_transfer_data(s->dma_left, s->ti_size);
|
||||
s->async_len = len;
|
||||
s->async_buf = scsi_req_get_buf(req);
|
||||
@@ -342,7 +347,7 @@ static void handle_ti(ESPState *s)
|
||||
s->dma_counter = dmalen;
|
||||
|
||||
if (s->do_cmd)
|
||||
minlen = (dmalen < 32) ? dmalen : 32;
|
||||
minlen = (dmalen < ESP_CMDBUF_SZ) ? dmalen : ESP_CMDBUF_SZ;
|
||||
else if (s->ti_size < 0)
|
||||
minlen = (dmalen < -s->ti_size) ? dmalen : -s->ti_size;
|
||||
else
|
||||
@@ -352,13 +357,13 @@ static void handle_ti(ESPState *s)
|
||||
s->dma_left = minlen;
|
||||
s->rregs[ESP_RSTAT] &= ~STAT_TC;
|
||||
esp_do_dma(s);
|
||||
} else if (s->do_cmd) {
|
||||
}
|
||||
if (s->do_cmd) {
|
||||
trace_esp_handle_ti_cmd(s->cmdlen);
|
||||
s->ti_size = 0;
|
||||
s->cmdlen = 0;
|
||||
s->do_cmd = 0;
|
||||
do_cmd(s, s->cmdbuf);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -397,19 +402,17 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
|
||||
trace_esp_mem_readb(saddr, s->rregs[saddr]);
|
||||
switch (saddr) {
|
||||
case ESP_FIFO:
|
||||
if (s->ti_size > 0) {
|
||||
if ((s->rregs[ESP_RSTAT] & STAT_PIO_MASK) == 0) {
|
||||
/* Data out. */
|
||||
qemu_log_mask(LOG_UNIMP, "esp: PIO data read not implemented\n");
|
||||
s->rregs[ESP_FIFO] = 0;
|
||||
esp_raise_irq(s);
|
||||
} else if (s->ti_rptr < s->ti_wptr) {
|
||||
s->ti_size--;
|
||||
if ((s->rregs[ESP_RSTAT] & STAT_PIO_MASK) == 0) {
|
||||
/* Data out. */
|
||||
qemu_log_mask(LOG_UNIMP,
|
||||
"esp: PIO data read not implemented\n");
|
||||
s->rregs[ESP_FIFO] = 0;
|
||||
} else {
|
||||
s->rregs[ESP_FIFO] = s->ti_buf[s->ti_rptr++];
|
||||
}
|
||||
s->rregs[ESP_FIFO] = s->ti_buf[s->ti_rptr++];
|
||||
esp_raise_irq(s);
|
||||
}
|
||||
if (s->ti_size == 0) {
|
||||
if (s->ti_rptr == s->ti_wptr) {
|
||||
s->ti_rptr = 0;
|
||||
s->ti_wptr = 0;
|
||||
}
|
||||
@@ -448,8 +451,12 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
|
||||
break;
|
||||
case ESP_FIFO:
|
||||
if (s->do_cmd) {
|
||||
s->cmdbuf[s->cmdlen++] = val & 0xff;
|
||||
} else if (s->ti_size == TI_BUFSZ - 1) {
|
||||
if (s->cmdlen < ESP_CMDBUF_SZ) {
|
||||
s->cmdbuf[s->cmdlen++] = val & 0xff;
|
||||
} else {
|
||||
trace_esp_error_fifo_overrun();
|
||||
}
|
||||
} else if (s->ti_wptr == TI_BUFSZ - 1) {
|
||||
trace_esp_error_fifo_overrun();
|
||||
} else {
|
||||
s->ti_size++;
|
||||
|
||||
+5
-2
@@ -650,7 +650,9 @@ static int megasas_init_firmware(MegasasState *s, MegasasCmd *cmd)
|
||||
pa_hi = le32_to_cpu(initq->pi_addr_hi);
|
||||
s->producer_pa = ((uint64_t) pa_hi << 32) | pa_lo;
|
||||
s->reply_queue_head = ldl_le_pci_dma(pcid, s->producer_pa);
|
||||
s->reply_queue_head %= MEGASAS_MAX_FRAMES;
|
||||
s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa);
|
||||
s->reply_queue_tail %= MEGASAS_MAX_FRAMES;
|
||||
flags = le32_to_cpu(initq->flags);
|
||||
if (flags & MFI_QUEUE_FLAG_CONTEXT64) {
|
||||
s->flags |= MEGASAS_MASK_USE_QUEUE64;
|
||||
@@ -771,6 +773,7 @@ static int megasas_ctrl_get_info(MegasasState *s, MegasasCmd *cmd)
|
||||
|
||||
ptr = memory_region_get_ram_ptr(&pci_dev->rom);
|
||||
memcpy(biosver, ptr + 0x41, 31);
|
||||
biosver[31] = 0;
|
||||
memcpy(info.image_component[1].name, "BIOS", 4);
|
||||
memcpy(info.image_component[1].version, biosver,
|
||||
strlen((const char *)biosver));
|
||||
@@ -1293,7 +1296,7 @@ static int megasas_dcmd_ld_get_info(MegasasState *s, MegasasCmd *cmd)
|
||||
|
||||
static int megasas_dcmd_cfg_read(MegasasState *s, MegasasCmd *cmd)
|
||||
{
|
||||
uint8_t data[4096];
|
||||
uint8_t data[4096] = { 0 };
|
||||
struct mfi_config_data *info;
|
||||
int num_pd_disks = 0, array_offset, ld_offset;
|
||||
BusChild *kid;
|
||||
@@ -1446,7 +1449,7 @@ static int megasas_dcmd_set_properties(MegasasState *s, MegasasCmd *cmd)
|
||||
dcmd_size);
|
||||
return MFI_STAT_INVALID_PARAMETER;
|
||||
}
|
||||
dma_buf_write((uint8_t *)&info, cmd->iov_size, &cmd->qsg);
|
||||
dma_buf_write((uint8_t *)&info, dcmd_size, &cmd->qsg);
|
||||
trace_megasas_dcmd_unsupported(cmd->index, cmd->iov_size);
|
||||
return MFI_STAT_OK;
|
||||
}
|
||||
|
||||
+4
-5
@@ -754,11 +754,6 @@ static void mptsas_fetch_request(MPTSASState *s)
|
||||
hwaddr addr;
|
||||
int size;
|
||||
|
||||
if (s->state != MPI_IOC_STATE_OPERATIONAL) {
|
||||
mptsas_set_fault(s, MPI_IOCSTATUS_INVALID_STATE);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Read the message header from the guest first. */
|
||||
addr = s->host_mfa_high_addr | MPTSAS_FIFO_GET(s, request_post);
|
||||
pci_dma_read(pci, addr, req, sizeof(hdr));
|
||||
@@ -789,6 +784,10 @@ static void mptsas_fetch_requests(void *opaque)
|
||||
{
|
||||
MPTSASState *s = opaque;
|
||||
|
||||
if (s->state != MPI_IOC_STATE_OPERATIONAL) {
|
||||
mptsas_set_fault(s, MPI_IOCSTATUS_INVALID_STATE);
|
||||
return;
|
||||
}
|
||||
while (!MPTSAS_FIFO_EMPTY(s, request_post)) {
|
||||
mptsas_fetch_request(s);
|
||||
}
|
||||
|
||||
@@ -222,6 +222,19 @@ static void scsi_read_complete(void * opaque, int ret)
|
||||
r->buf[3] |= 0x80;
|
||||
}
|
||||
}
|
||||
if (s->type == TYPE_DISK &&
|
||||
r->req.cmd.buf[0] == INQUIRY &&
|
||||
r->req.cmd.buf[2] == 0xb0) {
|
||||
uint32_t max_xfer_len = blk_get_max_transfer_length(s->conf.blk) /
|
||||
(s->blocksize / BDRV_SECTOR_SIZE);
|
||||
if (max_xfer_len) {
|
||||
stl_be_p(&r->buf[8], max_xfer_len);
|
||||
/* Also take care of the opt xfer len. */
|
||||
if (ldl_be_p(&r->buf[12]) > max_xfer_len) {
|
||||
stl_be_p(&r->buf[12], max_xfer_len);
|
||||
}
|
||||
}
|
||||
}
|
||||
scsi_req_data(&r->req, len);
|
||||
scsi_req_unref(&r->req);
|
||||
}
|
||||
|
||||
@@ -698,7 +698,7 @@ static void vscsi_inquiry_no_target(VSCSIState *s, vscsi_req *req)
|
||||
uint8_t resp_data[36];
|
||||
int rc, len, alen;
|
||||
|
||||
/* We dont do EVPD. Also check that page_code is 0 */
|
||||
/* We don't do EVPD. Also check that page_code is 0 */
|
||||
if ((cdb[1] & 0x01) || cdb[2] != 0) {
|
||||
/* Send INVALID FIELD IN CDB */
|
||||
vscsi_makeup_sense(s, req, ILLEGAL_REQUEST, 0x24, 0);
|
||||
|
||||
+21
-5
@@ -63,7 +63,7 @@ typedef struct PVSCSIClass {
|
||||
#define PVSCSI_DEVICE_GET_CLASS(obj) \
|
||||
OBJECT_GET_CLASS(PVSCSIClass, (obj), TYPE_PVSCSI)
|
||||
|
||||
/* Compatability flags for migration */
|
||||
/* Compatibility flags for migration */
|
||||
#define PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT 0
|
||||
#define PVSCSI_COMPAT_OLD_PCI_CONFIGURATION \
|
||||
(1 << PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT)
|
||||
@@ -153,7 +153,7 @@ pvscsi_log2(uint32_t input)
|
||||
return log;
|
||||
}
|
||||
|
||||
static void
|
||||
static int
|
||||
pvscsi_ring_init_data(PVSCSIRingInfo *m, PVSCSICmdDescSetupRings *ri)
|
||||
{
|
||||
int i;
|
||||
@@ -161,6 +161,10 @@ pvscsi_ring_init_data(PVSCSIRingInfo *m, PVSCSICmdDescSetupRings *ri)
|
||||
uint32_t req_ring_size, cmp_ring_size;
|
||||
m->rs_pa = ri->ringsStatePPN << VMW_PAGE_SHIFT;
|
||||
|
||||
if ((ri->reqRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGES)
|
||||
|| (ri->cmpRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGES)) {
|
||||
return -1;
|
||||
}
|
||||
req_ring_size = ri->reqRingNumPages * PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE;
|
||||
cmp_ring_size = ri->cmpRingNumPages * PVSCSI_MAX_NUM_CMP_ENTRIES_PER_PAGE;
|
||||
txr_len_log2 = pvscsi_log2(req_ring_size - 1);
|
||||
@@ -192,15 +196,20 @@ pvscsi_ring_init_data(PVSCSIRingInfo *m, PVSCSICmdDescSetupRings *ri)
|
||||
|
||||
/* Flush ring state page changes */
|
||||
smp_wmb();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
static int
|
||||
pvscsi_ring_init_msg(PVSCSIRingInfo *m, PVSCSICmdDescSetupMsgRing *ri)
|
||||
{
|
||||
int i;
|
||||
uint32_t len_log2;
|
||||
uint32_t ring_size;
|
||||
|
||||
if (ri->numPages > PVSCSI_SETUP_MSG_RING_MAX_NUM_PAGES) {
|
||||
return -1;
|
||||
}
|
||||
ring_size = ri->numPages * PVSCSI_MAX_NUM_MSG_ENTRIES_PER_PAGE;
|
||||
len_log2 = pvscsi_log2(ring_size - 1);
|
||||
|
||||
@@ -220,6 +229,8 @@ pvscsi_ring_init_msg(PVSCSIRingInfo *m, PVSCSICmdDescSetupMsgRing *ri)
|
||||
|
||||
/* Flush ring state page changes */
|
||||
smp_wmb();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -770,7 +781,10 @@ pvscsi_on_cmd_setup_rings(PVSCSIState *s)
|
||||
trace_pvscsi_on_cmd_arrived("PVSCSI_CMD_SETUP_RINGS");
|
||||
|
||||
pvscsi_dbg_dump_tx_rings_config(rc);
|
||||
pvscsi_ring_init_data(&s->rings, rc);
|
||||
if (pvscsi_ring_init_data(&s->rings, rc) < 0) {
|
||||
return PVSCSI_COMMAND_PROCESSING_FAILED;
|
||||
}
|
||||
|
||||
s->rings_info_valid = TRUE;
|
||||
return PVSCSI_COMMAND_PROCESSING_SUCCEEDED;
|
||||
}
|
||||
@@ -850,7 +864,9 @@ pvscsi_on_cmd_setup_msg_ring(PVSCSIState *s)
|
||||
}
|
||||
|
||||
if (s->rings_info_valid) {
|
||||
pvscsi_ring_init_msg(&s->rings, rc);
|
||||
if (pvscsi_ring_init_msg(&s->rings, rc) < 0) {
|
||||
return PVSCSI_COMMAND_PROCESSING_FAILED;
|
||||
}
|
||||
s->msg_ring_info_valid = TRUE;
|
||||
}
|
||||
return sizeof(PVSCSICmdDescSetupMsgRing) / sizeof(uint32_t);
|
||||
|
||||
+1
-1
@@ -184,7 +184,7 @@ static void a9_gtimer_write(void *opaque, hwaddr addr, uint64_t value,
|
||||
case R_COUNTER_LO:
|
||||
/*
|
||||
* Keep it simple - ARM docco explicitly says to disable timer before
|
||||
* modding it, so dont bother trying to do all the difficult on the fly
|
||||
* modding it, so don't bother trying to do all the difficult on the fly
|
||||
* timer modifications - (if they even work in real hardware??).
|
||||
*/
|
||||
if (s->control & R_CONTROL_TIMER_ENABLE) {
|
||||
|
||||
@@ -187,7 +187,7 @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg,
|
||||
}
|
||||
|
||||
/* Control register operations are broken out into helpers that can be
|
||||
* explictly called on aspeed_timer_reset(), but also from
|
||||
* explicitly called on aspeed_timer_reset(), but also from
|
||||
* aspeed_timer_ctrl_op().
|
||||
*/
|
||||
|
||||
@@ -380,7 +380,7 @@ static void aspeed_timer_reset(DeviceState *dev)
|
||||
|
||||
for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
|
||||
AspeedTimer *t = &s->timers[i];
|
||||
/* Explictly call helpers to avoid any conditional behaviour through
|
||||
/* Explicitly call helpers to avoid any conditional behaviour through
|
||||
* aspeed_timer_set_ctrl().
|
||||
*/
|
||||
aspeed_timer_ctrl_enable(t, false);
|
||||
|
||||
@@ -1848,6 +1848,12 @@ static void usb_ohci_init(OHCIState *ohci, DeviceState *dev,
|
||||
|
||||
ohci->as = as;
|
||||
|
||||
if (num_ports > OHCI_MAX_PORTS) {
|
||||
error_setg(errp, "OHCI num-ports=%d is too big (limit is %d ports)",
|
||||
num_ports, OHCI_MAX_PORTS);
|
||||
return;
|
||||
}
|
||||
|
||||
if (usb_frame_time == 0) {
|
||||
#ifdef OHCI_TIME_WARP
|
||||
usb_frame_time = NANOSECONDS_PER_SECOND;
|
||||
|
||||
+4
-1
@@ -1531,7 +1531,10 @@ static TRBCCode xhci_disable_ep(XHCIState *xhci, unsigned int slotid,
|
||||
usb_packet_cleanup(&epctx->transfers[i].packet);
|
||||
}
|
||||
|
||||
xhci_set_ep_state(xhci, epctx, NULL, EP_DISABLED);
|
||||
/* only touch guest RAM if we're not resetting the HC */
|
||||
if (xhci->dcbaap_low || xhci->dcbaap_high) {
|
||||
xhci_set_ep_state(xhci, epctx, NULL, EP_DISABLED);
|
||||
}
|
||||
|
||||
timer_free(epctx->kick_timer);
|
||||
g_free(epctx);
|
||||
|
||||
+1
-1
@@ -1147,7 +1147,7 @@ static int vfio_eeh_container_op(VFIOContainer *container, uint32_t op)
|
||||
return -errno;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static VFIOContainer *vfio_eeh_as_container(AddressSpace *as)
|
||||
|
||||
@@ -315,7 +315,7 @@ static void vfio_probe_ati_bar4_quirk(VFIOPCIDevice *vdev, int nr)
|
||||
|
||||
/* This windows doesn't seem to be used except by legacy VGA code */
|
||||
if (!vfio_pci_is(vdev, PCI_VENDOR_ID_ATI, PCI_ANY_ID) ||
|
||||
!vdev->has_vga || nr != 4) {
|
||||
!vdev->vga || nr != 4) {
|
||||
return;
|
||||
}
|
||||
|
||||
@@ -363,7 +363,7 @@ static void vfio_probe_ati_bar2_quirk(VFIOPCIDevice *vdev, int nr)
|
||||
|
||||
/* Only enable on newer devices where BAR2 is 64bit */
|
||||
if (!vfio_pci_is(vdev, PCI_VENDOR_ID_ATI, PCI_ANY_ID) ||
|
||||
!vdev->has_vga || nr != 2 || !vdev->bars[2].mem64) {
|
||||
!vdev->vga || nr != 2 || !vdev->bars[2].mem64) {
|
||||
return;
|
||||
}
|
||||
|
||||
@@ -657,7 +657,7 @@ static void vfio_probe_nvidia_bar5_quirk(VFIOPCIDevice *vdev, int nr)
|
||||
VFIOConfigWindowQuirk *window;
|
||||
|
||||
if (!vfio_pci_is(vdev, PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID) ||
|
||||
!vdev->has_vga || nr != 5) {
|
||||
!vdev->vga || nr != 5) {
|
||||
return;
|
||||
}
|
||||
|
||||
@@ -773,7 +773,7 @@ static void vfio_probe_nvidia_bar0_quirk(VFIOPCIDevice *vdev, int nr)
|
||||
QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next);
|
||||
|
||||
/* The 0x1800 offset mirror only seems to get used by legacy VGA */
|
||||
if (vdev->has_vga) {
|
||||
if (vdev->vga) {
|
||||
quirk = g_malloc0(sizeof(*quirk));
|
||||
mirror = quirk->data = g_malloc0(sizeof(*mirror));
|
||||
mirror->mem = quirk->mem = g_new0(MemoryRegion, 1);
|
||||
|
||||
@@ -130,7 +130,6 @@ typedef struct VFIOPCIDevice {
|
||||
#define VFIO_FEATURE_ENABLE_REQ (1 << VFIO_FEATURE_ENABLE_REQ_BIT)
|
||||
int32_t bootindex;
|
||||
uint8_t pm_cap;
|
||||
bool has_vga;
|
||||
bool pci_aer;
|
||||
bool req_enabled;
|
||||
bool has_flr;
|
||||
|
||||
@@ -561,6 +561,11 @@ void *virtqueue_pop(VirtQueue *vq, size_t sz)
|
||||
|
||||
max = vq->vring.num;
|
||||
|
||||
if (vq->inuse >= vq->vring.num) {
|
||||
error_report("Virtqueue size exceeded");
|
||||
exit(1);
|
||||
}
|
||||
|
||||
i = head = virtqueue_get_head(vq, vq->last_avail_idx++);
|
||||
if (virtio_vdev_has_feature(vdev, VIRTIO_RING_F_EVENT_IDX)) {
|
||||
vring_set_avail_event(vq, vq->last_avail_idx);
|
||||
@@ -1506,6 +1511,16 @@ int virtio_load(VirtIODevice *vdev, QEMUFile *f, int version_id)
|
||||
}
|
||||
qemu_get_be32s(f, &features);
|
||||
|
||||
/*
|
||||
* Temporarily set guest_features low bits - needed by
|
||||
* virtio net load code testing for VIRTIO_NET_F_CTRL_GUEST_OFFLOADS
|
||||
* VIRTIO_NET_F_GUEST_ANNOUNCE and VIRTIO_NET_F_CTRL_VQ.
|
||||
*
|
||||
* Note: devices should always test host features in future - don't create
|
||||
* new dependencies like this.
|
||||
*/
|
||||
vdev->guest_features = features;
|
||||
|
||||
config_len = qemu_get_be32(f);
|
||||
|
||||
/*
|
||||
|
||||
+1
-1
@@ -842,7 +842,7 @@ static void xen_pt_realize(PCIDevice *d, Error **errp)
|
||||
goto err_out;
|
||||
}
|
||||
if (!scratch) {
|
||||
error_setg(errp, "no pin interrupt");
|
||||
XEN_PT_LOG(d, "no pin interrupt\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
|
||||
+4
-3
@@ -76,6 +76,7 @@ enum {
|
||||
|
||||
/* Maximum size of a single READ/WRITE data buffer */
|
||||
#define NBD_MAX_BUFFER_SIZE (32 * 1024 * 1024)
|
||||
#define NBD_MAX_SECTORS (NBD_MAX_BUFFER_SIZE / BDRV_SECTOR_SIZE)
|
||||
|
||||
ssize_t nbd_wr_syncv(QIOChannel *ioc,
|
||||
struct iovec *iov,
|
||||
@@ -83,11 +84,11 @@ ssize_t nbd_wr_syncv(QIOChannel *ioc,
|
||||
size_t offset,
|
||||
size_t length,
|
||||
bool do_read);
|
||||
int nbd_receive_negotiate(QIOChannel *ioc, const char *name, uint32_t *flags,
|
||||
int nbd_receive_negotiate(QIOChannel *ioc, const char *name, uint16_t *flags,
|
||||
QCryptoTLSCreds *tlscreds, const char *hostname,
|
||||
QIOChannel **outioc,
|
||||
off_t *size, Error **errp);
|
||||
int nbd_init(int fd, QIOChannelSocket *sioc, uint32_t flags, off_t size);
|
||||
int nbd_init(int fd, QIOChannelSocket *sioc, uint16_t flags, off_t size);
|
||||
ssize_t nbd_send_request(QIOChannel *ioc, struct nbd_request *request);
|
||||
ssize_t nbd_receive_reply(QIOChannel *ioc, struct nbd_reply *reply);
|
||||
int nbd_client(int fd);
|
||||
@@ -97,7 +98,7 @@ typedef struct NBDExport NBDExport;
|
||||
typedef struct NBDClient NBDClient;
|
||||
|
||||
NBDExport *nbd_export_new(BlockBackend *blk, off_t dev_offset, off_t size,
|
||||
uint32_t nbdflags, void (*close)(NBDExport *),
|
||||
uint16_t nbdflags, void (*close)(NBDExport *),
|
||||
Error **errp);
|
||||
void nbd_export_close(NBDExport *exp);
|
||||
void nbd_export_get(NBDExport *exp);
|
||||
|
||||
@@ -34,7 +34,7 @@
|
||||
* Fill @buf with @buflen bytes of cryptographically strong
|
||||
* random data
|
||||
*
|
||||
* Returns 0 on sucess, -1 on error
|
||||
* Returns 0 on success, -1 on error
|
||||
*/
|
||||
int qcrypto_random_bytes(uint8_t *buf,
|
||||
size_t buflen,
|
||||
|
||||
@@ -73,6 +73,10 @@
|
||||
.driver = "virtio-rng-pci",\
|
||||
.property = "any_layout",\
|
||||
.value = "off",\
|
||||
},{\
|
||||
.driver = TYPE_PCI_DEVICE,\
|
||||
.property = "x-pcie-lnksta-dllla",\
|
||||
.value = "off",\
|
||||
},
|
||||
|
||||
#define HW_COMPAT_2_2 \
|
||||
|
||||
@@ -173,6 +173,9 @@ enum {
|
||||
/* PCI Express capability - Power Controller Present */
|
||||
#define QEMU_PCIE_SLTCAP_PCP_BITNR 7
|
||||
QEMU_PCIE_SLTCAP_PCP = (1 << QEMU_PCIE_SLTCAP_PCP_BITNR),
|
||||
/* Link active status in endpoint capability is always set */
|
||||
#define QEMU_PCIE_LNKSTA_DLLLA_BITNR 8
|
||||
QEMU_PCIE_LNKSTA_DLLLA = (1 << QEMU_PCIE_LNKSTA_DLLLA_BITNR),
|
||||
};
|
||||
|
||||
#define TYPE_PCI_DEVICE "pci-device"
|
||||
|
||||
@@ -14,6 +14,7 @@ void esp_init(hwaddr espaddr, int it_shift,
|
||||
|
||||
#define ESP_REGS 16
|
||||
#define TI_BUFSZ 16
|
||||
#define ESP_CMDBUF_SZ 32
|
||||
|
||||
typedef struct ESPState ESPState;
|
||||
|
||||
@@ -31,7 +32,7 @@ struct ESPState {
|
||||
SCSIBus bus;
|
||||
SCSIDevice *current_dev;
|
||||
SCSIRequest *current_req;
|
||||
uint8_t cmdbuf[TI_BUFSZ];
|
||||
uint8_t cmdbuf[ESP_CMDBUF_SZ];
|
||||
uint32_t cmdlen;
|
||||
uint32_t do_cmd;
|
||||
|
||||
|
||||
@@ -26,7 +26,7 @@
|
||||
* We don't support Xen prior to 4.2.0.
|
||||
*/
|
||||
|
||||
/* Xen 4.2 thru 4.6 */
|
||||
/* Xen 4.2 through 4.6 */
|
||||
#if CONFIG_XEN_CTRL_INTERFACE_VERSION < 471
|
||||
|
||||
typedef xc_interface xenforeignmemory_handle;
|
||||
|
||||
+1
-1
@@ -219,7 +219,7 @@ void qio_task_run_in_thread(QIOTask *task,
|
||||
* qio_task_complete:
|
||||
* @task: the task struct
|
||||
*
|
||||
* Mark the operation as succesfully completed
|
||||
* Mark the operation as successfully completed
|
||||
* and free the memory for @task.
|
||||
*/
|
||||
void qio_task_complete(QIOTask *task);
|
||||
|
||||
@@ -210,6 +210,7 @@ int migrate_fd_close(MigrationState *s);
|
||||
void add_migration_state_change_notifier(Notifier *notify);
|
||||
void remove_migration_state_change_notifier(Notifier *notify);
|
||||
MigrationState *migrate_init(const MigrationParams *params);
|
||||
bool migration_is_blocked(Error **errp);
|
||||
bool migration_in_setup(MigrationState *);
|
||||
bool migration_has_finished(MigrationState *);
|
||||
bool migration_has_failed(MigrationState *);
|
||||
|
||||
+16
-2
@@ -149,7 +149,8 @@ extern int daemon(int, int);
|
||||
/* Minimum function that returns zero only iff both values are zero.
|
||||
* Intended for use with unsigned values only. */
|
||||
#ifndef MIN_NON_ZERO
|
||||
#define MIN_NON_ZERO(a, b) (((a) != 0 && (a) < (b)) ? (a) : (b))
|
||||
#define MIN_NON_ZERO(a, b) ((a) == 0 ? (b) : \
|
||||
((b) == 0 ? (a) : (MIN(a, b))))
|
||||
#endif
|
||||
|
||||
/* Round number down to multiple */
|
||||
@@ -247,6 +248,19 @@ void qemu_anon_ram_free(void *ptr, size_t size);
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(__linux__) && \
|
||||
(defined(__x86_64__) || defined(__arm__) || defined(__aarch64__))
|
||||
/* Use 2 MiB alignment so transparent hugepages can be used by KVM.
|
||||
Valgrind does not support alignments larger than 1 MiB,
|
||||
therefore we need special code which handles running on Valgrind. */
|
||||
# define QEMU_VMALLOC_ALIGN (512 * 4096)
|
||||
#elif defined(__linux__) && defined(__s390x__)
|
||||
/* Use 1 MiB (segment size) alignment so gmap can be used by KVM. */
|
||||
# define QEMU_VMALLOC_ALIGN (256 * 4096)
|
||||
#else
|
||||
# define QEMU_VMALLOC_ALIGN getpagesize()
|
||||
#endif
|
||||
|
||||
int qemu_madvise(void *addr, size_t len, int advice);
|
||||
|
||||
int qemu_open(const char *name, int flags, ...);
|
||||
@@ -299,7 +313,7 @@ static inline void qemu_timersub(const struct timeval *val1,
|
||||
void qemu_set_cloexec(int fd);
|
||||
|
||||
/* QEMU "hardware version" setting. Used to replace code that exposed
|
||||
* QEMU_VERSION to guests in the past and need to keep compatibilty.
|
||||
* QEMU_VERSION to guests in the past and need to keep compatibility.
|
||||
* Do not use qemu_hw_version() in new code.
|
||||
*/
|
||||
void qemu_set_hw_version(const char *);
|
||||
|
||||
@@ -71,6 +71,7 @@ typedef struct QXLCookie {
|
||||
QXLRect area;
|
||||
int redraw;
|
||||
} render;
|
||||
void *data;
|
||||
} u;
|
||||
} QXLCookie;
|
||||
|
||||
|
||||
@@ -316,14 +316,13 @@ static gboolean qio_channel_websock_handshake_io(QIOChannel *ioc,
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
object_ref(OBJECT(task));
|
||||
trace_qio_channel_websock_handshake_reply(ioc);
|
||||
qio_channel_add_watch(
|
||||
wioc->master,
|
||||
G_IO_OUT,
|
||||
qio_channel_websock_handshake_send,
|
||||
task,
|
||||
(GDestroyNotify)object_unref);
|
||||
NULL);
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
|
||||
@@ -413,7 +413,7 @@ static int kvm_physical_sync_dirty_bitmap(KVMMemoryListener *kml,
|
||||
* userspace memory corruption (which is not detectable by valgrind
|
||||
* too, in most cases).
|
||||
* So for now, let's align to 64 instead of HOST_LONG_BITS here, in
|
||||
* a hope that sizeof(long) wont become >8 any time soon.
|
||||
* a hope that sizeof(long) won't become >8 any time soon.
|
||||
*/
|
||||
size = ALIGN(((mem->memory_size) >> TARGET_PAGE_BITS),
|
||||
/*HOST_LONG_BITS*/ 64) / 8;
|
||||
|
||||
+31
-9
@@ -278,7 +278,7 @@ static void deferred_incoming_migration(Error **errp)
|
||||
void migrate_send_rp_req_pages(MigrationIncomingState *mis, const char *rbname,
|
||||
ram_addr_t start, size_t len)
|
||||
{
|
||||
uint8_t bufc[12 + 1 + 255]; /* start (8), len (4), rbname upto 256 */
|
||||
uint8_t bufc[12 + 1 + 255]; /* start (8), len (4), rbname up to 256 */
|
||||
size_t msglen = 12; /* start + len */
|
||||
|
||||
*(uint64_t *)bufc = cpu_to_be64((uint64_t)start);
|
||||
@@ -992,6 +992,20 @@ void qmp_migrate_incoming(const char *uri, Error **errp)
|
||||
once = false;
|
||||
}
|
||||
|
||||
bool migration_is_blocked(Error **errp)
|
||||
{
|
||||
if (qemu_savevm_state_blocked(errp)) {
|
||||
return true;
|
||||
}
|
||||
|
||||
if (migration_blockers) {
|
||||
*errp = error_copy(migration_blockers->data);
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
void qmp_migrate(const char *uri, bool has_blk, bool blk,
|
||||
bool has_inc, bool inc, bool has_detach, bool detach,
|
||||
Error **errp)
|
||||
@@ -1014,12 +1028,7 @@ void qmp_migrate(const char *uri, bool has_blk, bool blk,
|
||||
return;
|
||||
}
|
||||
|
||||
if (qemu_savevm_state_blocked(errp)) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (migration_blockers) {
|
||||
*errp = error_copy(migration_blockers->data);
|
||||
if (migration_is_blocked(errp)) {
|
||||
return;
|
||||
}
|
||||
|
||||
@@ -1597,19 +1606,32 @@ static void migration_completion(MigrationState *s, int current_active_state,
|
||||
rp_error = await_return_path_close_on_source(s);
|
||||
trace_migration_completion_postcopy_end_after_rp(rp_error);
|
||||
if (rp_error) {
|
||||
goto fail;
|
||||
goto fail_invalidate;
|
||||
}
|
||||
}
|
||||
|
||||
if (qemu_file_get_error(s->to_dst_file)) {
|
||||
trace_migration_completion_file_err();
|
||||
goto fail;
|
||||
goto fail_invalidate;
|
||||
}
|
||||
|
||||
migrate_set_state(&s->state, current_active_state,
|
||||
MIGRATION_STATUS_COMPLETED);
|
||||
return;
|
||||
|
||||
fail_invalidate:
|
||||
/* If not doing postcopy, vm_start() will be called: let's regain
|
||||
* control on images.
|
||||
*/
|
||||
if (s->state == MIGRATION_STATUS_ACTIVE) {
|
||||
Error *local_err = NULL;
|
||||
|
||||
bdrv_invalidate_cache_all(&local_err);
|
||||
if (local_err) {
|
||||
error_report_err(local_err);
|
||||
}
|
||||
}
|
||||
|
||||
fail:
|
||||
migrate_set_state(&s->state, current_active_state,
|
||||
MIGRATION_STATUS_FAILED);
|
||||
|
||||
+1
-1
@@ -1272,7 +1272,7 @@ static int ram_save_target_page(MigrationState *ms, QEMUFile *f,
|
||||
}
|
||||
|
||||
/**
|
||||
* ram_save_host_page: Starting at *offset send pages upto the end
|
||||
* ram_save_host_page: Starting at *offset send pages up to the end
|
||||
* of the current host page. It's valid for the initial
|
||||
* offset to point into the middle of a host page
|
||||
* in which case the remainder of the hostpage is sent.
|
||||
|
||||
+1
-1
@@ -1169,7 +1169,7 @@ static int qemu_savevm_state(QEMUFile *f, Error **errp)
|
||||
MigrationState *ms = migrate_init(¶ms);
|
||||
ms->to_dst_file = f;
|
||||
|
||||
if (qemu_savevm_state_blocked(errp)) {
|
||||
if (migration_is_blocked(errp)) {
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
||||
+39
-34
@@ -109,25 +109,27 @@ static int nbd_handle_reply_err(QIOChannel *ioc, uint32_t opt, uint32_t type,
|
||||
|
||||
switch (type) {
|
||||
case NBD_REP_ERR_UNSUP:
|
||||
TRACE("server doesn't understand request %d, attempting fallback",
|
||||
opt);
|
||||
TRACE("server doesn't understand request %" PRIx32
|
||||
", attempting fallback", opt);
|
||||
result = 0;
|
||||
goto cleanup;
|
||||
|
||||
case NBD_REP_ERR_POLICY:
|
||||
error_setg(errp, "Denied by server for option %x", opt);
|
||||
error_setg(errp, "Denied by server for option %" PRIx32, opt);
|
||||
break;
|
||||
|
||||
case NBD_REP_ERR_INVALID:
|
||||
error_setg(errp, "Invalid data length for option %x", opt);
|
||||
error_setg(errp, "Invalid data length for option %" PRIx32, opt);
|
||||
break;
|
||||
|
||||
case NBD_REP_ERR_TLS_REQD:
|
||||
error_setg(errp, "TLS negotiation required before option %x", opt);
|
||||
error_setg(errp, "TLS negotiation required before option %" PRIx32,
|
||||
opt);
|
||||
break;
|
||||
|
||||
default:
|
||||
error_setg(errp, "Unknown error code when asking for option %x", opt);
|
||||
error_setg(errp, "Unknown error code when asking for option %" PRIx32,
|
||||
opt);
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -165,7 +167,7 @@ static int nbd_receive_list(QIOChannel *ioc, char **name, Error **errp)
|
||||
}
|
||||
opt = be32_to_cpu(opt);
|
||||
if (opt != NBD_OPT_LIST) {
|
||||
error_setg(errp, "Unexpected option type %x expected %x",
|
||||
error_setg(errp, "Unexpected option type %" PRIx32 " expected %x",
|
||||
opt, NBD_OPT_LIST);
|
||||
return -1;
|
||||
}
|
||||
@@ -207,7 +209,7 @@ static int nbd_receive_list(QIOChannel *ioc, char **name, Error **errp)
|
||||
return -1;
|
||||
}
|
||||
if (namelen > 255) {
|
||||
error_setg(errp, "export name length too long %d", namelen);
|
||||
error_setg(errp, "export name length too long %" PRIu32, namelen);
|
||||
return -1;
|
||||
}
|
||||
|
||||
@@ -234,7 +236,7 @@ static int nbd_receive_list(QIOChannel *ioc, char **name, Error **errp)
|
||||
g_free(buf);
|
||||
}
|
||||
} else {
|
||||
error_setg(errp, "Unexpected reply type %x expected %x",
|
||||
error_setg(errp, "Unexpected reply type %" PRIx32 " expected %x",
|
||||
type, NBD_REP_SERVER);
|
||||
return -1;
|
||||
}
|
||||
@@ -349,7 +351,7 @@ static QIOChannel *nbd_receive_starttls(QIOChannel *ioc,
|
||||
}
|
||||
opt = be32_to_cpu(opt);
|
||||
if (opt != NBD_OPT_STARTTLS) {
|
||||
error_setg(errp, "Unexpected option type %x expected %x",
|
||||
error_setg(errp, "Unexpected option type %" PRIx32 " expected %x",
|
||||
opt, NBD_OPT_STARTTLS);
|
||||
return NULL;
|
||||
}
|
||||
@@ -361,7 +363,7 @@ static QIOChannel *nbd_receive_starttls(QIOChannel *ioc,
|
||||
}
|
||||
type = be32_to_cpu(type);
|
||||
if (type != NBD_REP_ACK) {
|
||||
error_setg(errp, "Server rejected request to start TLS %x",
|
||||
error_setg(errp, "Server rejected request to start TLS %" PRIx32,
|
||||
type);
|
||||
return NULL;
|
||||
}
|
||||
@@ -373,7 +375,7 @@ static QIOChannel *nbd_receive_starttls(QIOChannel *ioc,
|
||||
}
|
||||
length = be32_to_cpu(length);
|
||||
if (length != 0) {
|
||||
error_setg(errp, "Start TLS reponse was not zero %x",
|
||||
error_setg(errp, "Start TLS response was not zero %" PRIu32,
|
||||
length);
|
||||
return NULL;
|
||||
}
|
||||
@@ -384,7 +386,7 @@ static QIOChannel *nbd_receive_starttls(QIOChannel *ioc,
|
||||
return NULL;
|
||||
}
|
||||
data.loop = g_main_loop_new(g_main_context_default(), FALSE);
|
||||
TRACE("Starting TLS hanshake");
|
||||
TRACE("Starting TLS handshake");
|
||||
qio_channel_tls_handshake(tioc,
|
||||
nbd_tls_handshake,
|
||||
&data,
|
||||
@@ -404,7 +406,7 @@ static QIOChannel *nbd_receive_starttls(QIOChannel *ioc,
|
||||
}
|
||||
|
||||
|
||||
int nbd_receive_negotiate(QIOChannel *ioc, const char *name, uint32_t *flags,
|
||||
int nbd_receive_negotiate(QIOChannel *ioc, const char *name, uint16_t *flags,
|
||||
QCryptoTLSCreds *tlscreds, const char *hostname,
|
||||
QIOChannel **outioc,
|
||||
off_t *size, Error **errp)
|
||||
@@ -464,7 +466,6 @@ int nbd_receive_negotiate(QIOChannel *ioc, const char *name, uint32_t *flags,
|
||||
uint32_t opt;
|
||||
uint32_t namesize;
|
||||
uint16_t globalflags;
|
||||
uint16_t exportflags;
|
||||
bool fixedNewStyle = false;
|
||||
|
||||
if (read_sync(ioc, &globalflags, sizeof(globalflags)) !=
|
||||
@@ -473,8 +474,7 @@ int nbd_receive_negotiate(QIOChannel *ioc, const char *name, uint32_t *flags,
|
||||
goto fail;
|
||||
}
|
||||
globalflags = be16_to_cpu(globalflags);
|
||||
*flags = globalflags << 16;
|
||||
TRACE("Global flags are %x", globalflags);
|
||||
TRACE("Global flags are %" PRIx32, globalflags);
|
||||
if (globalflags & NBD_FLAG_FIXED_NEWSTYLE) {
|
||||
fixedNewStyle = true;
|
||||
TRACE("Server supports fixed new style");
|
||||
@@ -541,17 +541,15 @@ int nbd_receive_negotiate(QIOChannel *ioc, const char *name, uint32_t *flags,
|
||||
goto fail;
|
||||
}
|
||||
*size = be64_to_cpu(s);
|
||||
TRACE("Size is %" PRIu64, *size);
|
||||
|
||||
if (read_sync(ioc, &exportflags, sizeof(exportflags)) !=
|
||||
sizeof(exportflags)) {
|
||||
if (read_sync(ioc, flags, sizeof(*flags)) != sizeof(*flags)) {
|
||||
error_setg(errp, "Failed to read export flags");
|
||||
goto fail;
|
||||
}
|
||||
exportflags = be16_to_cpu(exportflags);
|
||||
*flags |= exportflags;
|
||||
TRACE("Export flags are %x", exportflags);
|
||||
be16_to_cpus(flags);
|
||||
} else if (magic == NBD_CLIENT_MAGIC) {
|
||||
uint32_t oldflags;
|
||||
|
||||
if (name) {
|
||||
error_setg(errp, "Server does not support export names");
|
||||
goto fail;
|
||||
@@ -568,16 +566,22 @@ int nbd_receive_negotiate(QIOChannel *ioc, const char *name, uint32_t *flags,
|
||||
*size = be64_to_cpu(s);
|
||||
TRACE("Size is %" PRIu64, *size);
|
||||
|
||||
if (read_sync(ioc, flags, sizeof(*flags)) != sizeof(*flags)) {
|
||||
if (read_sync(ioc, &oldflags, sizeof(oldflags)) != sizeof(oldflags)) {
|
||||
error_setg(errp, "Failed to read export flags");
|
||||
goto fail;
|
||||
}
|
||||
*flags = be32_to_cpup(flags);
|
||||
be32_to_cpus(&oldflags);
|
||||
if (oldflags & ~0xffff) {
|
||||
error_setg(errp, "Unexpected export flags %0x" PRIx32, oldflags);
|
||||
goto fail;
|
||||
}
|
||||
*flags = oldflags;
|
||||
} else {
|
||||
error_setg(errp, "Bad magic received");
|
||||
goto fail;
|
||||
}
|
||||
|
||||
TRACE("Size is %" PRIu64 ", export flags %" PRIx16, *size, *flags);
|
||||
if (read_sync(ioc, &buf, 124) != 124) {
|
||||
error_setg(errp, "Failed to read reserved block");
|
||||
goto fail;
|
||||
@@ -589,7 +593,7 @@ fail:
|
||||
}
|
||||
|
||||
#ifdef __linux__
|
||||
int nbd_init(int fd, QIOChannelSocket *sioc, uint32_t flags, off_t size)
|
||||
int nbd_init(int fd, QIOChannelSocket *sioc, uint16_t flags, off_t size)
|
||||
{
|
||||
TRACE("Setting NBD socket");
|
||||
|
||||
@@ -666,7 +670,7 @@ int nbd_client(int fd)
|
||||
return ret;
|
||||
}
|
||||
#else
|
||||
int nbd_init(int fd, QIOChannelSocket *ioc, uint32_t flags, off_t size)
|
||||
int nbd_init(int fd, QIOChannelSocket *ioc, uint16_t flags, off_t size)
|
||||
{
|
||||
return -ENOTSUP;
|
||||
}
|
||||
@@ -683,7 +687,8 @@ ssize_t nbd_send_request(QIOChannel *ioc, struct nbd_request *request)
|
||||
ssize_t ret;
|
||||
|
||||
TRACE("Sending request to server: "
|
||||
"{ .from = %" PRIu64", .len = %u, .handle = %" PRIu64", .type=%i}",
|
||||
"{ .from = %" PRIu64", .len = %" PRIu32 ", .handle = %" PRIu64
|
||||
", .type=%" PRIu16 " }",
|
||||
request->from, request->len, request->handle, request->type);
|
||||
|
||||
cpu_to_be32w((uint32_t*)buf, NBD_REQUEST_MAGIC);
|
||||
@@ -726,18 +731,18 @@ ssize_t nbd_receive_reply(QIOChannel *ioc, struct nbd_reply *reply)
|
||||
[ 7 .. 15] handle
|
||||
*/
|
||||
|
||||
magic = be32_to_cpup((uint32_t*)buf);
|
||||
reply->error = be32_to_cpup((uint32_t*)(buf + 4));
|
||||
reply->handle = be64_to_cpup((uint64_t*)(buf + 8));
|
||||
magic = ldl_be_p(buf);
|
||||
reply->error = ldl_be_p(buf + 4);
|
||||
reply->handle = ldq_be_p(buf + 8);
|
||||
|
||||
reply->error = nbd_errno_to_system_errno(reply->error);
|
||||
|
||||
TRACE("Got reply: "
|
||||
"{ magic = 0x%x, .error = %d, handle = %" PRIu64" }",
|
||||
TRACE("Got reply: { magic = 0x%" PRIx32 ", .error = % " PRId32
|
||||
", handle = %" PRIu64" }",
|
||||
magic, reply->error, reply->handle);
|
||||
|
||||
if (magic != NBD_REPLY_MAGIC) {
|
||||
LOG("invalid magic (got 0x%x)", magic);
|
||||
LOG("invalid magic (got 0x%" PRIx32 ")", magic);
|
||||
return -EINVAL;
|
||||
}
|
||||
return 0;
|
||||
|
||||
+50
-38
@@ -62,7 +62,7 @@ struct NBDExport {
|
||||
char *name;
|
||||
off_t dev_offset;
|
||||
off_t size;
|
||||
uint32_t nbdflags;
|
||||
uint16_t nbdflags;
|
||||
QTAILQ_HEAD(, NBDClient) clients;
|
||||
QTAILQ_ENTRY(NBDExport) next;
|
||||
|
||||
@@ -196,7 +196,7 @@ static int nbd_negotiate_send_rep(QIOChannel *ioc, uint32_t type, uint32_t opt)
|
||||
uint64_t magic;
|
||||
uint32_t len;
|
||||
|
||||
TRACE("Reply opt=%x type=%x", type, opt);
|
||||
TRACE("Reply opt=%" PRIx32 " type=%" PRIx32, type, opt);
|
||||
|
||||
magic = cpu_to_be64(NBD_REP_MAGIC);
|
||||
if (nbd_negotiate_write(ioc, &magic, sizeof(magic)) != sizeof(magic)) {
|
||||
@@ -226,7 +226,7 @@ static int nbd_negotiate_send_rep_list(QIOChannel *ioc, NBDExport *exp)
|
||||
uint64_t magic, name_len;
|
||||
uint32_t opt, type, len;
|
||||
|
||||
TRACE("Advertizing export name '%s'", exp->name ? exp->name : "");
|
||||
TRACE("Advertising export name '%s'", exp->name ? exp->name : "");
|
||||
name_len = strlen(exp->name);
|
||||
magic = cpu_to_be64(NBD_REP_MAGIC);
|
||||
if (nbd_negotiate_write(ioc, &magic, sizeof(magic)) != sizeof(magic)) {
|
||||
@@ -392,12 +392,12 @@ static int nbd_negotiate_options(NBDClient *client)
|
||||
TRACE("Checking client flags");
|
||||
be32_to_cpus(&flags);
|
||||
if (flags & NBD_FLAG_C_FIXED_NEWSTYLE) {
|
||||
TRACE("Support supports fixed newstyle handshake");
|
||||
TRACE("Client supports fixed newstyle handshake");
|
||||
fixedNewstyle = true;
|
||||
flags &= ~NBD_FLAG_C_FIXED_NEWSTYLE;
|
||||
}
|
||||
if (flags != 0) {
|
||||
TRACE("Unknown client flags 0x%x received", flags);
|
||||
TRACE("Unknown client flags 0x%" PRIx32 " received", flags);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
@@ -431,12 +431,12 @@ static int nbd_negotiate_options(NBDClient *client)
|
||||
}
|
||||
length = be32_to_cpu(length);
|
||||
|
||||
TRACE("Checking option 0x%x", clientflags);
|
||||
TRACE("Checking option 0x%" PRIx32, clientflags);
|
||||
if (client->tlscreds &&
|
||||
client->ioc == (QIOChannel *)client->sioc) {
|
||||
QIOChannel *tioc;
|
||||
if (!fixedNewstyle) {
|
||||
TRACE("Unsupported option 0x%x", clientflags);
|
||||
TRACE("Unsupported option 0x%" PRIx32, clientflags);
|
||||
return -EINVAL;
|
||||
}
|
||||
switch (clientflags) {
|
||||
@@ -455,7 +455,8 @@ static int nbd_negotiate_options(NBDClient *client)
|
||||
return -EINVAL;
|
||||
|
||||
default:
|
||||
TRACE("Option 0x%x not permitted before TLS", clientflags);
|
||||
TRACE("Option 0x%" PRIx32 " not permitted before TLS",
|
||||
clientflags);
|
||||
if (nbd_negotiate_drop_sync(client->ioc, length) != length) {
|
||||
return -EIO;
|
||||
}
|
||||
@@ -493,7 +494,7 @@ static int nbd_negotiate_options(NBDClient *client)
|
||||
}
|
||||
break;
|
||||
default:
|
||||
TRACE("Unsupported option 0x%x", clientflags);
|
||||
TRACE("Unsupported option 0x%" PRIx32, clientflags);
|
||||
if (nbd_negotiate_drop_sync(client->ioc, length) != length) {
|
||||
return -EIO;
|
||||
}
|
||||
@@ -511,7 +512,7 @@ static int nbd_negotiate_options(NBDClient *client)
|
||||
return nbd_negotiate_handle_export_name(client, length);
|
||||
|
||||
default:
|
||||
TRACE("Unsupported option 0x%x", clientflags);
|
||||
TRACE("Unsupported option 0x%" PRIx32, clientflags);
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
@@ -528,8 +529,8 @@ static coroutine_fn int nbd_negotiate(NBDClientNewData *data)
|
||||
NBDClient *client = data->client;
|
||||
char buf[8 + 8 + 8 + 128];
|
||||
int rc;
|
||||
const int myflags = (NBD_FLAG_HAS_FLAGS | NBD_FLAG_SEND_TRIM |
|
||||
NBD_FLAG_SEND_FLUSH | NBD_FLAG_SEND_FUA);
|
||||
const uint16_t myflags = (NBD_FLAG_HAS_FLAGS | NBD_FLAG_SEND_TRIM |
|
||||
NBD_FLAG_SEND_FLUSH | NBD_FLAG_SEND_FUA);
|
||||
bool oldStyle;
|
||||
|
||||
/* Old style negotiation header without options
|
||||
@@ -559,7 +560,8 @@ static coroutine_fn int nbd_negotiate(NBDClientNewData *data)
|
||||
|
||||
oldStyle = client->exp != NULL && !client->tlscreds;
|
||||
if (oldStyle) {
|
||||
assert ((client->exp->nbdflags & ~65535) == 0);
|
||||
TRACE("advertising size %" PRIu64 " and flags %x",
|
||||
client->exp->size, client->exp->nbdflags | myflags);
|
||||
stq_be_p(buf + 8, NBD_CLIENT_MAGIC);
|
||||
stq_be_p(buf + 16, client->exp->size);
|
||||
stw_be_p(buf + 26, client->exp->nbdflags | myflags);
|
||||
@@ -588,7 +590,8 @@ static coroutine_fn int nbd_negotiate(NBDClientNewData *data)
|
||||
goto fail;
|
||||
}
|
||||
|
||||
assert ((client->exp->nbdflags & ~65535) == 0);
|
||||
TRACE("advertising size %" PRIu64 " and flags %x",
|
||||
client->exp->size, client->exp->nbdflags | myflags);
|
||||
stq_be_p(buf + 18, client->exp->size);
|
||||
stw_be_p(buf + 26, client->exp->nbdflags | myflags);
|
||||
if (nbd_negotiate_write(client->ioc, buf + 18, sizeof(buf) - 18) !=
|
||||
@@ -646,18 +649,18 @@ static ssize_t nbd_receive_request(QIOChannel *ioc, struct nbd_request *request)
|
||||
[24 .. 27] len
|
||||
*/
|
||||
|
||||
magic = be32_to_cpup((uint32_t*)buf);
|
||||
request->type = be32_to_cpup((uint32_t*)(buf + 4));
|
||||
request->handle = be64_to_cpup((uint64_t*)(buf + 8));
|
||||
request->from = be64_to_cpup((uint64_t*)(buf + 16));
|
||||
request->len = be32_to_cpup((uint32_t*)(buf + 24));
|
||||
magic = ldl_be_p(buf);
|
||||
request->type = ldl_be_p(buf + 4);
|
||||
request->handle = ldq_be_p(buf + 8);
|
||||
request->from = ldq_be_p(buf + 16);
|
||||
request->len = ldl_be_p(buf + 24);
|
||||
|
||||
TRACE("Got request: "
|
||||
"{ magic = 0x%x, .type = %d, from = %" PRIu64" , len = %u }",
|
||||
TRACE("Got request: { magic = 0x%" PRIx32 ", .type = %" PRIx32
|
||||
", from = %" PRIu64 " , len = %" PRIu32 " }",
|
||||
magic, request->type, request->from, request->len);
|
||||
|
||||
if (magic != NBD_REQUEST_MAGIC) {
|
||||
LOG("invalid magic (got 0x%x)", magic);
|
||||
LOG("invalid magic (got 0x%" PRIx32 ")", magic);
|
||||
return -EINVAL;
|
||||
}
|
||||
return 0;
|
||||
@@ -670,7 +673,8 @@ static ssize_t nbd_send_reply(QIOChannel *ioc, struct nbd_reply *reply)
|
||||
|
||||
reply->error = system_errno_to_nbd_errno(reply->error);
|
||||
|
||||
TRACE("Sending response to client: { .error = %d, handle = %" PRIu64 " }",
|
||||
TRACE("Sending response to client: { .error = %" PRId32
|
||||
", handle = %" PRIu64 " }",
|
||||
reply->error, reply->handle);
|
||||
|
||||
/* Reply
|
||||
@@ -807,7 +811,7 @@ static void nbd_eject_notifier(Notifier *n, void *data)
|
||||
}
|
||||
|
||||
NBDExport *nbd_export_new(BlockBackend *blk, off_t dev_offset, off_t size,
|
||||
uint32_t nbdflags, void (*close)(NBDExport *),
|
||||
uint16_t nbdflags, void (*close)(NBDExport *),
|
||||
Error **errp)
|
||||
{
|
||||
NBDExport *exp = g_malloc0(sizeof(NBDExport));
|
||||
@@ -999,7 +1003,7 @@ static ssize_t nbd_co_receive_request(NBDRequest *req, struct nbd_request *reque
|
||||
command = request->type & NBD_CMD_MASK_COMMAND;
|
||||
if (command == NBD_CMD_READ || command == NBD_CMD_WRITE) {
|
||||
if (request->len > NBD_MAX_BUFFER_SIZE) {
|
||||
LOG("len (%u) is larger than max len (%u)",
|
||||
LOG("len (%" PRIu32" ) is larger than max len (%u)",
|
||||
request->len, NBD_MAX_BUFFER_SIZE);
|
||||
rc = -EINVAL;
|
||||
goto out;
|
||||
@@ -1012,7 +1016,7 @@ static ssize_t nbd_co_receive_request(NBDRequest *req, struct nbd_request *reque
|
||||
}
|
||||
}
|
||||
if (command == NBD_CMD_WRITE) {
|
||||
TRACE("Reading %u byte(s)", request->len);
|
||||
TRACE("Reading %" PRIu32 " byte(s)", request->len);
|
||||
|
||||
if (read_sync(client->ioc, req->data, request->len) != request->len) {
|
||||
LOG("reading from socket failed");
|
||||
@@ -1062,10 +1066,10 @@ static void nbd_trip(void *opaque)
|
||||
}
|
||||
command = request.type & NBD_CMD_MASK_COMMAND;
|
||||
if (command != NBD_CMD_DISC && (request.from + request.len) > exp->size) {
|
||||
LOG("From: %" PRIu64 ", Len: %u, Size: %" PRIu64
|
||||
", Offset: %" PRIu64 "\n",
|
||||
request.from, request.len,
|
||||
(uint64_t)exp->size, (uint64_t)exp->dev_offset);
|
||||
LOG("From: %" PRIu64 ", Len: %" PRIu32", Size: %" PRIu64
|
||||
", Offset: %" PRIu64 "\n",
|
||||
request.from, request.len,
|
||||
(uint64_t)exp->size, (uint64_t)exp->dev_offset);
|
||||
LOG("requested operation past EOF--bad client?");
|
||||
goto invalid_request;
|
||||
}
|
||||
@@ -1099,7 +1103,7 @@ static void nbd_trip(void *opaque)
|
||||
goto error_reply;
|
||||
}
|
||||
|
||||
TRACE("Read %u byte(s)", request.len);
|
||||
TRACE("Read %" PRIu32" byte(s)", request.len);
|
||||
if (nbd_co_send_reply(req, &reply, request.len) < 0)
|
||||
goto out;
|
||||
break;
|
||||
@@ -1153,19 +1157,27 @@ static void nbd_trip(void *opaque)
|
||||
break;
|
||||
case NBD_CMD_TRIM:
|
||||
TRACE("Request type is TRIM");
|
||||
ret = blk_co_discard(exp->blk, (request.from + exp->dev_offset)
|
||||
/ BDRV_SECTOR_SIZE,
|
||||
request.len / BDRV_SECTOR_SIZE);
|
||||
if (ret < 0) {
|
||||
LOG("discard failed");
|
||||
reply.error = -ret;
|
||||
/* Ignore unaligned head or tail, until block layer adds byte
|
||||
* interface */
|
||||
if (request.len >= BDRV_SECTOR_SIZE) {
|
||||
request.len -= (request.from + request.len) % BDRV_SECTOR_SIZE;
|
||||
ret = blk_co_discard(exp->blk,
|
||||
DIV_ROUND_UP(request.from + exp->dev_offset,
|
||||
BDRV_SECTOR_SIZE),
|
||||
request.len / BDRV_SECTOR_SIZE);
|
||||
if (ret < 0) {
|
||||
LOG("discard failed");
|
||||
reply.error = -ret;
|
||||
}
|
||||
} else {
|
||||
TRACE("trim request too small, ignoring");
|
||||
}
|
||||
if (nbd_co_send_reply(req, &reply, 0) < 0) {
|
||||
goto out;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
LOG("invalid request type (%u) received", request.type);
|
||||
LOG("invalid request type (%" PRIu32 ") received", request.type);
|
||||
invalid_request:
|
||||
reply.error = EINVAL;
|
||||
error_reply:
|
||||
|
||||
@@ -724,7 +724,7 @@ ssize_t qemu_deliver_packet_iov(NetClientState *sender,
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (nc->info->receive_iov) {
|
||||
if (nc->info->receive_iov && !(flags & QEMU_NET_PACKET_FLAG_RAW)) {
|
||||
ret = nc->info->receive_iov(nc, iov, iovcnt);
|
||||
} else {
|
||||
ret = nc_sendv_compat(nc, iov, iovcnt, flags);
|
||||
|
||||
+4
-4
@@ -151,8 +151,8 @@ static void read_partition(uint8_t *p, struct partition_record *r)
|
||||
r->end_cylinder = p[7] | ((p[6] << 2) & 0x300);
|
||||
r->end_sector = p[6] & 0x3f;
|
||||
|
||||
r->start_sector_abs = le32_to_cpup((uint32_t *)(p + 8));
|
||||
r->nb_sectors_abs = le32_to_cpup((uint32_t *)(p + 12));
|
||||
r->start_sector_abs = ldl_le_p(p + 8);
|
||||
r->nb_sectors_abs = ldl_le_p(p + 12);
|
||||
}
|
||||
|
||||
static int find_partition(BlockBackend *blk, int partition,
|
||||
@@ -241,7 +241,7 @@ static void *nbd_client_thread(void *arg)
|
||||
{
|
||||
char *device = arg;
|
||||
off_t size;
|
||||
uint32_t nbdflags;
|
||||
uint16_t nbdflags;
|
||||
QIOChannelSocket *sioc;
|
||||
int fd;
|
||||
int ret;
|
||||
@@ -455,7 +455,7 @@ int main(int argc, char **argv)
|
||||
BlockBackend *blk;
|
||||
BlockDriverState *bs;
|
||||
off_t dev_offset = 0;
|
||||
uint32_t nbdflags = 0;
|
||||
uint16_t nbdflags = 0;
|
||||
bool disconnect = false;
|
||||
const char *bindto = "0.0.0.0";
|
||||
const char *port = NULL;
|
||||
|
||||
+1
-1
@@ -129,7 +129,7 @@ static void qemu_clock_init(QEMUClockType type)
|
||||
assert(main_loop_tlg.tl[type] == NULL);
|
||||
|
||||
clock->type = type;
|
||||
clock->enabled = true;
|
||||
clock->enabled = (type == QEMU_CLOCK_VIRTUAL ? false : true);
|
||||
clock->last = INT64_MIN;
|
||||
QLIST_INIT(&clock->timerlists);
|
||||
notifier_list_init(&clock->reset_notifiers);
|
||||
|
||||
+1
-1
@@ -77,7 +77,7 @@ static gboolean ga_channel_prepare(GSource *source, gint *timeout_ms)
|
||||
}
|
||||
|
||||
out:
|
||||
/* dont block forever, iterate the main loop every once and a while */
|
||||
/* don't block forever, iterate the main loop every once in a while */
|
||||
*timeout_ms = 500;
|
||||
/* if there's data in the read buffer, or another event is pending,
|
||||
* skip polling and issue user cb.
|
||||
|
||||
+2
-2
@@ -182,8 +182,8 @@ GuestExecStatus *qmp_guest_exec_status(int64_t pid, Error **err)
|
||||
*/
|
||||
#ifdef G_OS_WIN32
|
||||
/* Additionally WIN32 does not provide any additional information
|
||||
* on whetherthe child exited or terminated via signal.
|
||||
* We use this simple range check to distingish application exit code
|
||||
* on whether the child exited or terminated via signal.
|
||||
* We use this simple range check to distinguish application exit code
|
||||
* (usually value less then 256) and unhandled exception code with
|
||||
* ntstatus (always value greater then 0xC0000005). */
|
||||
if ((uint32_t)gei->status < 0xC0000000U) {
|
||||
|
||||
+12
-2
@@ -20,9 +20,15 @@
|
||||
#define MAX_TOKEN_COUNT (2ULL << 20)
|
||||
#define MAX_NESTING (1ULL << 10)
|
||||
|
||||
static void json_message_free_token(void *token, void *opaque)
|
||||
{
|
||||
g_free(token);
|
||||
}
|
||||
|
||||
static void json_message_free_tokens(JSONMessageParser *parser)
|
||||
{
|
||||
if (parser->tokens) {
|
||||
g_queue_foreach(parser->tokens, json_message_free_token, NULL);
|
||||
g_queue_free(parser->tokens);
|
||||
parser->tokens = NULL;
|
||||
}
|
||||
@@ -33,6 +39,7 @@ static void json_message_process_token(JSONLexer *lexer, GString *input,
|
||||
{
|
||||
JSONMessageParser *parser = container_of(lexer, JSONMessageParser, lexer);
|
||||
JSONToken *token;
|
||||
GQueue *tokens;
|
||||
|
||||
switch (type) {
|
||||
case JSON_LCURLY:
|
||||
@@ -90,9 +97,12 @@ out_emit:
|
||||
/* send current list of tokens to parser and reset tokenizer */
|
||||
parser->brace_count = 0;
|
||||
parser->bracket_count = 0;
|
||||
/* parser->emit takes ownership of parser->tokens. */
|
||||
parser->emit(parser, parser->tokens);
|
||||
/* parser->emit takes ownership of parser->tokens. Remove our own
|
||||
* reference to parser->tokens before handing it out to parser->emit.
|
||||
*/
|
||||
tokens = parser->tokens;
|
||||
parser->tokens = g_queue_new();
|
||||
parser->emit(parser, tokens);
|
||||
parser->token_size = 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -363,7 +363,7 @@ sub sanitise_line {
|
||||
for ($off = 1; $off < length($line); $off++) {
|
||||
$c = substr($line, $off, 1);
|
||||
|
||||
# Comments we are wacking completly including the begin
|
||||
# Comments we are wacking completely including the begin
|
||||
# and end, all to $;.
|
||||
if ($sanitise_quote eq '' && substr($line, $off, 2) eq '/*') {
|
||||
$sanitise_quote = '*/';
|
||||
|
||||
@@ -256,11 +256,13 @@ class ArchPPC(Arch):
|
||||
self.ioctl_numbers = IOCTL_NUMBERS
|
||||
self.ioctl_numbers['ENABLE'] = 0x20002400
|
||||
self.ioctl_numbers['DISABLE'] = 0x20002401
|
||||
self.ioctl_numbers['RESET'] = 0x20002403
|
||||
|
||||
# PPC comes in 32 and 64 bit and some generated ioctl
|
||||
# numbers depend on the wordsize.
|
||||
char_ptr_size = ctypes.sizeof(ctypes.c_char_p)
|
||||
self.ioctl_numbers['SET_FILTER'] = 0x80002406 | char_ptr_size << 16
|
||||
self.exit_reasons = {}
|
||||
|
||||
class ArchA64(Arch):
|
||||
def __init__(self):
|
||||
|
||||
@@ -170,6 +170,9 @@ void visit_type_%(c_name)s(Visitor *v, const char *name, %(c_name)s **obj, Error
|
||||
if (err) {
|
||||
goto out;
|
||||
}
|
||||
if (!*obj) {
|
||||
goto out_obj;
|
||||
}
|
||||
switch ((*obj)->type) {
|
||||
''',
|
||||
c_name=c_name(name), promote_int=promote_int)
|
||||
@@ -203,10 +206,13 @@ void visit_type_%(c_name)s(Visitor *v, const char *name, %(c_name)s **obj, Error
|
||||
''')
|
||||
|
||||
ret += mcgen('''
|
||||
case QTYPE_NONE:
|
||||
abort();
|
||||
default:
|
||||
error_setg(&err, QERR_INVALID_PARAMETER_TYPE, name ? name : "null",
|
||||
"%(name)s");
|
||||
}
|
||||
out_obj:
|
||||
visit_end_alternate(v);
|
||||
out:
|
||||
error_propagate(errp, err);
|
||||
|
||||
+1
-1
@@ -206,7 +206,7 @@ soread(struct socket *so)
|
||||
* We don't test for <= 0 this time, because there legitimately
|
||||
* might not be any more data (since the socket is non-blocking),
|
||||
* a close will be detected on next iteration.
|
||||
* A return of -1 wont (shouldn't) happen, since it didn't happen above
|
||||
* A return of -1 won't (shouldn't) happen, since it didn't happen above
|
||||
*/
|
||||
if (n == 2 && nn == iov[0].iov_len) {
|
||||
int ret;
|
||||
|
||||
@@ -3049,7 +3049,7 @@ static unsigned int crisv32_decoder(CPUCRISState *env, DisasContext *dc)
|
||||
*
|
||||
* When the software returns from an exception, the branch will re-execute.
|
||||
* On QEMU care needs to be taken when a branch+delayslot sequence is broken
|
||||
* and the branch and delayslot dont share pages.
|
||||
* and the branch and delayslot don't share pages.
|
||||
*
|
||||
* The TB contaning the branch insn will set up env->btarget and evaluate
|
||||
* env->btaken. When the translation loop exits we will note that the branch
|
||||
@@ -3238,7 +3238,7 @@ void gen_intermediate_code(CPUCRISState *env, struct TranslationBlock *tb)
|
||||
}
|
||||
|
||||
/* If we are rexecuting a branch due to exceptions on
|
||||
delay slots dont break. */
|
||||
delay slots don't break. */
|
||||
if (!(tb->pc & 1) && cs->singlestep_enabled) {
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -130,7 +130,7 @@ static void cris_set_prefix(DisasContext *dc)
|
||||
dc->tb_flags |= PFIX_FLAG;
|
||||
tcg_gen_ori_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], PFIX_FLAG);
|
||||
|
||||
/* prefix insns dont clear the x flag. */
|
||||
/* prefix insns don't clear the x flag. */
|
||||
dc->clear_x = 0;
|
||||
cris_lock_irq(dc);
|
||||
}
|
||||
|
||||
+1
-1
@@ -2523,7 +2523,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
|
||||
|
||||
/* The Linux kernel checks for the CMPLegacy bit and
|
||||
* discards multiple thread information if it is set.
|
||||
* So dont set it here for Intel to make Linux guests happy.
|
||||
* So don't set it here for Intel to make Linux guests happy.
|
||||
*/
|
||||
if (cs->nr_cores * cs->nr_threads > 1) {
|
||||
if (env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1 ||
|
||||
|
||||
+1
-1
@@ -1366,7 +1366,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access);
|
||||
* If value is NULL, no default will be set and the original
|
||||
* value from the CPU model table will be kept.
|
||||
*
|
||||
* It is valid to call this funciton only for properties that
|
||||
* It is valid to call this function only for properties that
|
||||
* are already present in the kvm_default_props table.
|
||||
*/
|
||||
void x86_cpu_change_kvm_default(const char *prop, const char *value);
|
||||
|
||||
@@ -7170,7 +7170,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_regs[R_ECX]);
|
||||
gen_helper_xsetbv(cpu_env, cpu_tmp2_i32, cpu_tmp1_i64);
|
||||
/* End TB because translation flags may change. */
|
||||
gen_jmp_im(s->pc - pc_start);
|
||||
gen_jmp_im(s->pc - s->cs_base);
|
||||
gen_eob(s);
|
||||
break;
|
||||
|
||||
@@ -8002,6 +8002,11 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
|
||||
}
|
||||
/* fallthru */
|
||||
case 0xf9 ... 0xff: /* sfence */
|
||||
if (!(s->cpuid_features & CPUID_SSE)
|
||||
|| (prefixes & PREFIX_LOCK)) {
|
||||
goto illegal_op;
|
||||
}
|
||||
break;
|
||||
case 0xe8 ... 0xef: /* lfence */
|
||||
case 0xf0 ... 0xf7: /* mfence */
|
||||
if (!(s->cpuid_features & CPUID_SSE2)
|
||||
|
||||
@@ -539,7 +539,7 @@ void mips_cpu_do_interrupt(CPUState *cs)
|
||||
break;
|
||||
case EXCP_SRESET:
|
||||
env->CP0_Status |= (1 << CP0St_SR);
|
||||
memset(env->CP0_WatchLo, 0, sizeof(*env->CP0_WatchLo));
|
||||
memset(env->CP0_WatchLo, 0, sizeof(env->CP0_WatchLo));
|
||||
goto set_error_EPC;
|
||||
case EXCP_NMI:
|
||||
env->CP0_Status |= (1 << CP0St_NMI);
|
||||
|
||||
@@ -581,7 +581,7 @@ static bool mips_vp_is_wfi(MIPSCPU *c)
|
||||
|
||||
static inline void mips_vpe_wake(MIPSCPU *c)
|
||||
{
|
||||
/* Dont set ->halted = 0 directly, let it be done via cpu_has_work
|
||||
/* Don't set ->halted = 0 directly, let it be done via cpu_has_work
|
||||
because there might be other conditions that state that c should
|
||||
be sleeping. */
|
||||
cpu_interrupt(CPU(c), CPU_INTERRUPT_WAKE);
|
||||
|
||||
@@ -220,6 +220,11 @@ int cpu_get_dump_info(ArchDumpInfo *info,
|
||||
} else {
|
||||
info->d_endian = ELFDATA2LSB;
|
||||
}
|
||||
/* 64KB is the max page size for pseries kernel */
|
||||
if (strncmp(object_get_typename(qdev_get_machine()),
|
||||
"pseries-", 8) == 0) {
|
||||
info->page_size = (1U << 16);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -4668,12 +4668,15 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
|
||||
case 0xd: /* ldstub -- XXX: should be atomically */
|
||||
{
|
||||
TCGv r_const;
|
||||
TCGv tmp = tcg_temp_new();
|
||||
|
||||
gen_address_mask(dc, cpu_addr);
|
||||
tcg_gen_qemu_ld8u(cpu_val, cpu_addr, dc->mem_idx);
|
||||
tcg_gen_qemu_ld8u(tmp, cpu_addr, dc->mem_idx);
|
||||
r_const = tcg_const_tl(0xff);
|
||||
tcg_gen_qemu_st8(r_const, cpu_addr, dc->mem_idx);
|
||||
tcg_gen_mov_tl(cpu_val, tmp);
|
||||
tcg_temp_free(r_const);
|
||||
tcg_temp_free(tmp);
|
||||
}
|
||||
break;
|
||||
case 0x0f:
|
||||
|
||||
@@ -2858,7 +2858,7 @@ static void gen_shaci(TCGv ret, TCGv r1, int32_t shift_count)
|
||||
} else if (shift_count == -32) {
|
||||
/* set PSW.C */
|
||||
tcg_gen_mov_tl(cpu_PSW_C, r1);
|
||||
/* fill ret completly with sign bit */
|
||||
/* fill ret completely with sign bit */
|
||||
tcg_gen_sari_tl(ret, r1, 31);
|
||||
/* clear PSW.V */
|
||||
tcg_gen_movi_tl(cpu_PSW_V, 0);
|
||||
|
||||
+1
-1
@@ -473,7 +473,7 @@ On a 32 bit target, all 64 bit operations are converted to 32 bits. A
|
||||
few specific operations must be implemented to allow it (see add2_i32,
|
||||
sub2_i32, brcond2_i32).
|
||||
|
||||
On a 64 bit target, the values are transfered between 32 and 64-bit
|
||||
On a 64 bit target, the values are transferred between 32 and 64-bit
|
||||
registers using the following ops:
|
||||
- trunc_shr_i64_i32
|
||||
- ext_i32_i64
|
||||
|
||||
@@ -184,5 +184,103 @@ class ThrottleTestCase(iotests.QMPTestCase):
|
||||
class ThrottleTestCoroutine(ThrottleTestCase):
|
||||
test_img = "null-co://"
|
||||
|
||||
class ThrottleTestGroupNames(iotests.QMPTestCase):
|
||||
test_img = "null-aio://"
|
||||
max_drives = 3
|
||||
|
||||
def setUp(self):
|
||||
self.vm = iotests.VM()
|
||||
for i in range(0, self.max_drives):
|
||||
self.vm.add_drive(self.test_img, "throttling.iops-total=100")
|
||||
self.vm.launch()
|
||||
|
||||
def tearDown(self):
|
||||
self.vm.shutdown()
|
||||
|
||||
def set_io_throttle(self, device, params):
|
||||
params["device"] = device
|
||||
result = self.vm.qmp("block_set_io_throttle", conv_keys=False, **params)
|
||||
self.assert_qmp(result, 'return', {})
|
||||
|
||||
def verify_name(self, device, name):
|
||||
result = self.vm.qmp("query-block")
|
||||
for r in result["return"]:
|
||||
if r["device"] == device:
|
||||
info = r["inserted"]
|
||||
if name:
|
||||
self.assertEqual(info["group"], name)
|
||||
else:
|
||||
self.assertFalse(info.has_key('group'))
|
||||
return
|
||||
|
||||
raise Exception("No group information found for '%s'" % device)
|
||||
|
||||
def test_group_naming(self):
|
||||
params = {"bps": 0,
|
||||
"bps_rd": 0,
|
||||
"bps_wr": 0,
|
||||
"iops": 0,
|
||||
"iops_rd": 0,
|
||||
"iops_wr": 0}
|
||||
|
||||
# Check the drives added using the command line.
|
||||
# The default throttling group name is the device name.
|
||||
for i in range(self.max_drives):
|
||||
devname = "drive%d" % i
|
||||
self.verify_name(devname, devname)
|
||||
|
||||
# Clear throttling settings => the group name is gone.
|
||||
for i in range(self.max_drives):
|
||||
devname = "drive%d" % i
|
||||
self.set_io_throttle(devname, params)
|
||||
self.verify_name(devname, None)
|
||||
|
||||
# Set throttling settings using block_set_io_throttle and
|
||||
# check the default group names.
|
||||
params["iops"] = 10
|
||||
for i in range(self.max_drives):
|
||||
devname = "drive%d" % i
|
||||
self.set_io_throttle(devname, params)
|
||||
self.verify_name(devname, devname)
|
||||
|
||||
# Set a custom group name for each device
|
||||
for i in range(3):
|
||||
devname = "drive%d" % i
|
||||
groupname = "group%d" % i
|
||||
params['group'] = groupname
|
||||
self.set_io_throttle(devname, params)
|
||||
self.verify_name(devname, groupname)
|
||||
|
||||
# Put drive0 in group1 and check that all other devices remain
|
||||
# unchanged
|
||||
params['group'] = 'group1'
|
||||
self.set_io_throttle('drive0', params)
|
||||
self.verify_name('drive0', 'group1')
|
||||
for i in range(1, self.max_drives):
|
||||
devname = "drive%d" % i
|
||||
groupname = "group%d" % i
|
||||
self.verify_name(devname, groupname)
|
||||
|
||||
# Put drive0 in group2 and check that all other devices remain
|
||||
# unchanged
|
||||
params['group'] = 'group2'
|
||||
self.set_io_throttle('drive0', params)
|
||||
self.verify_name('drive0', 'group2')
|
||||
for i in range(1, self.max_drives):
|
||||
devname = "drive%d" % i
|
||||
groupname = "group%d" % i
|
||||
self.verify_name(devname, groupname)
|
||||
|
||||
# Clear throttling settings from drive0 check that all other
|
||||
# devices remain unchanged
|
||||
params["iops"] = 0
|
||||
self.set_io_throttle('drive0', params)
|
||||
self.verify_name('drive0', None)
|
||||
for i in range(1, self.max_drives):
|
||||
devname = "drive%d" % i
|
||||
groupname = "group%d" % i
|
||||
self.verify_name(devname, groupname)
|
||||
|
||||
|
||||
if __name__ == '__main__':
|
||||
iotests.main(supported_fmts=["raw"])
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
....
|
||||
.....
|
||||
----------------------------------------------------------------------
|
||||
Ran 4 tests
|
||||
Ran 5 tests
|
||||
|
||||
OK
|
||||
|
||||
@@ -51,7 +51,7 @@ int main(void)
|
||||
t = (unsigned char *)x;
|
||||
t -= 32768;
|
||||
p = (unsigned char *) &y.v1;
|
||||
mb(); /* dont reorder anything beyond here. */
|
||||
mb(); /* don't reorder anything beyond here. */
|
||||
cris_tst_cc_init();
|
||||
asm volatile ("setf\tzvnc\n");
|
||||
cris_addo_pi_d(p, t);
|
||||
@@ -62,7 +62,7 @@ int main(void)
|
||||
|
||||
|
||||
t += 32770;
|
||||
mb(); /* dont reorder anything beyond here. */
|
||||
mb(); /* don't reorder anything beyond here. */
|
||||
cris_tst_cc_init();
|
||||
asm volatile ("setf\tzvnc\n");
|
||||
cris_addo_pi_w(p, t);
|
||||
@@ -71,7 +71,7 @@ int main(void)
|
||||
if (*r != 0x4455aa77)
|
||||
err();
|
||||
|
||||
mb(); /* dont reorder anything beyond here. */
|
||||
mb(); /* don't reorder anything beyond here. */
|
||||
cris_tst_cc_init();
|
||||
asm volatile ("setf\tzvnc\n");
|
||||
cris_addo_d(p, r);
|
||||
@@ -81,7 +81,7 @@ int main(void)
|
||||
if (*r != 0xee19ccff)
|
||||
err();
|
||||
|
||||
mb(); /* dont reorder anything beyond here. */
|
||||
mb(); /* don't reorder anything beyond here. */
|
||||
cris_tst_cc_init();
|
||||
asm volatile ("setf\tzvnc\n");
|
||||
cris_addo_pi_b(p, t);
|
||||
@@ -90,7 +90,7 @@ int main(void)
|
||||
if (*(uint16_t*)r != 0xff22)
|
||||
err();
|
||||
|
||||
mb(); /* dont reorder anything beyond here. */
|
||||
mb(); /* don't reorder anything beyond here. */
|
||||
cris_tst_cc_init();
|
||||
asm volatile ("setf\tzvnc\n");
|
||||
cris_addo_b(p, r);
|
||||
@@ -100,7 +100,7 @@ int main(void)
|
||||
if (*r != 0x4455aa77)
|
||||
err();
|
||||
|
||||
mb(); /* dont reorder anything beyond here. */
|
||||
mb(); /* don't reorder anything beyond here. */
|
||||
cris_tst_cc_init();
|
||||
asm volatile ("setf\tzvnc\n");
|
||||
cris_addo_w(p, r);
|
||||
@@ -110,7 +110,7 @@ int main(void)
|
||||
if (*r != 0xff224455)
|
||||
err();
|
||||
|
||||
mb(); /* dont reorder anything beyond here. */
|
||||
mb(); /* don't reorder anything beyond here. */
|
||||
cris_tst_cc_init();
|
||||
asm volatile ("setf\tzvnc\n");
|
||||
cris_addo_pi_d(p, t);
|
||||
|
||||
+2
-2
@@ -453,7 +453,7 @@ static void test_timer_schedule(void)
|
||||
{
|
||||
TimerTestData data = { .n = 0, .ctx = ctx, .ns = SCALE_MS * 750LL,
|
||||
.max = 2,
|
||||
.clock_type = QEMU_CLOCK_VIRTUAL };
|
||||
.clock_type = QEMU_CLOCK_REALTIME };
|
||||
EventNotifier e;
|
||||
|
||||
/* aio_poll will not block to wait for timers to complete unless it has
|
||||
@@ -783,7 +783,7 @@ static void test_source_timer_schedule(void)
|
||||
{
|
||||
TimerTestData data = { .n = 0, .ctx = ctx, .ns = SCALE_MS * 750LL,
|
||||
.max = 2,
|
||||
.clock_type = QEMU_CLOCK_VIRTUAL };
|
||||
.clock_type = QEMU_CLOCK_REALTIME };
|
||||
EventNotifier e;
|
||||
int64_t expiry;
|
||||
|
||||
|
||||
@@ -739,6 +739,8 @@ static void test_visitor_in_errors(TestInputVisitorData *data,
|
||||
Error *err = NULL;
|
||||
Visitor *v;
|
||||
strList *q = NULL;
|
||||
UserDefTwo *r = NULL;
|
||||
WrapAlternate *s = NULL;
|
||||
|
||||
v = visitor_input_test_init(data, "{ 'integer': false, 'boolean': 'foo', "
|
||||
"'string': -42 }");
|
||||
@@ -757,6 +759,18 @@ static void test_visitor_in_errors(TestInputVisitorData *data,
|
||||
error_free_or_abort(&err);
|
||||
assert(q);
|
||||
qapi_free_strList(q);
|
||||
|
||||
v = visitor_input_test_init(data, "{ 'str':'hi' }");
|
||||
visit_type_UserDefTwo(v, NULL, &r, &err);
|
||||
error_free_or_abort(&err);
|
||||
assert(r);
|
||||
qapi_free_UserDefTwo(r);
|
||||
|
||||
v = visitor_input_test_init(data, "{ }");
|
||||
visit_type_WrapAlternate(v, NULL, &s, &err);
|
||||
error_free_or_abort(&err);
|
||||
assert(s);
|
||||
qapi_free_WrapAlternate(s);
|
||||
}
|
||||
|
||||
static void test_visitor_in_wrong_type(TestInputVisitorData *data,
|
||||
|
||||
+2
-2
@@ -108,7 +108,7 @@ static bool get_trace_record(unsigned int idx, TraceRecord **recordptr)
|
||||
smp_rmb(); /* read memory barrier before accessing record */
|
||||
/* read the record header to know record length */
|
||||
read_from_buffer(idx, &record, sizeof(TraceRecord));
|
||||
*recordptr = malloc(record.length); /* dont use g_malloc, can deadlock when traced */
|
||||
*recordptr = malloc(record.length); /* don't use g_malloc, can deadlock when traced */
|
||||
/* make a copy of record to avoid being overwritten */
|
||||
read_from_buffer(idx, *recordptr, record.length);
|
||||
smp_rmb(); /* memory barrier before clearing valid flag */
|
||||
@@ -180,7 +180,7 @@ static gpointer writeout_thread(gpointer opaque)
|
||||
while (get_trace_record(idx, &recordptr)) {
|
||||
unused = fwrite(recordptr, recordptr->length, 1, trace_fp);
|
||||
writeout_idx += recordptr->length;
|
||||
free(recordptr); /* dont use g_free, can deadlock when traced */
|
||||
free(recordptr); /* don't use g_free, can deadlock when traced */
|
||||
idx = writeout_idx % TRACE_BUF_LEN;
|
||||
}
|
||||
|
||||
|
||||
+1
-1
@@ -1394,7 +1394,7 @@ static void addRemovableDevicesMenuItems(void)
|
||||
[menuItem setEnabled: NO];
|
||||
[menu addItem: menuItem];
|
||||
|
||||
/* Loop thru all the block devices in the emulator */
|
||||
/* Loop through all the block devices in the emulator */
|
||||
while (currentDevice) {
|
||||
deviceName = [[NSString stringWithFormat: @"%s", currentDevice->value->device] retain];
|
||||
|
||||
|
||||
@@ -340,10 +340,12 @@ static void gd_update_geometry_hints(VirtualConsole *vc)
|
||||
geo.min_height = geo.height_inc * VC_TERM_Y_MIN;
|
||||
mask |= GDK_HINT_MIN_SIZE;
|
||||
gtk_widget_style_get(vc->vte.terminal, "inner-border", &ib, NULL);
|
||||
geo.base_width += ib->left + ib->right;
|
||||
geo.base_height += ib->top + ib->bottom;
|
||||
geo.min_width += ib->left + ib->right;
|
||||
geo.min_height += ib->top + ib->bottom;
|
||||
if (ib) {
|
||||
geo.base_width += ib->left + ib->right;
|
||||
geo.base_height += ib->top + ib->bottom;
|
||||
geo.min_width += ib->left + ib->right;
|
||||
geo.min_height += ib->top + ib->bottom;
|
||||
}
|
||||
geo_widget = vc->vte.terminal;
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -357,6 +357,10 @@ static void handle_keydown(SDL_Event *ev)
|
||||
case SDL_SCANCODE_7:
|
||||
case SDL_SCANCODE_8:
|
||||
case SDL_SCANCODE_9:
|
||||
if (gui_grab) {
|
||||
sdl_grab_end(scon);
|
||||
}
|
||||
|
||||
win = ev->key.keysym.scancode - SDL_SCANCODE_1;
|
||||
if (win < sdl2_num_outputs) {
|
||||
sdl2_console[win].hidden = !sdl2_console[win].hidden;
|
||||
@@ -790,6 +794,9 @@ void sdl_display_init(DisplayState *ds, int full_screen, int no_frame)
|
||||
}
|
||||
}
|
||||
sdl2_num_outputs = i;
|
||||
if (sdl2_num_outputs == 0) {
|
||||
return;
|
||||
}
|
||||
sdl2_console = g_new0(struct sdl2_console, sdl2_num_outputs);
|
||||
for (i = 0; i < sdl2_num_outputs; i++) {
|
||||
QemuConsole *con = qemu_console_lookup_by_index(i);
|
||||
|
||||
+4
-2
@@ -833,9 +833,11 @@ void qemu_spice_init(void)
|
||||
"incompatible with -spice port/tls-port");
|
||||
exit(1);
|
||||
}
|
||||
if (egl_rendernode_init() == 0) {
|
||||
display_opengl = 1;
|
||||
if (egl_rendernode_init() != 0) {
|
||||
error_report("Failed to initialize EGL render node for SPICE GL");
|
||||
exit(1);
|
||||
}
|
||||
display_opengl = 1;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user