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Release develop 251218

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This commit is contained in:
hongyi
2025-12-18 14:27:13 +08:00
parent 0cf5473f0f
commit 4b8bcc0c64
16 changed files with 2098 additions and 402 deletions
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200
arch/riscv/boot/dts/zhihe/a210-dev.dts
View File

@@ -111,114 +111,116 @@
};
};
Sound_Card@0 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S0";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
soc {
Sound_Card@0 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S0";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
SOUND_CARD_LINK(0, i2s, i2s1, 0, es8156_dac0, 0); /* I2S1 <-> es8156_dac0 */
SOUND_CARD_LINK(1, i2s, i2s1, 0, es7210_adc0, 0); /* I2S1 <-> es7210_adc0 */
};
SOUND_CARD_LINK(0, i2s, i2s1, 0, es8156_dac0, 0); /* I2S1 <-> es8156_dac0 */
SOUND_CARD_LINK(1, i2s, i2s1, 0, es7210_adc0, 0); /* I2S1 <-> es7210_adc0 */
};
Sound_Card@1 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S1";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
Sound_Card@1 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S1";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
"Speaker", "AW87565_PA2 VO",
"AW87565_PA2 IN", "ES8156_DAC1 LOUT";
simple-audio-card,aux-devs = <&audio_aw87565_pa2>;
SOUND_CARD_LINK(0, i2s, i2s1, 0, es8156_dac1, 0);
SOUND_CARD_LINK(1, i2s, i2s1, 0, es7210_adc1, 0);
simple-audio-card,aux-devs = <&audio_aw87565_pa2>;
SOUND_CARD_LINK(0, i2s, i2s1, 0, es8156_dac1, 0);
SOUND_CARD_LINK(1, i2s, i2s1, 0, es7210_adc1, 0);
};
wcn_wifi: wireless-wlan {
compatible = "wlan-platdata";
WIFI,vcc1-gpios = <&aw9535_1 11 GPIO_ACTIVE_HIGH>;
WIFI,vcc2-gpios = <&aw9535_1 12 GPIO_ACTIVE_HIGH>;
WIFI,poweren-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
power_on_after_init;
power_on_when_resume;
status = "okay";
};
wcn_bt: wireless-bluetooth {
compatible = "bluetooth-platdata";
BT,power-gpios = <&ao_gpio1 4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
lcd0_backlight: pwm-backlight@0 {
compatible = "pwm-backlight";
status = "okay";
pwms = <&pwm1 2 100000 0>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
enable-gpios = <&aw9535_1 15 GPIO_ACTIVE_HIGH>;
};
reg_vdd33_lcd0: regulator-vdd33-lcd0 {
compatible = "regulator-fixed";
regulator-name = "lcd0_vdd33";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&aw9535_1 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_vddtp33_lcd0: regulator-vddtp33-lcd0 {
compatible = "regulator-fixed";
regulator-name = "lcd0_vddtp33";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&aw9535_1 14 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
mipicsi0_4lane_port: mipicsi0_4lane_port@0 {
compatible = "zhihe,vi_sensor";
clocks = <&clk SW_TOP_PAD_SENSOR_VCLK0_EN>;
clock-names = "core_clk";
clock-frequency = <24000000>;
pinctrl-names = "default";
pinctrl-0 = <&sen_vclk_pin0>;
sensor_pdn = <&aw9535_0 3 GPIO_ACTIVE_HIGH>;
sensor_rst = <&aw9535_0 4 GPIO_ACTIVE_HIGH>;
sensor_regulators = "DVDD1", "DVDD2", "AVDD1", "AVDD2";
DVDD1-supply = <&dvdd1_mipicsi0_reg>;
DVDD2-supply = <&dvdd2_mipicsi0_reg>;
AVDD1-supply = <&avdd1_mipicsi0_reg>;
AVDD2-supply = <&avdd2_mipicsi0_reg>;
status = "okay";
};
mipicsi1_a_port: mipicsi1_a_port@0 {
compatible = "zhihe,vi_sensor";
clocks = <&clk SW_TOP_PAD_SENSOR_VCLK1_EN>;
clock-names = "core_clk";
clock-frequency = <24000000>;
pinctrl-names = "default";
pinctrl-0 = <&sen_vclk_pin1>;
sensor_pdn = <&aw9535_0 0 GPIO_ACTIVE_HIGH>;
sensor_rst = <&aw9535_0 1 GPIO_ACTIVE_HIGH>;
sensor_regulators = "DVDD1", "DVDD2", "AVDD1", "AVDD2";
DVDD1-supply = <&dvdd1_mipicsi1_reg>;
DVDD2-supply = <&dvdd2_mipicsi1_reg>;
AVDD1-supply = <&avdd1_mipicsi1_reg>;
AVDD2-supply = <&avdd2_mipicsi1_reg>;
status = "okay";
};
};
wcn_wifi: wireless-wlan {
compatible = "wlan-platdata";
WIFI,vcc1-gpios = <&aw9535_1 11 GPIO_ACTIVE_HIGH>;
WIFI,vcc2-gpios = <&aw9535_1 12 GPIO_ACTIVE_HIGH>;
WIFI,poweren-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
power_on_after_init;
power_on_when_resume;
status = "okay";
};
wcn_bt: wireless-bluetooth {
compatible = "bluetooth-platdata";
BT,power-gpios = <&ao_gpio1 4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
/* The bootargs in U-Boot will override the configuration set here. */
chosen {
stdout-path = "serial4";
};
lcd0_backlight: pwm-backlight@0 {
compatible = "pwm-backlight";
status = "okay";
pwms = <&pwm1 2 100000 0>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
enable-gpios = <&aw9535_1 15 GPIO_ACTIVE_HIGH>;
};
reg_vdd33_lcd0: regulator-vdd33-lcd0 {
compatible = "regulator-fixed";
regulator-name = "lcd0_vdd33";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&aw9535_1 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_vddtp33_lcd0: regulator-vddtp33-lcd0 {
compatible = "regulator-fixed";
regulator-name = "lcd0_vddtp33";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&aw9535_1 14 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
mipicsi0_4lane_port: mipicsi0_4lane_port@0 {
compatible = "zhihe,vi_sensor";
clocks = <&clk SW_TOP_PAD_SENSOR_VCLK0_EN>;
clock-names = "core_clk";
clock-frequency = <24000000>;
pinctrl-names = "default";
pinctrl-0 = <&sen_vclk_pin0>;
sensor_pdn = <&aw9535_0 3 GPIO_ACTIVE_HIGH>;
sensor_rst = <&aw9535_0 4 GPIO_ACTIVE_HIGH>;
sensor_regulators = "DVDD1", "DVDD2", "AVDD1", "AVDD2";
DVDD1-supply = <&dvdd1_mipicsi0_reg>;
DVDD2-supply = <&dvdd2_mipicsi0_reg>;
AVDD1-supply = <&avdd1_mipicsi0_reg>;
AVDD2-supply = <&avdd2_mipicsi0_reg>;
status = "okay";
};
mipicsi1_a_port: mipicsi1_a_port@0 {
compatible = "zhihe,vi_sensor";
clocks = <&clk SW_TOP_PAD_SENSOR_VCLK1_EN>;
clock-names = "core_clk";
clock-frequency = <24000000>;
pinctrl-names = "default";
pinctrl-0 = <&sen_vclk_pin1>;
sensor_pdn = <&aw9535_0 0 GPIO_ACTIVE_HIGH>;
sensor_rst = <&aw9535_0 1 GPIO_ACTIVE_HIGH>;
sensor_regulators = "DVDD1", "DVDD2", "AVDD1", "AVDD2";
DVDD1-supply = <&dvdd1_mipicsi1_reg>;
DVDD2-supply = <&dvdd2_mipicsi1_reg>;
AVDD1-supply = <&avdd1_mipicsi1_reg>;
AVDD2-supply = <&avdd2_mipicsi1_reg>;
status = "okay";
};
};
&ao_gpio0 {
@@ -1202,3 +1204,7 @@
&vdec {
dvdd-supply = <&dvdd_vp_reg>;
};
&g2d {
dvdd-supply = <&dvdd_vp_reg>;
};

350
arch/riscv/boot/dts/zhihe/a210-evb.dts
View File

@@ -113,196 +113,198 @@
stdout-path = "serial4";
};
codec_dummy_i2s: codec_dummy_i2s {
compatible = "zhihe,dummy-pcm-i2s";
sound-name-prefix = "DUMMY";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
soc {
codec_dummy_i2s: codec_dummy_i2s {
compatible = "zhihe,dummy-pcm-i2s";
sound-name-prefix = "DUMMY";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_i2s_8ch: codec_dummy_i2s_8ch {
compatible = "zhihe,dummy-pcm-i2s-8ch";
sound-name-prefix = "DUMMY";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_i2s_8ch: codec_dummy_i2s_8ch {
compatible = "zhihe,dummy-pcm-i2s-8ch";
sound-name-prefix = "DUMMY";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_tdm: codec_dummy_tdm {
compatible = "zhihe,dummy-pcm-tdm";
sound-name-prefix = "DUMMY";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_tdm: codec_dummy_tdm {
compatible = "zhihe,dummy-pcm-tdm";
sound-name-prefix = "DUMMY";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm0: codec_dummy_pdm0 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC0";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm0: codec_dummy_pdm0 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC0";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm1: codec_dummy_pdm1 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC1";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm1: codec_dummy_pdm1 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC1";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm2: codec_dummy_pdm2 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC2";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm2: codec_dummy_pdm2 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC2";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm3: codec_dummy_pdm3 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC3";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm3: codec_dummy_pdm3 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC3";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm4: codec_dummy_pdm4 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC4";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm4: codec_dummy_pdm4 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC4";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm5: codec_dummy_pdm5 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC5";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm5: codec_dummy_pdm5 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC5";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm6: codec_dummy_pdm6 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC6";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm6: codec_dummy_pdm6 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC6";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm7: codec_dummy_pdm7 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC7";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
codec_dummy_pdm7: codec_dummy_pdm7 {
compatible = "zhihe,dummy-pcm-pdm";
sound-name-prefix = "DMIC7";
#address-cells = <0>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "okay";
};
Sound_Card@0 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S1";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
Sound_Card@0 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S1";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
"Speaker", "AW87565_PA0 VO",
"Speaker", "AW87565_PA1 VO",
"AW87565_PA0 IN", "ES8156_DAC0 LOUT",
"AW87565_PA1 IN", "ES8156_DAC0 ROUT";
simple-audio-card,aux-devs = <&audio_aw87565_pa0>, <&audio_aw87565_pa1>;
SOUND_CARD_LINK(0, i2s, i2s1, 0, es8156_dac0, 0); /* I2S1 <-> es8156_dac0 */
SOUND_CARD_LINK(1, i2s, i2s1, 0, es7210_adc0, 0); /* I2S1 <-> es7210_adc0 */
};
simple-audio-card,aux-devs = <&audio_aw87565_pa0>, <&audio_aw87565_pa1>;
SOUND_CARD_LINK(0, i2s, i2s1, 0, es8156_dac0, 0); /* I2S1 <-> es8156_dac0 */
SOUND_CARD_LINK(1, i2s, i2s1, 0, es7210_adc0, 0); /* I2S1 <-> es7210_adc0 */
};
Sound_Card@1 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S2";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
Sound_Card@1 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S2";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
"Speaker", "AW87565_PA2 VO",
"Speaker", "AW87565_PA3 VO",
"AW87565_PA2 IN", "ES8156_DAC1 LOUT",
"AW87565_PA3 IN", "ES8156_DAC1 ROUT";
simple-audio-card,aux-devs = <&audio_aw87565_pa2>, <&audio_aw87565_pa3>;
SOUND_CARD_LINK(0, i2s, i2s2, 0, es8156_dac1, 0); /* I2S2 <-> es8156_dac1 */
SOUND_CARD_LINK(1, i2s, i2s2, 0, es7210_adc1, 0); /* I2S2 <-> es7210_adc1 */
};
simple-audio-card,aux-devs = <&audio_aw87565_pa2>, <&audio_aw87565_pa3>;
SOUND_CARD_LINK(0, i2s, i2s2, 0, es8156_dac1, 0); /* I2S2 <-> es8156_dac1 */
SOUND_CARD_LINK(1, i2s, i2s2, 0, es7210_adc1, 0); /* I2S2 <-> es7210_adc1 */
};
Sound_Card@2 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-HDMI";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
Sound_Card@2 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-HDMI";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
SOUND_CARD_LINK(0, i2s, i2s_8ch_sd0, 1, dummy_i2s, 0); /* I2S3-SD0 <-> HDMI */
};
SOUND_CARD_LINK(0, i2s, i2s_8ch_sd0, 1, dummy_i2s, 0); /* I2S3-SD0 <-> HDMI */
};
Sound_Card@3 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S3";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
Sound_Card@3 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S3";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
SOUND_CARD_LINK(0, left_j, i2s_8ch_sd0, 0, dummy_i2s_8ch, 0); /* I2S3-SD0 <-> HW-Codec */
SOUND_CARD_LINK(1, left_j, i2s_8ch_sd1, 0, dummy_i2s_8ch, 0); /* I2S3-SD1 <-> HW-Codec */
SOUND_CARD_LINK(2, left_j, i2s_8ch_sd2, 0, dummy_i2s_8ch, 0); /* I2S3-SD2 <-> HW-Codec */
SOUND_CARD_LINK(3, left_j, i2s_8ch_sd3, 0, dummy_i2s_8ch, 0); /* I2S3-SD3 <-> HW-Codec */
};
SOUND_CARD_LINK(0, left_j, i2s_8ch_sd0, 0, dummy_i2s_8ch, 0); /* I2S3-SD0 <-> HW-Codec */
SOUND_CARD_LINK(1, left_j, i2s_8ch_sd1, 0, dummy_i2s_8ch, 0); /* I2S3-SD1 <-> HW-Codec */
SOUND_CARD_LINK(2, left_j, i2s_8ch_sd2, 0, dummy_i2s_8ch, 0); /* I2S3-SD2 <-> HW-Codec */
SOUND_CARD_LINK(3, left_j, i2s_8ch_sd3, 0, dummy_i2s_8ch, 0); /* I2S3-SD3 <-> HW-Codec */
};
Sound_Card@4 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-TDM";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
Sound_Card@4 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-TDM";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
SOUND_CARD_LINK(0, dsp_b, tdm_slot0, 0, es7210_adc2, 0); /* TDM_SLOT0 <-> es7210_adc2 */
SOUND_CARD_LINK(1, dsp_b, tdm_slot1, 0, dummy_tdm, 0); /* TDM_SLOT1 <-> es7210_adc2 */
SOUND_CARD_LINK(2, dsp_b, tdm_slot2, 0, dummy_tdm, 0); /* TDM_SLOT2 <-> es7210_adc2 */
SOUND_CARD_LINK(3, dsp_b, tdm_slot3, 0, dummy_tdm, 0); /* TDM_SLOT3 <-> es7210_adc2 */
SOUND_CARD_LINK(4, dsp_b, tdm_slot4, 0, dummy_tdm, 0); /* TDM_SLOT4 <-> es7210_adc3 */
SOUND_CARD_LINK(5, dsp_b, tdm_slot5, 0, dummy_tdm, 0); /* TDM_SLOT5 <-> es7210_adc3 */
SOUND_CARD_LINK(6, dsp_b, tdm_slot6, 0, dummy_tdm, 0); /* TDM_SLOT6 <-> es7210_adc3 */
SOUND_CARD_LINK(7, dsp_b, tdm_slot7, 0, dummy_tdm, 0); /* TDM_SLOT7 <-> es7210_adc3 */
};
SOUND_CARD_LINK(0, dsp_b, tdm_slot0, 0, es7210_adc2, 0); /* TDM_SLOT0 <-> es7210_adc2 */
SOUND_CARD_LINK(1, dsp_b, tdm_slot1, 0, dummy_tdm, 0); /* TDM_SLOT1 <-> es7210_adc2 */
SOUND_CARD_LINK(2, dsp_b, tdm_slot2, 0, dummy_tdm, 0); /* TDM_SLOT2 <-> es7210_adc2 */
SOUND_CARD_LINK(3, dsp_b, tdm_slot3, 0, dummy_tdm, 0); /* TDM_SLOT3 <-> es7210_adc2 */
SOUND_CARD_LINK(4, dsp_b, tdm_slot4, 0, dummy_tdm, 0); /* TDM_SLOT4 <-> es7210_adc3 */
SOUND_CARD_LINK(5, dsp_b, tdm_slot5, 0, dummy_tdm, 0); /* TDM_SLOT5 <-> es7210_adc3 */
SOUND_CARD_LINK(6, dsp_b, tdm_slot6, 0, dummy_tdm, 0); /* TDM_SLOT6 <-> es7210_adc3 */
SOUND_CARD_LINK(7, dsp_b, tdm_slot7, 0, dummy_tdm, 0); /* TDM_SLOT7 <-> es7210_adc3 */
};
Sound_Card@5 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-PDM";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
Sound_Card@5 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-PDM";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
SOUND_CARD_LINK(0, pdm, pdm0, 0, dummy_pdm0, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(1, pdm, pdm1, 1, dummy_pdm1, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(2, pdm, pdm2, 2, dummy_pdm2, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(3, pdm, pdm3, 3, dummy_pdm3, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(4, pdm, pdm4, 4, dummy_pdm4, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(5, pdm, pdm5, 5, dummy_pdm5, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(6, pdm, pdm6, 6, dummy_pdm6, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(7, pdm, pdm7, 7, dummy_pdm7, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(0, pdm, pdm0, 0, dummy_pdm0, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(1, pdm, pdm1, 1, dummy_pdm1, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(2, pdm, pdm2, 2, dummy_pdm2, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(3, pdm, pdm3, 3, dummy_pdm3, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(4, pdm, pdm4, 4, dummy_pdm4, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(5, pdm, pdm5, 5, dummy_pdm5, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(6, pdm, pdm6, 6, dummy_pdm6, 0); /* PDM <-> Dmic */
SOUND_CARD_LINK(7, pdm, pdm7, 7, dummy_pdm7, 0); /* PDM <-> Dmic */
};
};
};
@@ -1420,59 +1422,59 @@
};
&vp_dfmu_iommu {
status = "disabled";
status = "disabled";
};
&vp_dfmu_mt {
status = "disabled";
status = "disabled";
};
&npu_dfmu_iommu {
status = "disabled";
status = "disabled";
};
&npu_dfmu_mt {
status = "disabled";
status = "disabled";
};
&vi_dfmu_iommu {
status = "disabled";
status = "disabled";
};
&vi_dfmu_mt {
status = "disabled";
status = "disabled";
};
&vo_dfmu_iommu {
status = "disabled";
status = "disabled";
};
&vo_dfmu_mt {
status = "disabled";
status = "disabled";
};
&peri1_dfmu_iommu {
status = "okay";
status = "okay";
};
&peri1_dfmu_mt {
status = "disabled";
status = "disabled";
};
&pcie_dfmu_iommu {
status = "disabled";
status = "disabled";
};
&pcie_dfmu_mt {
status = "disabled";
status = "disabled";
};
&usb_dfmu_iommu {
status = "okay";
status = "okay";
};
&usb_dfmu_mt {
status = "disabled";
status = "disabled";
};
/* FIXME: Default EVB board expansion IO configuration */

6
arch/riscv/boot/dts/zhihe/a210-soc-core.dtsi
View File

@@ -637,11 +637,13 @@
assigned-clocks = <&clk_vo VO_DPUC_CLK_EN>, <&clk_vo VO_CH0_PIXCLK_EN>,
<&clk_vo VO_CH1_PIXCLK_EN>, <&clk_vo VO_CH2_PIXCLK_EN>,
<&clk_vo VO_DPU_ACLK_EN>, <&clk_vo VO_HDMI_PCLK_EN>,
<&clk_vo VO_DECOMP0_CLK_EN>, <&clk_vo VO_DECOMP1_CLK_EN>;
<&clk_vo VO_DECOMP0_CLK_EN>, <&clk_vo VO_DECOMP1_CLK_EN>,
<&clk_vo VO_AUXDISP_ACLK_EN>, <&clk_vo VO_AUXDISP_PCLK_EN>;
assigned-clock-rates = <880000000>, <594000000>,
<594000000>, <594000000>,
<880000000>, <165000000>,
<220000000>, <220000000>;
<220000000>, <220000000>,
<880000000>, <165000000>;
power-domains = <&power_vo>;
status = "okay";
};

257
arch/riscv/boot/dts/zhihe/a210-soc-peri.dtsi
View File

@@ -5,55 +5,54 @@
#include <dt-bindings/ata/ahci.h>
/ {
display-subsystem {
compatible = "verisilicon,display-subsystem";
ports = <&dpu_disp0>, <&dpu_disp1>;
status = "okay";
};
dpu-encoders {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
dpu_enc0: dpu-encoder@0 {
/* default encoder is DSI. */
compatible = "verisilicon,dsi-encoder";
reg = <0>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
/* input */
port@0 {
reg = <0>;
enc0_in: endpoint {
remote-endpoint = <&disp0_out>;
};
};
};
};
dpu_enc1: dpu-encoder@1 {
/* default encoder is DSI */
compatible = "verisilicon,dsi-encoder";
reg = <1>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
/* input */
port@0 {
reg = <0>;
enc1_in: endpoint {
// remote-endpoint = <&disp1_out>;
};
};
};
};
};
soc {
display-subsystem {
compatible = "verisilicon,display-subsystem";
ports = <&dpu_disp0>, <&dpu_disp1>, <&auxdisp_out>;
status = "okay";
};
dpu-encoders {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
dpu_enc0: dpu-encoder@0 {
/* default encoder is DSI. */
compatible = "verisilicon,dsi-encoder";
reg = <0>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
/* input */
port@0 {
reg = <0>;
enc0_in: endpoint {
remote-endpoint = <&disp0_out>;
};
};
};
};
dpu_enc1: dpu-encoder@1 {
/* default encoder is DSI */
compatible = "verisilicon,dsi-encoder";
reg = <1>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
/* input */
port@0 {
reg = <0>;
enc1_in: endpoint {
// remote-endpoint = <&disp1_out>;
};
};
};
};
};
teesys_syscon: teesys-reg@0027400000 {
compatible = "syscon";
reg = <0x00 0x27400000 0x0 0x1000>;
@@ -145,9 +144,18 @@
#size-cells = <0>;
port@0 {
reg = <0>;
hdmi_tx_in: endpoint {
#address-cells = <1>;
#size-cells = <0>;
hdmi_tx_in0: endpoint@0 {
reg = <0>;
remote-endpoint = <&disp1_out>;
};
hdmi_tx_in1: endpoint@1 {
reg = <1>;
remote-endpoint = <&auxdisp_to_hdmi>;
};
};
/* i2s input */
port@1 {
@@ -223,7 +231,7 @@
dpu_disp1: port@1 {
reg = <1>;
disp1_out: endpoint {
remote-endpoint = <&hdmi_tx_in>;
remote-endpoint = <&hdmi_tx_in0>;
};
};
@@ -234,6 +242,32 @@
};
};
};
auxdisp: auxdisp@6740000 {
compatible = "zhihe,auxdisp";
reg = <0x00 0x6740000 0x0 0x1000>;
interrupt-parent = <&intc>;
interrupts = <228>;
clocks = <&clk_vo VO_AUXDISP_ACLK_EN>,
<&clk_vo VO_AUXDISP_PCLK_EN>,
<&clk_vo VO_CH2_PIXCLK_EN>,
<&clk_vo VO_HDMI_PIXCLK>,
<&clk_vo VO_MIPI_PIXCLK>,
<&clk_vo VO_DPTX_PIXCLK>;
clock-names = "aclk", "pclk", "pixclk", "hdmi_pixclk", "mipi_pixclk", "dptx_pixclk";
status = "okay";
auxdisp_out: port {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
auxdisp_to_hdmi: endpoint@0 {
reg = <0>;
remote-endpoint = <&hdmi_tx_in1>;
};
};
};
gpu: gpu@6c00000{
compatible = "img,gpu";
reg = <0x00 0x6c00000 0x0 0x100000>;
@@ -1899,9 +1933,9 @@
reg = <0x00 0x7000000 0x00 0x10000>;
interrupt-parent = <&intc>;
interrupts = <71>;
clocks = <&clk TOP_NPU_CCLK_DIV>,
<&clk TOP_NPU_ACLK_DIV>;
clock-names = "npu_cclk", "npu_aclk";
clocks = <&clk_npu SW_NPU_IP_ACLK_EN>, <&clk_npu SW_NPU_IP_CCLK_EN>,
<&clk_npu SW_NPU_IP_HCLK_EN>;
clock-names = "npu_aclk", "npu_cclk", "top_cfg_aclk";
power-domains = <&power_npu_ip>;
status = "okay";
};
@@ -1916,6 +1950,7 @@
<&clk_vp VP_G2D_ACLK_EN>,
<&clk_vp VP_G2D_CCLK_EN>;
clock-names = "pclk", "aclk", "cclk";
operating-points-v2 = <&g2d_opp_table>;
power-domains = <&power_vp_wrapper>;
status = "okay";
};
@@ -1944,14 +1979,12 @@
0x00 0x063a0028 0x0 0x4>;
interrupt-parent = <&intc>;
interrupts = <192>;
clocks = <&clk_vi VI_MIPI0_PIX_REF_SWITCH_SEL>,
<&clk_vi VI_PRE_MIPI0_PIXCLK_DIV_NUM>,
<&clk_vi VI_MIPI0_CSI0_PIXCLK_EN>,
<&clk_vi VI_MIPI0B_CFGCLK_EN>,
<&clk_vi VI_MIPI0CSI0_PCLK_EN>,
<&clk_vi VI_MIPI0CSI0_FPCLK_EN>;
clocks = <&clk_vi VI_MIPI0_CSI0_PIXCLK_EN>,
<&clk_vi VI_MIPI0B_CFGCLK_EN>,
<&clk_vi VI_MIPI0CSI0_PCLK_EN>,
<&clk_vi VI_MIPI0CSI0_FPCLK_EN>;
power-domains = <&power_vi_isp>;
clock-names = "pix_ref_sel", "pixclk_div", "pixclk", "cfg_clk", "pclk", "fpclk";
clock-names = "pixclk", "cfg_clk", "pclk", "fpclk";
phy_name = "CSI_BPHY";
status = "okay";
};
@@ -1964,14 +1997,12 @@
0x00 0x063a0028 0x0 0x4>;
interrupt-parent = <&intc>;
interrupts = <193>;
clocks = <&clk_vi VI_MIPI0_PIX_REF_SWITCH_SEL>,
<&clk_vi VI_PRE_MIPI0_PIXCLK_DIV_NUM>,
<&clk_vi VI_MIPI0_CSI1_PIXCLK_EN>,
<&clk_vi VI_MIPI0A_CFGCLK_EN>,
<&clk_vi VI_MIPI0CSI1_PCLK_EN>,
<&clk_vi VI_MIPI0CSI1_FPCLK_EN>;
clocks = <&clk_vi VI_MIPI0_CSI1_PIXCLK_EN>,
<&clk_vi VI_MIPI0A_CFGCLK_EN>,
<&clk_vi VI_MIPI0CSI1_PCLK_EN>,
<&clk_vi VI_MIPI0CSI1_FPCLK_EN>;
power-domains = <&power_vi_isp>;
clock-names = "pix_ref_sel", "pixclk_div", "pixclk", "cfg_clk", "pclk", "fpclk";
clock-names = "pixclk", "cfg_clk", "pclk", "fpclk";
phy_name = "CSI_APHY";
status = "okay";
};
@@ -1984,13 +2015,11 @@
0x00 0x063a0038 0x0 0x4>;
interrupt-parent = <&intc>;
interrupts = <194>;
clocks = <&clk_vi VI_MIPI1_PIX_REF_SWITCH_SEL>,
<&clk_vi VI_PRE_MIPI1_PIXCLK_DIV_NUM>,
<&clk_vi VI_MIPI1_CSI0_PIXCLK_EN>,
<&clk_vi VI_MIPI1B_CFGCLK_EN>,
<&clk_vi VI_MIPI1CSI0_PCLK_EN>,
<&clk_vi VI_MIPI1CSI0_FPCLK_EN>;
clock-names = "pix_ref_sel", "pixclk_div", "pixclk", "cfg_clk", "pclk", "fpclk";
clocks = <&clk_vi VI_MIPI1_CSI0_PIXCLK_EN>,
<&clk_vi VI_MIPI1B_CFGCLK_EN>,
<&clk_vi VI_MIPI1CSI0_PCLK_EN>,
<&clk_vi VI_MIPI1CSI0_FPCLK_EN>;
clock-names = "pixclk", "cfg_clk", "pclk", "fpclk";
power-domains = <&power_vi_isp>;
phy_name = "CSI_BPHY";
status = "okay";
@@ -2004,13 +2033,11 @@
0x00 0x063a0038 0x0 0x4>;
interrupt-parent = <&intc>;
interrupts = <195>;
clocks = <&clk_vi VI_MIPI1_PIX_REF_SWITCH_SEL>,
<&clk_vi VI_PRE_MIPI1_PIXCLK_DIV_NUM>,
<&clk_vi VI_MIPI1_CSI1_PIXCLK_EN>,
<&clk_vi VI_MIPI1A_CFGCLK_EN>,
<&clk_vi VI_MIPI1CSI1_PCLK_EN>,
<&clk_vi VI_MIPI1CSI1_FPCLK_EN>;
clock-names = "pix_ref_sel", "pixclk_div", "pixclk", "cfg_clk", "pclk", "fpclk";
clocks = <&clk_vi VI_MIPI1_CSI1_PIXCLK_EN>,
<&clk_vi VI_MIPI1A_CFGCLK_EN>,
<&clk_vi VI_MIPI1CSI1_PCLK_EN>,
<&clk_vi VI_MIPI1CSI1_FPCLK_EN>;
clock-names = "pixclk", "cfg_clk", "pclk", "fpclk";
power-domains = <&power_vi_isp>;
phy_name = "CSI_APHY";
status = "okay";
@@ -2021,12 +2048,18 @@
reg = <0x00 0x06340000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <200>;
clocks = <&clk_vi VI_VIPRE_ACLK_EN>,
<&clk_vi VI_VIPRE_SCLK_EN>,
<&clk_vi VI_VIPRE_I0_PIXCLK_EN>,
<&clk_vi VI_VIPRE_I1_PIXCLK_EN>,
<&clk_vi VI_VIPRE_PCLK_EN>;
clock-names = "aclk", "sclk", "i0pixclk", "i1pixclk", "pclk";
clocks = <&clk_vi VI_ARB_ACLK_EN>,
<&clk_vi VI_ARB_PCLK_EN>,
<&clk_vi VI_PTW_ACLK_EN>,
<&clk_vi VI_DFMU_ACLK_EN>,
<&clk_vi VI_DFMU_PCLK_EN>,
<&clk_vi VI_VIPRE_ACLK_EN>,
<&clk_vi VI_VIPRE_SCLK_EN>,
<&clk_vi VI_VIPRE_I0_PIXCLK_EN>,
<&clk_vi VI_VIPRE_I1_PIXCLK_EN>,
<&clk_vi VI_VIPRE_PCLK_EN>;
clock-names = "vi_arb_aclk", "vi_arb_pclk", "vi_ptw_aclk", "vi_dfmu_aclk", "vi_dfmu_pclk",
"aclk", "sclk", "i0pixclk", "i1pixclk", "pclk";
power-domains = <&power_vi_isp>;
status = "okay";
};
@@ -2045,9 +2078,31 @@
0x00 0x063A0400 0x0 0x4>;
interrupt-parent = <&intc>;
interrupts = <196>,<198>,<197>;
clocks = <&clk_vi VI_ISPOUT_CLK_EN>,
<&clk_vi VI_ISP_CLK_EN>;
clock-names = "isp_out_clk", "isp_clk";
clocks = <&clk_vi VI_ARB_ACLK_EN>,
<&clk_vi VI_ARB_PCLK_EN>,
<&clk_vi VI_PTW_ACLK_EN>,
<&clk_vi VI_DFMU_ACLK_EN>,
<&clk_vi VI_DFMU_PCLK_EN>,
<&clk_vi VI_ISPOUT_CLK_EN>,
<&clk_vi VI_ISP_CLK_EN>,
<&clk_vi VI_FENCE_ACLK_EN>,
<&clk_vi VI_X2H1_CLK_EN>,
<&clk_vi VI_X2H0_CLK_EN>,
<&clk_vi VI_MISC_CTRL_BUS_CLK_GT_DISABLE>,
<&clk_vi VI_MISC_CTRL_ISP_MCM_CLK_EN>,
<&clk_vi VI_MISC_CTRL_ISP_FLEXA_CLK_EN>,
<&clk_vi VI_MISC_CTRL_ISP_CORE_CLK_EN>,
<&clk_vi VI_MISC_CTRL_ISP_SCLK_CLK0_EN>,
<&clk_vi VI_MISC_CTRL_ISP_SCLK_CLK1_EN>,
<&clk_vi VI_MISC_CTRL_ISP_SCLK_CLK2_EN>,
<&clk_vi VI_MISC_CTRL_ISP_SCLK_CLK3_EN>,
<&clk_vi VI_MISC_CTRL_ISP_ACLK_CLK_EN>,
<&clk_vi VI_MISC_CTRL_H1CLK_CLK_EN>,
<&clk_vi VI_MISC_CTRL_H0CLK_CLK_EN>;
clock-names = "vi_arb_aclk", "vi_arb_pclk", "vi_ptw_aclk", "vi_dfmu_aclk", "vi_dfmu_pclk",
"isp_out_clk", "isp_clk", "fence_aclk", "x2h1_clk", "x2h0_clk", "bus_clk_gt_disabled",
"isp_mcm_clk", "isp_flexa_clk", "isp_core_clk", "isp_sclk_slk0", "isp_sclk_slk1",
"isp_sclk_slk2", "isp_sclk_slk3","isp_aclk_clk", "isp_h1clk_clk", "isp_h0clk_clk";
power-domains = <&power_vi_isp>;
status = "okay";
};
@@ -2059,13 +2114,21 @@
0x00 0x06350000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <209>,<211>,<210>,<199>;
clocks = <&clk_vi VI_DW_SCLK_EN>,
<&clk_vi VI_VSE_CLK_EN>,
<&clk_vi VI_DWE_CLK_EN>,
<&clk_vi VI_DW200_ACLK_EN>,
<&clk_vi VI_DW200_HCLK_EN>,
<&clk_vi VI_VSEOUT_CLK_EN>;
clock-names = "dw_sclk", "vse_clk", "dwe_clk", "dw200_aclk", "dw200_hclk", "vseout_clk";
clocks = <&clk_vi VI_ARB_ACLK_EN>,
<&clk_vi VI_ARB_PCLK_EN>,
<&clk_vi VI_PTW_ACLK_EN>,
<&clk_vi VI_DFMU_ACLK_EN>,
<&clk_vi VI_DFMU_PCLK_EN>,
<&clk_vi VI_DW_SCLK_EN>,
<&clk_vi VI_VSE_CLK_EN>,
<&clk_vi VI_DWE_CLK_EN>,
<&clk_vi VI_DW200_ACLK_EN>,
<&clk_vi VI_DW200_HCLK_EN>,
<&clk_vi VI_VSEOUT_CLK_EN>,
<&clk_vi VI_DECOUT_CLK_EN>,
<&clk_vi VI_X2H2_CLK_EN>;
clock-names = "vi_arb_aclk", "vi_arb_pclk", "vi_ptw_aclk", "vi_dfmu_aclk", "vi_dfmu_pclk",
"dw_sclk", "vse_clk", "dwe_clk", "dw200_aclk", "dw200_hclk", "vseout_clk", "decout_clk", "x2h2_clk";
power-domains = <&power_vi_isp>;
status = "okay";
};

42
arch/riscv/boot/dts/zhihe/a210-som-v1.dts
View File

@@ -105,31 +105,33 @@
};
};
Sound_Card@0 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S0";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
soc {
Sound_Card@0 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S0";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
SOUND_CARD_LINK(0, i2s, i2s0, 0, es8156_dac0, 0); /* I2S0 <-> es8156_dac0 */
SOUND_CARD_LINK(1, i2s, i2s0, 0, es7210_adc0, 0); /* I2S0 <-> es7210_adc0 */
};
SOUND_CARD_LINK(0, i2s, i2s0, 0, es8156_dac0, 0); /* I2S0 <-> es8156_dac0 */
SOUND_CARD_LINK(1, i2s, i2s0, 0, es7210_adc0, 0); /* I2S0 <-> es7210_adc0 */
};
Sound_Card@1 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S1";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
Sound_Card@1 {
compatible = "simple-audio-card";
simple-audio-card,name = "Sound-Card-I2S1";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
"Speaker", "AW87565_PA2 VO",
"AW87565_PA2 IN", "ES8156_DAC1 LOUT";
simple-audio-card,aux-devs = <&audio_aw87565_pa2>;
SOUND_CARD_LINK(0, i2s, i2s1, 0, es8156_dac1, 0);
SOUND_CARD_LINK(1, i2s, i2s1, 0, es7210_adc1, 0);
simple-audio-card,aux-devs = <&audio_aw87565_pa2>;
SOUND_CARD_LINK(0, i2s, i2s1, 0, es8156_dac1, 0);
SOUND_CARD_LINK(1, i2s, i2s1, 0, es7210_adc1, 0);
};
};
/* The bootargs in U-Boot will override the configuration set here. */

1
arch/riscv/configs/a210_evb_defconfig
View File

@@ -346,6 +346,7 @@ CONFIG_DRM_PANEL_ILITEK_ILI9881C=m
CONFIG_DRM_PANEL_JADARD_JD9365DA_H3=m
CONFIG_DRM_VERISILICON=m
CONFIG_VERISILICON_DW_DP_P100=y
CONFIG_ZHIHE_AUXDISP=y
CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y
CONFIG_BACKLIGHT_CLASS_DEVICE=m

16
drivers/clk/zhihe/clk-a210.c
View File

@@ -585,8 +585,8 @@ static struct zhihe_clk_info info_vi[] = {
GATE(VI_MIPI0CSI0_PCLK_EN, "mipi0_csi0_pclk", "vi_pclk", VI_CLK, 0, 0),
GATE(VI_MIPI0CSI1_PCLK_EN, "mipi0_csi1_pclk", "vi_pclk", VI_CLK, 0, 1),
GATE(VI_MIPI1CSI0_PCLK_EN, "mipi1_csi0_pclk", "vi_pclk", VI_CLK, 0, 6),
GATE(VI_MIPI1CSI1_PCLK_EN, "mipi1_csi1_pclk", "vi_pclk", VI_CLK, 0, 12),
GATE(VI_VIPRE_PCLK_EN, "vipre_pclk", "vi_pclk", VI_CLK, 0, 7),
GATE(VI_MIPI1CSI1_PCLK_EN, "mipi1_csi1_pclk", "vi_pclk", VI_CLK, 0, 7),
GATE(VI_VIPRE_PCLK_EN, "vipre_pclk", "vi_pclk", VI_CLK, 0, 12),
GATE(VI_DFMU_PCLK_EN, "dfmu_pclk", "vi_pclk", VI_CLK, 0x4, 0),
GATE(VI_MIPI0CSI0_FPCLK_EN, "mipi0_csi0_fpclk", "vi_pclk", VI_CLK, 0x4, 8),
GATE(VI_MIPI0CSI1_FPCLK_EN, "mipi0_csi1_fpclk", "vi_pclk", VI_CLK, 0x4, 9),
@@ -617,10 +617,10 @@ static struct zhihe_clk_info info_vi[] = {
25, MUX_TYPE_DIV, 3, 15),
MUX(VI_MIPI1_PIX_REF_SWITCH_SEL, "vi_preocc_mipi1_ifclk_mux", VI_CLK, 0x8, 21, 1,
vi_preocc_mipi1_ifclk_mux_parents, ARRAY_SIZE(vi_preocc_mipi1_ifclk_mux_parents), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT),
GATE(VI_MIPI1B_CFGCLK_EN, "mipi1_csi1_cfgclk", "aon_osc_clk_logic", VI_CLK, 0, 9),
GATE(VI_MIPI1A_CFGCLK_EN, "mipi1_csi0_cfgclk", "aon_osc_clk_logic", VI_CLK, 0, 8),
GATE(VI_MIPI0B_CFGCLK_EN, "mipi0_csi1_cfgclk", "aon_osc_clk_logic", VI_CLK, 0, 3),
GATE(VI_MIPI0A_CFGCLK_EN, "mipi0_csi0_cfgclk", "aon_osc_clk_logic", VI_CLK, 0, 2),
GATE(VI_MIPI1B_CFGCLK_EN, "mipi1_csi0_cfgclk", "aon_osc_clk_logic", VI_CLK, 0, 9),
GATE(VI_MIPI1A_CFGCLK_EN, "mipi1_csi1_cfgclk", "aon_osc_clk_logic", VI_CLK, 0, 8),
GATE(VI_MIPI0B_CFGCLK_EN, "mipi0_csi0_cfgclk", "aon_osc_clk_logic", VI_CLK, 0, 3),
GATE(VI_MIPI0A_CFGCLK_EN, "mipi0_csi1_cfgclk", "aon_osc_clk_logic", VI_CLK, 0, 2),
GATE(VI_DFMU_ACLK_EN, "dfmu_aclk", "vi_preocc_aclk", VI_CLK, 0x4, 1),
GATE(VI_PTW_ACLK_EN, "dfmu_ptw_aclk", "iommu_ptw_aclk", VI_CLK, 0x4, 2),
GATE(VI_ARB_PCLK_EN, "vi_arb_pclk", "top_cfg_aclk", VI_CLK, 0x4, 3),
@@ -631,8 +631,8 @@ static struct zhihe_clk_info info_vi[] = {
GATE(VI_FENCE_ACLK_EN, "vi_fence_aclk", "top_cfg_aclk", VI_CLK, 0x4, 12),
GATE(VI_REC_PCLK_EN, "vi_rec_pclk", "top_cfg_aclk", VI_CLK, 0x4, 13),
GATE(VI_REC_ACLK_EN, "vi_rec_aclk", "top_cfg_aclk", VI_CLK, 0x4, 14),
GATE(VI_MISC_CTRL_H0CLK_CLK_EN, "vi_misc_ctrl_h0clk", "top_cfg_aclk", VI_MISC_CTRL, 0x0, 0),
GATE(VI_MISC_CTRL_H1CLK_CLK_EN, "vi_misc_ctrl_h1clk", "top_cfg_aclk", VI_MISC_CTRL, 0x0, 1),
GATE(VI_MISC_CTRL_H0CLK_CLK_EN, "vi_misc_ctrl_h0clk", "top_cfg_aclk", VI_MISC_CTRL, 0x0, 1),
GATE(VI_MISC_CTRL_H1CLK_CLK_EN, "vi_misc_ctrl_h1clk", "top_cfg_aclk", VI_MISC_CTRL, 0x0, 2),
GATE(VI_MISC_CTRL_ISP_ACLK_CLK_EN, "vi_misc_ctrl_isp_aclk", "top_cfg_aclk", VI_MISC_CTRL, 0x0, 3),
GATE(VI_MISC_CTRL_ISP_SCLK_CLK0_EN, "vi_misc_ctrl_isp_sclk0", "top_cfg_aclk", VI_MISC_CTRL, 0x0, 4),
GATE(VI_MISC_CTRL_ISP_SCLK_CLK1_EN, "vi_misc_ctrl_isp_sclk1", "top_cfg_aclk", VI_MISC_CTRL, 0x0, 5),

183
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
View File

@@ -22,6 +22,14 @@
#include <linux/pm_runtime.h>
#include <linux/suspend.h>
#ifdef CONFIG_ZHIHE_AUXDISP
#include <linux/of.h>
#include <linux/of_device.h>
#include <drm/drm_bridge.h>
#include <drm/drm_fourcc.h>
#include <drm/drm_framebuffer.h>
#endif
#include <media/cec-notifier.h>
#include <uapi/linux/media-bus-format.h>
@@ -41,6 +49,10 @@
#include "dw-hdmi-cec.h"
#include "dw-hdmi.h"
#ifdef CONFIG_ZHIHE_AUXDISP
#define AUXDISP_DT_COMPATIBLE "zhihe,auxdisp"
#endif
#define DDC_CI_ADDR 0x37
#define DDC_SEGMENT_ADDR 0x30
@@ -1033,6 +1045,10 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi)
case MEDIA_BUS_FMT_YUV8_1X24:
case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
color_format = 0x09;
#ifdef CONFIG_ZHIHE_AUXDISP
/* auxdisp 输出的NV12 AVI值为28 */
color_format = 0x1c;
#endif
break;
case MEDIA_BUS_FMT_YUV10_1X30:
case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
@@ -2697,6 +2713,162 @@ static int dw_hdmi_connector_create(struct dw_hdmi *hdmi)
/* -----------------------------------------------------------------------------
* DRM Bridge Operations
*/
#ifdef CONFIG_ZHIHE_AUXDISP
static u32 *get_bus_input_format_for_auxdisp(struct drm_crtc_state *crtc_state, u32 *input_fmts, unsigned int *num_input_fmts){
struct device_node *crtc_port;
struct drm_plane_state *plane_state;
struct drm_framebuffer *fb = NULL;
struct drm_crtc *crtc = crtc_state->crtc;
/* 判断是哪个 CRTC */
if (crtc && crtc->port) {
crtc_port = crtc->port->parent;
if (crtc_port) {
/* 检查是否是 auxdisp */
if (!of_device_is_compatible(crtc_port, AUXDISP_DT_COMPATIBLE)) {
*num_input_fmts = 0;
return NULL;
}
}
}
/*
* 只有 AuxDisp CRTC 需要根据 framebuffer 格式设置 bus_format
*/
/* 获取 primary plane 的 framebuffer */
if (crtc_state->crtc && crtc_state->crtc->primary) {
plane_state = drm_atomic_get_new_plane_state(crtc_state->state,
crtc_state->crtc->primary);
if (plane_state)
fb = plane_state->fb;
}
/* 根据 framebuffer 的格式确定 bus_format */
if (!fb) {
*num_input_fmts = 0;
return NULL;
}
switch (fb->format->format) {
/* RGB 8bit 格式 */
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_ARGB8888:
case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_ABGR8888:
input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
break;
/* RGB 10bit 格式 */
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_ARGB2101010:
case DRM_FORMAT_XBGR2101010:
case DRM_FORMAT_ABGR2101010:
input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
break;
/* RGB565 格式 */
case DRM_FORMAT_RGB565:
case DRM_FORMAT_BGR565:
input_fmts[0] = MEDIA_BUS_FMT_RGB565_1X16;
break;
/* YUV420 8bit 格式 */
case DRM_FORMAT_NV12:
case DRM_FORMAT_NV21:
input_fmts[0] = MEDIA_BUS_FMT_UYYVYY8_0_5X24;
break;
/* YUV420 10bit 格式 */
case DRM_FORMAT_P010:
input_fmts[0] = MEDIA_BUS_FMT_UYYVYY10_0_5X30;
break;
default:
input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
break;
}
*num_input_fmts = 1;
return input_fmts;
}
static u32 *get_bus_output_format_for_auxdisp(struct drm_crtc_state *crtc_state, u32 *output_fmts, unsigned int *num_output_fmts){
struct device_node *crtc_port;
struct drm_plane_state *plane_state;
struct drm_framebuffer *fb = NULL;
struct drm_crtc *crtc = crtc_state->crtc;
if (crtc && crtc->port) {
crtc_port = crtc->port->parent;
if (crtc_port) {
/* 检查是否是 auxdisp */
if (!of_device_is_compatible(crtc_port, AUXDISP_DT_COMPATIBLE)) {
*num_output_fmts = 0;
return NULL;
}
}
}
/*
*只有 AuxDisp CRTC 需要根据 framebuffer 格式设置 bus_format
*/
/* 获取 primary plane 的 framebuffer */
if (crtc_state->crtc && crtc_state->crtc->primary) {
plane_state = drm_atomic_get_new_plane_state(crtc_state->state,
crtc_state->crtc->primary);
if (plane_state)
fb = plane_state->fb;
}
if (!fb) {
*num_output_fmts = 0;
return NULL;
}
switch (fb->format->format) {
/* RGB 8bit 格式 */
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_ARGB8888:
case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_ABGR8888:
output_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
break;
/* RGB 10bit 格式 */
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_ARGB2101010:
case DRM_FORMAT_XBGR2101010:
case DRM_FORMAT_ABGR2101010:
output_fmts[0] = MEDIA_BUS_FMT_FIXED;
break;
/* RGB565 格式 */
case DRM_FORMAT_RGB565:
case DRM_FORMAT_BGR565:
output_fmts[0] = MEDIA_BUS_FMT_RGB565_1X16;
break;
/* YUV420 8bit 格式 */
case DRM_FORMAT_NV12:
case DRM_FORMAT_NV21:
output_fmts[0] = MEDIA_BUS_FMT_UYYVYY8_0_5X24;
break;
/* YUV420 10bit 格式 */
case DRM_FORMAT_P010:
output_fmts[0] = MEDIA_BUS_FMT_UYYVYY10_0_5X30;
break;
default:
output_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
break;
}
*num_output_fmts = 1;
return output_fmts;
}
#endif
/*
* Possible output formats :
@@ -2742,6 +2914,11 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
if (!output_fmts)
return NULL;
#ifdef CONFIG_ZHIHE_AUXDISP
if(get_bus_output_format_for_auxdisp(crtc_state, output_fmts, num_output_fmts)){
return output_fmts;
}
#endif
/* If dw-hdmi is the first or only bridge, avoid negociating with ourselves */
if (list_is_singular(&bridge->encoder->bridge_chain) ||
list_is_first(&bridge->chain_node, &bridge->encoder->bridge_chain)) {
@@ -2866,6 +3043,12 @@ static u32 *dw_hdmi_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
if (!input_fmts)
return NULL;
#ifdef CONFIG_ZHIHE_AUXDISP
if(get_bus_input_format_for_auxdisp(crtc_state, input_fmts, num_input_fmts)){
return input_fmts;
}
#endif
switch (output_fmt) {
/* If MEDIA_BUS_FMT_FIXED is tested, return default bus format */
case MEDIA_BUS_FMT_FIXED:

10
drivers/gpu/drm/verisilicon/Kconfig
View File

@@ -69,3 +69,13 @@ config VERISILICON_DEC
This is a decompression function which reads compressed pixels from
external memory (DDR or SRAM) under DPU's control, then it decompress
comprssed pixels before returing these pixels to DPU.
config ZHIHE_AUXDISP
bool "Auxiliary Display CRTC support"
depends on DRM_VERISILICON
help
Enable support for auxiliary display CRTC device.
This CRTC can connect to HDMI and DisplayPort outputs,
providing additional display pipeline for external monitors.
It supports up to 10-bit color depth and multiple color formats
including RGB444, YCbCr444, and YCbCr422.

1
drivers/gpu/drm/verisilicon/Makefile
View File

@@ -15,5 +15,6 @@ vs_drm-$(CONFIG_VERISILICON_DW_HDMI_TH1520) += dw_hdmi-th1520.o
vs_drm-$(CONFIG_VERISILICON_DW_DP_P100) += dw_dp.o
vs_drm-$(CONFIG_VERISILICON_MMU) += vs_dc_mmu.o
vs_drm-$(CONFIG_VERISILICON_DEC) += vs_dc_dec.o
vs_drm-$(CONFIG_ZHIHE_AUXDISP) += auxdisp_crtc.o
obj-$(CONFIG_DRM_VERISILICON) += vs_drm.o

1285
drivers/gpu/drm/verisilicon/auxdisp_crtc.c Normal file
View File

File diff suppressed because it is too large Load Diff

50
drivers/gpu/drm/verisilicon/vs_crtc.c
View File

@@ -7,6 +7,11 @@
#include <linux/debugfs.h>
#include <linux/pm_runtime.h>
#ifdef CONFIG_ZHIHE_AUXDISP
#include <linux/of.h>
#include <drm/drm_atomic.h>
#endif
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc.h>
#include <drm/drm_modes.h>
@@ -14,6 +19,10 @@
#include "vs_crtc.h"
#ifdef CONFIG_ZHIHE_AUXDISP
#include "vs_drv.h"
#endif
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 6, 0)
#include <linux/media-bus-format.h>
#endif
@@ -301,7 +310,7 @@ static void vs_crtc_atomic_enable(struct drm_crtc *crtc,
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 6, 0)
static void vs_crtc_atomic_disable(struct drm_crtc *crtc,
struct drm_atomic_state *old_state)
struct drm_atomic_state *state)
#else
static void vs_crtc_atomic_disable(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
@@ -309,11 +318,50 @@ static void vs_crtc_atomic_disable(struct drm_crtc *crtc,
{
struct vs_crtc *vs_crtc = to_vs_crtc(crtc);
#ifdef CONFIG_ZHIHE_AUXDISP
struct drm_device *drm_dev = crtc->dev;
struct vs_drm_private *priv = drm_dev->dev_private;
bool auxdisp_enabling = false;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 6, 0)
/* 检查是否有 AuxDisp CRTC 即将启用 */
struct drm_crtc *other_crtc;
struct drm_crtc_state *old_crtc_state, *new_crtc_state;
int i;
for_each_oldnew_crtc_in_state(state, other_crtc, old_crtc_state, new_crtc_state, i) {
if (other_crtc == crtc)
continue;
/* 检查是否是 AuxDisp CRTC */
if (other_crtc->port && other_crtc->port->parent &&
of_device_is_compatible(other_crtc->port->parent, ZH_AUXDISP_COMPATIBLE)) {
/* 检查 AuxDisp 是否从 inactive → active */
if (!old_crtc_state->active && new_crtc_state->active) {
auxdisp_enabling = true;
break;
}
}
}
#endif
#endif
drm_crtc_vblank_off(crtc);
vs_crtc->funcs->disable(vs_crtc->dev, crtc);
#ifdef CONFIG_ZHIHE_AUXDISP
/* 如果检测到 AuxDisp 即将启用，不释放 PM 引用 */
if (auxdisp_enabling) {
priv->dc_clk_held_for_auxdisp = true;
} else {
/* 正常情况：立即释放 PM 引用 */
pm_runtime_put(vs_crtc->dev);
}
#else
pm_runtime_put(vs_crtc->dev);
#endif
spin_lock_irq(&crtc->dev->event_lock);
if (crtc->state->event && !crtc->state->active) {

23
drivers/gpu/drm/verisilicon/vs_dc.c
View File

@@ -347,6 +347,12 @@ static void vs_dc_set_display_path(struct device *dev, struct drm_atomic_state *
static void vs_dc_enable(struct device *dev, struct drm_crtc *crtc, struct drm_atomic_state *state)
{
struct vs_dc *dc = dev_get_drvdata(dev);
#ifdef CONFIG_ZHIHE_AUXDISP
struct drm_device *drm_dev = crtc->dev;
struct vs_drm_private *priv = drm_dev->dev_private;
#endif
struct vs_crtc_state *crtc_state = to_vs_crtc_state(crtc->state);
struct drm_display_mode *mode = &crtc->state->adjusted_mode;
struct dc_hw_display display;
@@ -402,6 +408,13 @@ static void vs_dc_enable(struct device *dev, struct drm_crtc *crtc, struct drm_a
if (dc->is_zhihe_a210)
vs_dc_set_display_path(dev, state, dc, crtc);
#ifdef CONFIG_ZHIHE_AUXDISP
if (priv->auxdisp_clk_held_for_dc && priv->auxdisp_dev) {
priv->auxdisp_clk_held_for_dc = false;
pm_runtime_put(priv->auxdisp_dev);
}
#endif
}
static void vs_dc_disable(struct device *dev, struct drm_crtc *crtc)
@@ -991,7 +1004,7 @@ static const struct vs_dc_funcs dc_funcs = {
static int dc_bind(struct device *dev, struct device *master, void *data)
{
struct drm_device *drm_dev = data;
#ifdef CONFIG_VERISILICON_MMU
#if defined(CONFIG_VERISILICON_MMU) || defined(CONFIG_ZHIHE_AUXDISP)
struct vs_drm_private *priv = drm_dev->dev_private;
#endif
struct vs_dc *dc = dev_get_drvdata(dev);
@@ -1009,6 +1022,12 @@ static int dc_bind(struct device *dev, struct device *master, void *data)
return -ENODEV;
}
#ifdef CONFIG_ZHIHE_AUXDISP
/* 注册 DC8200 设备到共享状态，用于 AuxDisp 切换协调 */
priv->dc_dev = dev;
dev_info(dev, "DC8200: Registered device for AuxDisp coordination\n");
#endif
ret = dc_init(dev);
if (ret < 0) {
dev_err(dev, "Failed to initialize DC hardware.\n");
@@ -1147,7 +1166,7 @@ const struct component_ops dc_component_ops = {
};
static const struct of_device_id dc_driver_dt_match[] = {
{ .compatible = "verisilicon,dc8200", },
{ .compatible = VS_DC8200_COMPATIBLE },
{},
};
MODULE_DEVICE_TABLE(of, dc_driver_dt_match);

15
drivers/gpu/drm/verisilicon/vs_drv.c
View File

@@ -466,6 +466,14 @@ static int vs_drm_bind(struct device *dev)
priv->dma_dev = drm_dev->dev;
priv->dma_dev->coherent_dma_mask = dma_mask;
#ifdef CONFIG_ZHIHE_AUXDISP
/* 初始化 DC8200 ↔ AuxDisp 切换状态 */
priv->dc_dev = NULL;
priv->auxdisp_dev = NULL;
priv->dc_clk_held_for_auxdisp = false;
priv->auxdisp_clk_held_for_dc = false;
#endif
drm_dev->dev_private = priv;
drm_mode_config_init(drm_dev);
@@ -567,10 +575,17 @@ static const struct component_master_ops vs_drm_ops = {
};
extern struct platform_driver dw_dp_driver;
extern struct platform_driver auxdisp_crtc_driver;
static struct platform_driver *drm_sub_drivers[] = {
/* put display control driver at start */
&dc_platform_driver,
/* auxiliary display CRTC */
#ifdef CONFIG_ZHIHE_AUXDISP
&auxdisp_crtc_driver,
#endif
/* connector */
/* bridge */

12
drivers/gpu/drm/verisilicon/vs_drv.h
View File

@@ -44,6 +44,13 @@ struct vs_drm_private {
#endif
unsigned int pitch_alignment;
#ifdef CONFIG_ZHIHE_AUXDISP
struct device *dc_dev; /* DC8200 设备指针 */
struct device *auxdisp_dev; /* AuxDisp 设备指针 */
bool dc_clk_held_for_auxdisp; /* DC8200 时钟是否被 AuxDisp 持有 */
bool auxdisp_clk_held_for_dc; /* AuxDisp 时钟是否被 DC8200 持有 */
#endif
};
int vs_drm_iommu_attach_device(struct drm_device *drm_dev,
@@ -68,4 +75,9 @@ static inline bool is_iommu_enabled(struct drm_device *dev)
return priv->domain != NULL ? true : false;
}
/* Device compatible strings */
#define VS_DC8200_COMPATIBLE "verisilicon,dc8200"
#define ZH_AUXDISP_COMPATIBLE "zhihe,auxdisp"
#endif /* __VS_DRV_H__ */

49
drivers/gpu/drm/verisilicon/vs_fb.c
View File

@@ -17,10 +17,13 @@
#endif
#include <drm/drm_gem.h>
#include <drm/drm_crtc.h>
#include <drm/drm_connector.h>
#include <drm/drm_damage_helper.h>
#include <drm/drm_fb_helper.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_gem_framebuffer_helper.h>
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include "vs_fb.h"
#include "vs_gem.h"
@@ -166,10 +169,54 @@ vs_get_format_info(const struct drm_mode_fb_cmd2 *cmd)
return NULL;
}
static int vs_drm_atomic_check(struct drm_device *dev,
struct drm_atomic_state *state)
{
#ifdef CONFIG_ZHIHE_AUXDISP
struct drm_connector *connector;
struct drm_connector_state *old_conn_state, *new_conn_state;
int i;
for_each_oldnew_connector_in_state(state, connector, old_conn_state, new_conn_state, i) {
struct drm_crtc *old_crtc = old_conn_state->crtc;
struct drm_crtc *new_crtc = new_conn_state->crtc;
struct drm_crtc_state *old_crtc_state;
struct drm_connector *conn2;
struct drm_connector_state *conn2_state;
bool has_other_connectors;
int j;
if (!old_crtc || !new_crtc || old_crtc == new_crtc)
continue;
old_crtc_state = drm_atomic_get_crtc_state(state, old_crtc);
if (IS_ERR(old_crtc_state))
return PTR_ERR(old_crtc_state);
has_other_connectors = false;
for_each_new_connector_in_state(state, conn2, conn2_state, j) {
if (conn2 == connector)
continue;
if (conn2_state->crtc == old_crtc) {
has_other_connectors = true;
break;
}
}
if (!has_other_connectors) {
old_crtc_state->enable = false;
old_crtc_state->active = false;
}
}
#endif
return drm_atomic_helper_check(dev, state);
}
static const struct drm_mode_config_funcs vs_mode_config_funcs = {
.fb_create = vs_fb_create,
.get_format_info = vs_get_format_info,
.atomic_check = drm_atomic_helper_check,
.atomic_check = vs_drm_atomic_check,
.atomic_commit = drm_atomic_helper_commit,
};