Merge remote-tracking branch 'internal/k1-release' into k1-bl-v2.2.y
This commit is contained in:
@@ -8,5 +8,5 @@ dtb-$(CONFIG_SOC_SPACEMIT_K1X) += k1-x_fpga.dtb k1-x_fpga_1x4.dtb k1-x_fpga_2x2.
|
||||
k1-x_baton-camera.dtb k1-x_FusionOne.dtb k1-x_InnoBoard-Pi.dtb \
|
||||
k1-x_ZT001H.dtb k1-x_uav.dtb k1-x_MUSE-Paper2.dtb \
|
||||
k1-x_bit-brick.dtb k1-x_LX-V10.dtb k1-x_NetBridge-C1.dtb \
|
||||
k1-x_MUSE-Pi-Pro.dtb k1-x_som.dtb
|
||||
k1-x_MUSE-Pi-Pro.dtb k1-x_som.dtb k1-x_ZT_RVOH007.dtb k1-x_RV4B.dtb
|
||||
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
|
||||
|
||||
@@ -426,39 +426,45 @@
|
||||
ranges;
|
||||
|
||||
/* rcpu's heap */
|
||||
rcpu_mem_heap: rcpu_mem_heap@30000000 {
|
||||
reg = <0x0 0x30000000 0x0 0x200000>;
|
||||
rcpu_mem_heap: rcpu_mem_heap@100000 {
|
||||
reg = <0x0 0x100000 0x0 0x200000>;
|
||||
da_base = <0x30000000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
/* vring0 */
|
||||
vdev0vring0: vdev0vring0@30200000 {
|
||||
reg = <0x0 0x30200000 0x0 0x3000>;
|
||||
vdev0vring0: vdev0vring0@300000 {
|
||||
reg = <0x0 0x300000 0x0 0x3000>;
|
||||
da_base = <0x30200000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
/* vring1 */
|
||||
vdev0vring1: vdev0vring1@30203000 {
|
||||
reg = <0x0 0x30203000 0x0 0x3000>;
|
||||
vdev0vring1: vdev0vring1@303000 {
|
||||
reg = <0x0 0x303000 0x0 0x3000>;
|
||||
da_base = <0x30203000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
/* share memory buffer */
|
||||
vdev0buffer: vdev0buffer@30206000 {
|
||||
vdev0buffer: vdev0buffer@306000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x0 0x30206000 0x0 0xf6000>;
|
||||
reg = <0x0 0x306000 0x0 0xf6000>;
|
||||
da_base = <0x30206000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
/* the resource table */
|
||||
rsc_table: rsc_table@302fc000 {
|
||||
reg = <0x0 0x302fc000 0x0 0x4000>;
|
||||
rsc_table: rsc_table@3fc000 {
|
||||
reg = <0x0 0x3fc000 0x0 0x4000>;
|
||||
da_base = <0x302fc000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
/* used for rcpu code & data & bss space */
|
||||
rcpu_mem_0: rcpu_mem_0@30300000 {
|
||||
reg = <0x0 0x30300000 0x0 0x200000>;
|
||||
rcpu_mem_0: rcpu_mem_0@400000 {
|
||||
reg = <0x0 0x400000 0x0 0x200000>;
|
||||
da_base = <0x30300000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
@@ -559,6 +565,16 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* for rcpu vqueue buffer . */
|
||||
dram_range8: dram_range@8 {
|
||||
compatible = "spacemit-dram-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
dma-ranges = <0x0 0x30200000 0x0 0x300000 0x0 0xfc000>;
|
||||
#interconnect-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
clint0: clint@e4000000 {
|
||||
compatible = "riscv,clint0";
|
||||
interrupts-extended = <
|
||||
@@ -1022,7 +1038,7 @@
|
||||
compatible = "spacemit,k1-x-rproc";
|
||||
reg = <0 0xc088c000 0 0x1000>,
|
||||
<0 0xc0880000 0 0x200>;
|
||||
ddr-remap-base = <0x30000000>;
|
||||
ddr-remap-base = <0x100000>;
|
||||
esos-entry-point = <0x30300114>;
|
||||
clocks = <&ccu CLK_AUDIO>, <&ccu CLK_AUDIO_APB>;
|
||||
clock-names = "core", "apb";
|
||||
@@ -1033,6 +1049,8 @@
|
||||
mbox-names = "vq0", "vq1";
|
||||
firmware-name = "esos.elf";
|
||||
power-domains = <&power K1X_PMU_AUD_PWR_DOMAIN>;
|
||||
interconnects = <&dram_range8>;
|
||||
interconnect-names = "dma-mem";
|
||||
memory-region = <&rcpu_mem_0>, <&rcpu_mem_heap>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>, <&rsc_table>;
|
||||
status = "okay";
|
||||
};
|
||||
@@ -2116,7 +2134,7 @@
|
||||
reg = <0x0 0xc0b10000 0x0 0x800>,
|
||||
<0x0 0xd4282910 0x0 0x400>;
|
||||
reg-names = "puphy", "phy_sel";
|
||||
resets = <&reset RESET_PCIE0>;
|
||||
resets = <&reset RESET_COMBO_PHY>;
|
||||
reset-names = "phy_rst";
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
|
||||
@@ -169,7 +169,7 @@
|
||||
led1 {
|
||||
label = "sys-led";
|
||||
gpios = <&gpio 96 0>;
|
||||
linux,default-trigger = "none";
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "on";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
1109
arch/riscv/boot/dts/spacemit/k1-x_RV4B.dts
Normal file
1109
arch/riscv/boot/dts/spacemit/k1-x_RV4B.dts
Normal file
File diff suppressed because it is too large
Load Diff
1012
arch/riscv/boot/dts/spacemit/k1-x_ZT_RVOH007.dts
Normal file
1012
arch/riscv/boot/dts/spacemit/k1-x_ZT_RVOH007.dts
Normal file
File diff suppressed because it is too large
Load Diff
155
arch/riscv/boot/dts/spacemit/lcd/lcd_hxdm101_mipi.dtsi
Normal file
155
arch/riscv/boot/dts/spacemit/lcd/lcd_hxdm101_mipi.dtsi
Normal file
@@ -0,0 +1,155 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
/ { lcds: lcds {
|
||||
lcd_hxdm101_mipi: lcd_hxdm101_mipi {
|
||||
dsi-work-mode = <1>; /* video burst mode*/
|
||||
dsi-lane-number = <4>;
|
||||
dsi-color-format = "rgb888";
|
||||
width-mm = <135>;
|
||||
height-mm = <216>;
|
||||
use-dcs-write;
|
||||
|
||||
/*mipi info*/
|
||||
height = <1920>;
|
||||
width = <1200>;
|
||||
hfp = <80>;
|
||||
hbp = <50>;
|
||||
hsync = <10>;
|
||||
vfp = <60>;
|
||||
vbp = <25>;
|
||||
vsync = <4>;
|
||||
fps = <60>;
|
||||
work-mode = <0>;
|
||||
rgb-mode = <3>;
|
||||
lane-number = <4>;
|
||||
phy-bit-clock = <1000000000>;
|
||||
phy-esc-clock = <76800000>;
|
||||
split-enable = <0>;
|
||||
eotp-enable = <0>;
|
||||
burst-mode = <2>;
|
||||
esd-check-enable = <0>;
|
||||
|
||||
/* DSI_CMD, DSI_MODE, timeout, len, cmd */
|
||||
initial-command = [
|
||||
39 01 00 02 B0 00
|
||||
39 01 00 02 B2 50
|
||||
39 01 00 02 B0 01
|
||||
39 01 00 02 C0 00
|
||||
39 01 00 02 C1 17
|
||||
39 01 00 02 C2 01
|
||||
39 01 00 02 C3 26
|
||||
39 01 00 02 C4 00
|
||||
39 01 00 02 C5 23
|
||||
39 01 00 02 C6 11
|
||||
39 01 00 02 C7 05
|
||||
39 01 00 02 C8 07
|
||||
39 01 00 02 C9 09
|
||||
39 01 00 02 CA 0B
|
||||
39 01 00 02 CB 1B
|
||||
39 01 00 02 CC 1D
|
||||
39 01 00 02 CD 1F
|
||||
39 01 00 02 CE 21
|
||||
39 01 00 02 CF 0F
|
||||
39 01 00 02 D0 0D
|
||||
39 01 00 02 D1 00
|
||||
39 01 00 02 D2 00
|
||||
39 01 00 02 D3 00
|
||||
39 01 00 02 D4 00
|
||||
39 01 00 02 D5 18
|
||||
39 01 00 02 D6 02
|
||||
39 01 00 02 D7 26
|
||||
39 01 00 02 D8 00
|
||||
39 01 00 02 D9 23
|
||||
39 01 00 02 DA 11
|
||||
39 01 00 02 DB 06
|
||||
39 01 00 02 DC 08
|
||||
39 01 00 02 DD 0A
|
||||
39 01 00 02 DE 0C
|
||||
39 01 00 02 DF 1C
|
||||
39 01 00 02 E0 1E
|
||||
39 01 00 02 E1 20
|
||||
39 01 00 02 E2 22
|
||||
39 01 00 02 E3 10
|
||||
39 01 00 02 E4 0E
|
||||
39 01 00 02 E5 00
|
||||
39 01 00 02 E6 00
|
||||
39 01 00 02 E7 00
|
||||
39 01 00 02 B0 03
|
||||
39 01 00 02 BE 04
|
||||
39 01 00 02 B9 40
|
||||
39 01 00 02 CC 88
|
||||
39 01 00 02 C8 0C
|
||||
39 01 00 02 C9 07
|
||||
39 01 00 02 CD 01
|
||||
39 01 00 02 CA 40
|
||||
39 01 00 02 CE 1A
|
||||
39 01 00 02 CF 60
|
||||
39 01 00 02 D2 08
|
||||
39 01 00 02 D3 08
|
||||
39 01 00 02 DB 01
|
||||
39 01 00 02 D9 06
|
||||
39 01 00 02 D4 00
|
||||
39 01 00 02 D5 01
|
||||
39 01 00 02 D6 04
|
||||
39 01 00 02 D7 03
|
||||
39 01 00 02 C2 00
|
||||
39 01 00 02 C3 0E
|
||||
39 01 00 02 C4 00
|
||||
39 01 00 02 C5 0E
|
||||
39 01 00 02 DD 00
|
||||
39 01 00 02 DE 0E
|
||||
39 01 00 02 E6 00
|
||||
39 01 00 02 E7 0E
|
||||
39 01 00 02 C2 00
|
||||
39 01 00 02 C3 0E
|
||||
39 01 00 02 C4 00
|
||||
39 01 00 02 C5 0E
|
||||
39 01 00 02 DD 00
|
||||
39 01 00 02 DE 0E
|
||||
39 01 00 02 E6 00
|
||||
39 01 00 02 E7 0E
|
||||
39 01 00 02 B0 06
|
||||
39 01 00 02 C0 A5
|
||||
39 01 00 02 D5 1C
|
||||
39 01 00 02 C0 00
|
||||
39 01 00 02 B0 00
|
||||
39 01 00 02 BD 17
|
||||
39 01 00 02 BA 8F
|
||||
39 01 00 02 F9 5C
|
||||
39 01 00 02 C2 14
|
||||
39 01 00 02 C4 14
|
||||
39 01 00 02 BF 1A
|
||||
39 01 00 02 C0 11
|
||||
39 01 96 01 11
|
||||
39 01 32 01 29
|
||||
];
|
||||
sleep-in-command = [
|
||||
39 01 78 01 28
|
||||
39 01 78 01 10
|
||||
];
|
||||
sleep-out-command = [
|
||||
39 01 96 01 11
|
||||
39 01 32 01 29
|
||||
];
|
||||
read-id-command = [
|
||||
37 01 00 01 05
|
||||
14 01 00 05 fb fc fd fe ff
|
||||
];
|
||||
|
||||
display-timings {
|
||||
timing0 {
|
||||
clock-frequency = <153600000>;
|
||||
hactive = <1200>;
|
||||
hfront-porch = <80>;
|
||||
hback-porch = <50>;
|
||||
hsync-len = <10>;
|
||||
vactive = <1920>;
|
||||
vfront-porch = <60>;
|
||||
vback-porch = <25>;
|
||||
vsync-len = <4>;
|
||||
vsync-active = <1>;
|
||||
hsync-active = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};};
|
||||
@@ -50,6 +50,7 @@ CONFIG_SMP=y
|
||||
CONFIG_NR_CPUS=8
|
||||
CONFIG_RISCV_SBI_V01=y
|
||||
# CONFIG_RISCV_BOOT_SPINWAIT is not set
|
||||
CONFIG_IMAGE_LOAD_OFFSET=0x600000
|
||||
CONFIG_SUSPEND_SKIP_SYNC=y
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
@@ -1156,7 +1157,7 @@ CONFIG_JFFS2_COMPRESSION_OPTIONS=y
|
||||
CONFIG_JFFS2_LZO=y
|
||||
CONFIG_JFFS2_RUBIN=y
|
||||
CONFIG_JFFS2_CMODE_NONE=y
|
||||
CONFIG_UBIFS_FS=m
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_UBIFS_FS_AUTHENTICATION=y
|
||||
CONFIG_CRAMFS=m
|
||||
CONFIG_CRAMFS_MTD=y
|
||||
@@ -1309,8 +1310,6 @@ CONFIG_CRYPTO_SM3_GENERIC=m
|
||||
CONFIG_CRYPTO_VMAC=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_DEFLATE=y
|
||||
CONFIG_CRYPTO_LZO=y
|
||||
CONFIG_CRYPTO_842=m
|
||||
CONFIG_CRYPTO_LZ4=m
|
||||
CONFIG_CRYPTO_LZ4HC=m
|
||||
|
||||
@@ -44,8 +44,8 @@ SYM_CODE_START(_start)
|
||||
.dword 0
|
||||
#else
|
||||
#if __riscv_xlen == 64
|
||||
/* Image load offset(2MB) from start of RAM */
|
||||
.dword 0x200000
|
||||
/* Image load offset(2MB ?) from start of RAM */
|
||||
.dword CONFIG_IMAGE_LOAD_OFFSET
|
||||
#else
|
||||
/* Image load offset(4MB) from start of RAM */
|
||||
.dword 0x400000
|
||||
|
||||
@@ -71,6 +71,8 @@ struct spacemit_hdmi {
|
||||
|
||||
unsigned int tmds_rate;
|
||||
|
||||
struct mutex lock;
|
||||
bool suspended;
|
||||
bool edid_done;
|
||||
bool use_no_edid;
|
||||
struct hdmi_data_info *hdmi_data;
|
||||
@@ -752,6 +754,14 @@ spacemit_hdmi_connector_detect(struct drm_connector *connector, bool force)
|
||||
|
||||
DRM_DEBUG("%s() \n", __func__);
|
||||
|
||||
mutex_lock(&hdmi->lock);
|
||||
if (hdmi->suspended) {
|
||||
DRM_DEBUG("%s() hdmi is suspended\n", __func__);
|
||||
mutex_unlock(&hdmi->lock);
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
mutex_unlock(&hdmi->lock);
|
||||
|
||||
ret = pm_runtime_get_sync(hdmi->dev);
|
||||
if (ret < 0) {
|
||||
DRM_INFO("%s() pm_runtime_get_sync failed\n", __func__);
|
||||
@@ -976,6 +986,8 @@ static int spacemit_hdmi_bind(struct device *dev, struct device *master,
|
||||
|
||||
spacemit_hdmi_reset(hdmi);
|
||||
hdmi->edid_done = false;
|
||||
hdmi->suspended = false;
|
||||
mutex_init(&hdmi->lock);
|
||||
|
||||
ret = spacemit_hdmi_register(drm, hdmi);
|
||||
|
||||
@@ -1006,6 +1018,8 @@ static void spacemit_hdmi_unbind(struct device *dev, struct device *master,
|
||||
hdmi->connector.funcs->destroy(&hdmi->connector);
|
||||
hdmi->encoder.funcs->destroy(&hdmi->encoder);
|
||||
|
||||
mutex_destroy(&hdmi->lock);
|
||||
|
||||
pm_runtime_put_sync(&pdev->dev);
|
||||
if (!IS_ERR_OR_NULL(hdmi->hdmi_reset)) {
|
||||
ret = reset_control_assert(hdmi->hdmi_reset);
|
||||
@@ -1077,6 +1091,9 @@ static int hdmi_drv_pm_suspend(struct device *dev)
|
||||
|
||||
DRM_DEBUG("%s()\n", __func__);
|
||||
|
||||
mutex_lock(&hdmi->lock);
|
||||
hdmi->suspended = true;
|
||||
|
||||
value = hdmi_readb(hdmi, SPACEMIT_HDMI_PHY_STATUS);
|
||||
value &= (~SPACEMIT_HDMI_HPD_IQR_MASK);
|
||||
value |= SPACEMIT_HDMI_HPD_IQR;
|
||||
@@ -1084,6 +1101,7 @@ static int hdmi_drv_pm_suspend(struct device *dev)
|
||||
udelay(5);
|
||||
|
||||
clk_disable_unprepare(hdmi->hdmi_mclk);
|
||||
mutex_unlock(&hdmi->lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -1095,6 +1113,7 @@ static int hdmi_drv_pm_resume(struct device *dev)
|
||||
|
||||
DRM_DEBUG("%s()\n", __func__);
|
||||
|
||||
mutex_lock(&hdmi->lock);
|
||||
clk_prepare_enable(hdmi->hdmi_mclk);
|
||||
udelay(5);
|
||||
|
||||
@@ -1102,6 +1121,13 @@ static int hdmi_drv_pm_resume(struct device *dev)
|
||||
value |= SPACEMIT_HDMI_HPD_IQR_MASK;
|
||||
hdmi_writeb(hdmi, SPACEMIT_HDMI_PHY_STATUS, value);
|
||||
|
||||
hdmi->suspended = false;
|
||||
mutex_unlock(&hdmi->lock);
|
||||
|
||||
if (hdmi_get_plug_in_status(hdmi)) {
|
||||
drm_helper_hpd_irq_event(hdmi->connector.dev);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -1385,25 +1385,25 @@ static int camsnr_of_parse(struct cam_sensor_device *sensor)
|
||||
}
|
||||
sensor->dphy_no = (u8) dphy_no;
|
||||
|
||||
sensor->afvdd = devm_regulator_get_exclusive(dev, "af_2v8");
|
||||
sensor->afvdd = devm_regulator_get(dev, "af_2v8");
|
||||
if (IS_ERR(sensor->afvdd)) {
|
||||
cam_dbg("Failed to get regulator, guess sensor no need to control af_2v8\n");
|
||||
sensor->afvdd = NULL;
|
||||
}
|
||||
|
||||
sensor->avdd = devm_regulator_get_exclusive(dev, "avdd_2v8");
|
||||
sensor->avdd = devm_regulator_get(dev, "avdd_2v8");
|
||||
if (IS_ERR(sensor->avdd)) {
|
||||
cam_dbg("Failed to get regulator, guess sensor no need to control avdd_2v8\n");
|
||||
sensor->avdd = NULL;
|
||||
}
|
||||
|
||||
sensor->dovdd = devm_regulator_get_exclusive(dev, "dovdd_1v8");
|
||||
sensor->dovdd = devm_regulator_get(dev, "dovdd_1v8");
|
||||
if (IS_ERR(sensor->dovdd)) {
|
||||
cam_dbg("Failed to get regulator, guess sensor no need to control dovdd_1v8\n");
|
||||
sensor->dovdd = NULL;
|
||||
}
|
||||
|
||||
sensor->dvdd = devm_regulator_get_exclusive(dev, "dvdd_1v2");
|
||||
sensor->dvdd = devm_regulator_get(dev, "dvdd_1v2");
|
||||
if (IS_ERR(sensor->dvdd)) {
|
||||
cam_dbg("Failed to get regulator, guess sensor no need to control dvdd_1v2\n");
|
||||
sensor->dvdd = NULL;
|
||||
|
||||
@@ -1424,8 +1424,10 @@ static void spacemit_sdhci_request_done(struct sdhci_host *host,
|
||||
|
||||
mmc_request_done(host->mmc, mrq);
|
||||
|
||||
if (!(host->mmc->caps2 & MMC_CAP2_NO_SDIO))
|
||||
if (!(host->mmc->caps2 & MMC_CAP2_NO_SDIO)) {
|
||||
atomic_dec(&pdata->ref_count);
|
||||
wake_up(&pdata->wait_queue);
|
||||
}
|
||||
}
|
||||
|
||||
static const struct sdhci_ops spacemit_sdhci_ops = {
|
||||
|
||||
@@ -86,7 +86,7 @@ static void emac_configure_rx(struct emac_priv *priv);
|
||||
static int emac_tx_mem_map(struct emac_priv *priv, struct sk_buff *skb, u32 max_tx_len, u32 frag_num);
|
||||
static int emac_tx_clean_desc(struct emac_priv *priv);
|
||||
static int emac_rx_clean_desc(struct emac_priv *priv, int budget);
|
||||
static void emac_alloc_rx_desc_buffers(struct emac_priv *priv);
|
||||
static int emac_alloc_rx_desc_buffers(struct emac_priv *priv);
|
||||
static int emac_phy_connect(struct net_device *dev);
|
||||
static int emac_sw_init(struct emac_priv *priv);
|
||||
|
||||
@@ -433,7 +433,11 @@ static int emac_up(struct emac_priv *priv)
|
||||
emac_configure_rx(priv);
|
||||
|
||||
/* allocate buffers for receive descriptors */
|
||||
emac_alloc_rx_desc_buffers(priv);
|
||||
ret = emac_alloc_rx_desc_buffers(priv);
|
||||
if (ret) {
|
||||
pr_err("%s alloc rx desc buffers failed\n", __func__);
|
||||
goto err;
|
||||
}
|
||||
|
||||
if (ndev->phydev)
|
||||
phy_start(ndev->phydev);
|
||||
@@ -786,48 +790,54 @@ static int emac_rx_clean_desc(struct emac_priv *priv, int budget)
|
||||
rx_buf->dma_len, DMA_FROM_DEVICE);
|
||||
|
||||
status = emac_rx_frame_status(priv, rx_desc);
|
||||
if (unlikely(status == frame_discard)) {
|
||||
dev_kfree_skb_irq(rx_buf->skb);
|
||||
rx_buf->skb = NULL;
|
||||
} else {
|
||||
if (likely(status != frame_discard)) {
|
||||
skb = rx_buf->skb;
|
||||
skb_len = rx_desc->FramePacketLength - ETHERNET_FCS_SIZE;
|
||||
ecdev_receive(priv->ecdev,skb->data,skb_len);
|
||||
dev_kfree_skb_irq(rx_buf->skb);
|
||||
rx_buf->skb = NULL;
|
||||
ecdev_receive(priv->ecdev, skb->data, skb_len);
|
||||
}
|
||||
|
||||
if (++i == rx_ring->total_cnt)
|
||||
rx_buf->dma_addr = dma_map_single(&priv->pdev->dev,
|
||||
skb->data,
|
||||
priv->dma_buf_sz,
|
||||
DMA_FROM_DEVICE);
|
||||
|
||||
memset(rx_desc, 0, sizeof(struct emac_rx_desc));
|
||||
|
||||
rx_desc->BufferAddr1 = rx_buf->dma_addr;
|
||||
rx_desc->BufferSize1 = rx_buf->dma_len;
|
||||
|
||||
if (++i == rx_ring->total_cnt) {
|
||||
rx_desc->EndRing = 1;
|
||||
i = 0;
|
||||
}
|
||||
dma_wmb();
|
||||
rx_desc->OWN = 1;
|
||||
}
|
||||
|
||||
rx_ring->tail = i;
|
||||
emac_alloc_rx_desc_buffers(priv);
|
||||
return receive_packet;
|
||||
}
|
||||
|
||||
/* Name emac_alloc_rx_desc_buffers
|
||||
* Arguments priv : pointer to driver private data structure
|
||||
* Return 1: Cleaned; 0:Failed
|
||||
* Return -1: fail; 0:success
|
||||
* Description
|
||||
*/
|
||||
static void emac_alloc_rx_desc_buffers(struct emac_priv *priv)
|
||||
static int emac_alloc_rx_desc_buffers(struct emac_priv *priv)
|
||||
{
|
||||
struct net_device *ndev = priv->ndev;
|
||||
struct emac_desc_ring *rx_ring = &priv->rx_ring;
|
||||
struct emac_desc_buffer *rx_buf;
|
||||
struct sk_buff *skb;
|
||||
struct sk_buff *skb = NULL;
|
||||
struct emac_rx_desc *rx_desc;
|
||||
u32 i;
|
||||
|
||||
i = rx_ring->head;
|
||||
rx_buf = &rx_ring->desc_buf[i];
|
||||
for (int i = 0; i < rx_ring->total_cnt; ++i) {
|
||||
rx_buf = &rx_ring->desc_buf[i];
|
||||
|
||||
while (!rx_buf->skb) {
|
||||
skb = netdev_alloc_skb_ip_align(ndev, priv->dma_buf_sz);
|
||||
if (!skb) {
|
||||
pr_err("sk_buff allocation failed\n");
|
||||
break;
|
||||
goto err_out;
|
||||
}
|
||||
|
||||
skb->dev = ndev;
|
||||
@@ -840,7 +850,9 @@ static void emac_alloc_rx_desc_buffers(struct emac_priv *priv)
|
||||
DMA_FROM_DEVICE);
|
||||
if (dma_mapping_error(&priv->pdev->dev, rx_buf->dma_addr)) {
|
||||
netdev_err(ndev, "dma mapping_error\n");
|
||||
goto dma_map_err;
|
||||
dev_kfree_skb_any(skb);
|
||||
rx_buf->skb = NULL;
|
||||
goto err_out;
|
||||
}
|
||||
|
||||
rx_desc = &((struct emac_rx_desc *)rx_ring->desc_addr)[i];
|
||||
@@ -852,25 +864,19 @@ static void emac_alloc_rx_desc_buffers(struct emac_priv *priv)
|
||||
|
||||
rx_desc->FirstDescriptor = 0;
|
||||
rx_desc->LastDescriptor = 0;
|
||||
if (++i == rx_ring->total_cnt) {
|
||||
if (i == rx_ring->total_cnt - 1)
|
||||
rx_desc->EndRing = 1;
|
||||
i = 0;
|
||||
}
|
||||
dma_wmb();
|
||||
rx_desc->OWN = 1;
|
||||
|
||||
rx_buf = &rx_ring->desc_buf[i];
|
||||
}
|
||||
rx_ring->head = i;
|
||||
return;
|
||||
|
||||
dma_map_err:
|
||||
dev_kfree_skb_any(skb);
|
||||
rx_buf->skb = NULL;
|
||||
return;
|
||||
return 0;
|
||||
|
||||
err_out:
|
||||
emac_clean_rx_desc_ring(priv);
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
/* Name emac_tx_mem_map
|
||||
* Arguments priv : pointer to driver private data structure
|
||||
* pstSkb : pointer to sk_buff structure passed by upper layer
|
||||
@@ -1590,7 +1596,7 @@ static int emac_probe(struct platform_device *pdev)
|
||||
priv->reset = devm_reset_control_get_optional(&pdev->dev, NULL);
|
||||
if (IS_ERR(priv->reset)) {
|
||||
dev_err(&pdev->dev, "Failed to get emac's resets\n");
|
||||
goto mac_clk_disable;
|
||||
goto phy_clk_disable;
|
||||
}
|
||||
|
||||
reset_control_deassert(priv->reset);
|
||||
@@ -1626,6 +1632,9 @@ err_mdio_deinit:
|
||||
emac_mdio_deinit(priv);
|
||||
reset_assert:
|
||||
reset_control_assert(priv->reset);
|
||||
phy_clk_disable:
|
||||
if (priv->ref_clk_frm_soc)
|
||||
clk_disable_unprepare(priv->phy_clk);
|
||||
mac_clk_disable:
|
||||
clk_disable_unprepare(priv->mac_clk);
|
||||
err_netdev:
|
||||
|
||||
@@ -1990,6 +1990,11 @@ static struct rtw_phl_scan_param *_alloc_phl_param(_adapter *adapter, u8 scan_ch
|
||||
struct rtw_phl_scan_param *phl_param = NULL;
|
||||
struct scan_priv *scan_priv = NULL;
|
||||
|
||||
if (adapter->phl_role == NULL) {
|
||||
RTW_ERR(FUNC_ADPT_FMT" phl_role == NULL\n", FUNC_ADPT_ARG(adapter));
|
||||
goto _err_exit;
|
||||
}
|
||||
|
||||
if (scan_ch_num == 0) {
|
||||
RTW_ERR("%s scan_ch_num = 0\n", __func__);
|
||||
goto _err_exit;
|
||||
|
||||
@@ -995,6 +995,12 @@ enum rtw_phl_status rtw_phl_init(void *drv_priv, void **phl,
|
||||
goto error_vers_check;
|
||||
}
|
||||
|
||||
if (false == rtw_phl_regu_interface_init(phl_info)) {
|
||||
phl_status = RTW_PHL_STATUS_HAL_INIT_FAILURE;
|
||||
PHL_ERR("rtw_phl_regu_interface_init failed\n");
|
||||
goto error_phl_regu_interface_init;
|
||||
}
|
||||
|
||||
hal_status = rtw_hal_init(drv_priv, phl_info->phl_com,
|
||||
&(phl_info->hal), ic_info->ic_id);
|
||||
if ((hal_status != RTW_HAL_STATUS_SUCCESS) || (phl_info->hal == NULL)) {
|
||||
@@ -1096,8 +1102,10 @@ error_phl_var_init:
|
||||
error_hal_var_init:
|
||||
error_hal_read_chip_info:
|
||||
rtw_hal_deinit(phl_info->phl_com, phl_info->hal);
|
||||
error_vers_check:
|
||||
error_hal_init:
|
||||
rtw_phl_regu_interface_deinit(phl_info);
|
||||
error_phl_regu_interface_init:
|
||||
error_vers_check:
|
||||
#ifdef CONFIG_RTW_ACS
|
||||
phl_acs_info_deinit(phl_info);
|
||||
error_phl_acs_info_init:
|
||||
@@ -1156,6 +1164,7 @@ void rtw_phl_deinit(void *phl)
|
||||
phl_qm_deinit(phl_info);
|
||||
#endif /* CONFIG_QOS_MG */
|
||||
rtw_hal_deinit(phl_info->phl_com, phl_info->hal);
|
||||
rtw_phl_regu_interface_deinit(phl_info);
|
||||
phl_var_deinit(phl_info);
|
||||
#ifdef CONFIG_FSM
|
||||
phl_fsm_module_deinit(phl_info);
|
||||
|
||||
@@ -1547,6 +1547,19 @@ static int k1x_power_on(struct k1x_pcie *k1x, int on)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void k1x_pcie_hold_phy_rst(struct k1x_pcie *k1x)
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
reg = k1x_pcie_readl(k1x, PCIECTRL_K1X_CONF_DEVICE_CMD);
|
||||
if (reg & APP_HOLD_PHY_RST) {
|
||||
dev_dbg(k1x->pci->dev, "k1x_pcie_hold_phy_rst: phy reset already held\n");
|
||||
return;
|
||||
}
|
||||
reg |= APP_HOLD_PHY_RST;
|
||||
k1x_pcie_writel(k1x, PCIECTRL_K1X_CONF_DEVICE_CMD, reg);
|
||||
}
|
||||
|
||||
static int k1x_pcie_probe(struct platform_device *pdev)
|
||||
{
|
||||
u32 reg;
|
||||
@@ -1650,6 +1663,8 @@ static int k1x_pcie_probe(struct platform_device *pdev)
|
||||
k1x->pci = pci;
|
||||
platform_set_drvdata(pdev, k1x);
|
||||
|
||||
k1x_pcie_hold_phy_rst(k1x);
|
||||
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
pm_runtime_get_sync(&pdev->dev);
|
||||
pm_runtime_get_noresume(&pdev->dev);
|
||||
@@ -1818,6 +1833,8 @@ static int k1x_pcie_resume_noirq(struct device *dev)
|
||||
struct dw_pcie_rp *pp = &pci->pp;
|
||||
u32 reg;
|
||||
|
||||
k1x_pcie_hold_phy_rst(k1x);
|
||||
|
||||
/* soft no reset */
|
||||
reg = k1x_pcie_readl(k1x, PCIE_CTRL_LOGIC);
|
||||
reg &= ~(1 << 0);
|
||||
|
||||
@@ -501,6 +501,9 @@ static const struct pinmux_ops pcs_pinmux_ops = {
|
||||
.get_function_groups = pinmux_generic_get_function_groups,
|
||||
.set_mux = pcs_set_mux,
|
||||
.gpio_request_enable = pcs_request_gpio,
|
||||
#ifdef CONFIG_SOC_SPACEMIT_K1X
|
||||
.strict = true,
|
||||
#endif
|
||||
};
|
||||
|
||||
/* Clear BIAS value */
|
||||
|
||||
@@ -250,7 +250,11 @@ static u64 rproc_virtio_get_features(struct virtio_device *vdev)
|
||||
|
||||
rsc = (void *)rvdev->rproc->table_ptr + rvdev->rsc_offset;
|
||||
|
||||
#ifdef CONFIG_SOC_SPACEMIT_K1X
|
||||
return (u64)rsc->dfeatures | ((u64)rsc->gfeatures << 32);
|
||||
#else
|
||||
return rsc->dfeatures;
|
||||
#endif
|
||||
}
|
||||
|
||||
static void rproc_transport_features(struct virtio_device *vdev)
|
||||
@@ -277,8 +281,9 @@ static int rproc_virtio_finalize_features(struct virtio_device *vdev)
|
||||
rproc_transport_features(vdev);
|
||||
|
||||
/* Make sure we don't have any features > 32 bits! */
|
||||
#ifndef CONFIG_SOC_SPACEMIT_K1X
|
||||
BUG_ON((u32)vdev->features != vdev->features);
|
||||
|
||||
#endif
|
||||
/*
|
||||
* Remember the finalized features of our vdev, and provide it
|
||||
* to the remote processor once it is powered on.
|
||||
|
||||
@@ -87,6 +87,7 @@ struct spacemit_rproc {
|
||||
void __iomem *base[MAX_MEM_BASE];
|
||||
struct spacemit_mbox *mb;
|
||||
char *verid;
|
||||
unsigned int size;
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
struct rpmsg_device *rpdev;
|
||||
#ifdef CONFIG_HIBERNATION
|
||||
@@ -177,21 +178,12 @@ static int spacemit_rproc_prepare(struct rproc *rproc)
|
||||
da = rmem->base;
|
||||
}
|
||||
|
||||
if (strcmp(it.node->name, "vdev0buffer")) {
|
||||
mem = rproc_mem_entry_init(dev, NULL,
|
||||
rmem->base,
|
||||
rmem->size, da,
|
||||
spacemit_rproc_mem_alloc,
|
||||
spacemit_rproc_mem_release,
|
||||
it.node->name);
|
||||
} else {
|
||||
/* Register reserved memory for vdev buffer alloc */
|
||||
mem = rproc_of_resm_mem_entry_init(dev, index,
|
||||
rmem->size,
|
||||
rmem->base,
|
||||
it.node->name);
|
||||
}
|
||||
|
||||
mem = rproc_mem_entry_init(dev, NULL,
|
||||
rmem->base,
|
||||
rmem->size, da,
|
||||
spacemit_rproc_mem_alloc,
|
||||
spacemit_rproc_mem_release,
|
||||
it.node->name);
|
||||
if (!mem)
|
||||
return -ENOMEM;
|
||||
|
||||
@@ -264,7 +256,7 @@ static int spacemit_rproc_start(struct rproc *rproc)
|
||||
struct spacemit_rproc *priv = rproc->priv;
|
||||
|
||||
if (priv->verid != NULL)
|
||||
pr_notice("the firmare version id is:%s\n", priv->verid);
|
||||
pr_notice("the firmare version id is:%s\n", rproc_da_to_va(rproc, (u64)priv->verid, priv->size, NULL));
|
||||
|
||||
/* enable ipc2ap clk & reset--> rcpu side */
|
||||
writel(0xff, priv->base[BOOTC_MEM_BASE_OFFSET] + ESOS_AON_PER_CLK_RST_CTL_REG);
|
||||
@@ -300,7 +292,7 @@ static int spacemit_rproc_parse_fw(struct rproc *rproc, const struct firmware *f
|
||||
int ret;
|
||||
u64 sh_size;
|
||||
struct spacemit_rproc *ddata = rproc->priv;
|
||||
char *version_id_table, *version_id_va;
|
||||
char *version_id_table;
|
||||
|
||||
ddata->verid = NULL;
|
||||
/* find the firmare id */
|
||||
@@ -308,10 +300,8 @@ static int spacemit_rproc_parse_fw(struct rproc *rproc, const struct firmware *f
|
||||
if (!version_id_table) {
|
||||
dev_info(&rproc->dev, "Can not find version id table\n");
|
||||
} else {
|
||||
|
||||
version_id_va = ioremap((phys_addr_t)version_id_table, sh_size);
|
||||
|
||||
ddata->verid = version_id_va;
|
||||
ddata->verid = version_id_table;
|
||||
ddata->size = sh_size;
|
||||
}
|
||||
|
||||
ret = rproc_elf_load_rsc_table(rproc, fw);
|
||||
|
||||
@@ -277,6 +277,7 @@ static const struct spacemit_reset_signal
|
||||
[RESET_SDH1] = { APMU_SDH1_CLK_RES_CTRL, BIT(1), BIT(1), 0, RST_BASE_TYPE_APMU },
|
||||
[RESET_USB_AXI] = { APMU_USB_CLK_RES_CTRL, BIT(0), BIT(0), 0, RST_BASE_TYPE_APMU },
|
||||
[RESET_USBP1_AXI] = { APMU_USB_CLK_RES_CTRL, BIT(4), BIT(4), 0, RST_BASE_TYPE_APMU },
|
||||
[RESET_COMBO_PHY] = { APMU_PCIE_CLK_RES_CTRL_0, BIT(8), 0, BIT(8), RST_BASE_TYPE_APMU },
|
||||
[RESET_USB3_0] = { APMU_USB_CLK_RES_CTRL, BIT(9)|BIT(10)|BIT(11), BIT(9)|BIT(10)|BIT(11), 0, RST_BASE_TYPE_APMU },
|
||||
[RESET_QSPI] = { APMU_QSPI_CLK_RES_CTRL, BIT(1), BIT(1), 0, RST_BASE_TYPE_APMU },
|
||||
[RESET_QSPI_BUS] = { APMU_QSPI_CLK_RES_CTRL, BIT(0), BIT(0), 0, RST_BASE_TYPE_APMU },
|
||||
@@ -570,4 +571,3 @@ out:
|
||||
}
|
||||
|
||||
CLK_OF_DECLARE(k1x_reset, "spacemit,k1x-reset", spacemit_reset_init);
|
||||
|
||||
|
||||
@@ -50,6 +50,8 @@
|
||||
#define HUSB239_REG_SRC_PDO_5V 0x6A
|
||||
#define HUSB239_REG_SRC_PDO_9V 0x6B
|
||||
#define HUSB239_REG_SRC_PDO_12V 0x6C
|
||||
#define HUSB239_REG_SRC_PDO_15V 0x6D
|
||||
#define HUSB239_REG_SRC_PDO_20V 0x6E
|
||||
|
||||
#define HUSB239_REG_MAX 0xFF
|
||||
|
||||
@@ -156,6 +158,8 @@
|
||||
#define HUSB239_PD_COMM(s) (!!((s) & BIT(4)))
|
||||
#define HUSB239_POWER_ROLE(s) (!!((s) & BIT(6)))
|
||||
|
||||
#define PD_DEETCT_DELAY_MS 1000
|
||||
|
||||
enum husb239_snkcap {
|
||||
SNKCAP_5V = 1,
|
||||
SNKCAP_9V,
|
||||
@@ -204,6 +208,7 @@ struct husb239 {
|
||||
struct gpio_desc *int_gpiod;
|
||||
int gpio_irq;
|
||||
struct work_struct work;
|
||||
struct delayed_work pd_work;
|
||||
struct workqueue_struct *workqueue;
|
||||
struct mutex lock;
|
||||
|
||||
@@ -347,10 +352,15 @@ static void husb239_update_operating_status(struct husb239 *husb239)
|
||||
else
|
||||
op_current = 3000 + (status1 - STEP_BOUNDARY) * 40;
|
||||
|
||||
/* covert mV/mA to uV/uA */
|
||||
husb239->voltage = voltage * 1000;
|
||||
husb239->op_current = op_current * 1000;
|
||||
husb239->psy_online = true;
|
||||
if ((husb239->voltage != voltage * 1000)
|
||||
|| (husb239->op_current != op_current * 1000)) {
|
||||
/* covert mV/mA to uV/uA */
|
||||
husb239->voltage = voltage * 1000;
|
||||
husb239->op_current = op_current * 1000;
|
||||
husb239->psy_online = true;
|
||||
goto out;
|
||||
}
|
||||
return;
|
||||
|
||||
out:
|
||||
dev_info(husb239->dev, "update sink voltage: %d current: %d\n", husb239->voltage, husb239->op_current);
|
||||
@@ -456,9 +466,9 @@ static int husb239_usbpd_detect(struct husb239 *husb239)
|
||||
return ret;
|
||||
|
||||
dev_dbg(husb239->dev, "husb239 detect pd, contract status0: %x\n", status0);
|
||||
if (((status0 & HUSB239_PD_CONTRACT_MASK) >> HUSB239_PD_CONTRACT_SHIFT) == SNKCAP_5V) {
|
||||
if (((status0 & HUSB239_PD_CONTRACT_MASK) >> HUSB239_PD_CONTRACT_SHIFT)) {
|
||||
husb239_update_operating_status(husb239);
|
||||
break;
|
||||
return 0;
|
||||
}
|
||||
/* check attach status */
|
||||
ret = regmap_read(husb239->regmap, HUSB239_REG_STATUS, &status);
|
||||
@@ -512,30 +522,30 @@ static int husb239_usbpd_request_voltage(struct husb239 *husb239)
|
||||
break;
|
||||
}
|
||||
|
||||
while(--count) {
|
||||
ret = regmap_read(husb239->regmap, HUSB239_REG_SRC_PDO_5V + snk_sel - 1, &src_pdo);
|
||||
if (ret)
|
||||
return ret;
|
||||
for (; snk_sel >= SNKCAP_5V; snk_sel--) {
|
||||
for (count = 10; count > 0; count--) {
|
||||
ret = regmap_read(husb239->regmap, HUSB239_REG_SRC_PDO_5V + snk_sel - 1, &src_pdo);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
dev_dbg(husb239->dev, "husb239_attach src_pdo: %x\n", src_pdo);
|
||||
if (src_pdo & HUSB239_REG_SRC_DETECT)
|
||||
break;
|
||||
dev_dbg(husb239->dev, "husb239_attach src_pdo: %x\n", src_pdo);
|
||||
if (src_pdo & HUSB239_REG_SRC_DETECT)
|
||||
goto pd_detect;
|
||||
|
||||
/* check attach status */
|
||||
ret = regmap_read(husb239->regmap, HUSB239_REG_STATUS, &status);
|
||||
if (ret)
|
||||
return ret;
|
||||
/* check attach status */
|
||||
ret = regmap_read(husb239->regmap, HUSB239_REG_STATUS, &status);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (!(status & HUSB239_REG_STATUS_ATTACH))
|
||||
return -ENODEV;
|
||||
if (!(status & HUSB239_REG_STATUS_ATTACH))
|
||||
return -ENODEV;
|
||||
|
||||
msleep(100);
|
||||
msleep(100);
|
||||
}
|
||||
}
|
||||
|
||||
if (count == 0)
|
||||
return -EINVAL;
|
||||
|
||||
dev_info(husb239->dev, "pd detect \n");
|
||||
pd_detect:
|
||||
dev_info(husb239->dev, "pd detect, snk_sel: %d\n", snk_sel);
|
||||
ret = regmap_update_bits(husb239->regmap, HUSB239_REG_SRC_PDO,
|
||||
HUSB239_REG_SRC_PDO_SEL_MASK, (snk_sel << 3));
|
||||
if (ret)
|
||||
@@ -567,6 +577,8 @@ static int husb239_usbpd_request_voltage(struct husb239 *husb239)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
queue_delayed_work(husb239->workqueue,
|
||||
&husb239->pd_work, msecs_to_jiffies(PD_DEETCT_DELAY_MS));
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -810,6 +822,17 @@ static int husb239_chip_init(struct husb239 *husb239)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void husb239_pd_func(struct work_struct *work)
|
||||
{
|
||||
struct husb239 *husb239 = container_of(work, struct husb239, pd_work.work);
|
||||
|
||||
mutex_lock(&husb239->lock);
|
||||
husb239_update_operating_status(husb239);
|
||||
mutex_unlock(&husb239->lock);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static void husb239_work_func(struct work_struct *work)
|
||||
{
|
||||
struct husb239 *husb239 = container_of(work, struct husb239, work);
|
||||
@@ -856,6 +879,7 @@ static int husb239_irq_init(struct husb239 *husb239)
|
||||
int ret, status;
|
||||
|
||||
INIT_WORK(&husb239->work, husb239_work_func);
|
||||
INIT_DELAYED_WORK(&husb239->pd_work, husb239_pd_func);
|
||||
husb239->workqueue = alloc_workqueue("husb239_work",
|
||||
WQ_FREEZABLE |
|
||||
WQ_MEM_RECLAIM,
|
||||
@@ -1285,6 +1309,9 @@ static void husb239_remove(struct i2c_client *client)
|
||||
struct husb239 *husb239 = i2c_get_clientdata(client);
|
||||
struct typec_info *info = &husb239->info;
|
||||
|
||||
cancel_work_sync(&husb239->work);
|
||||
cancel_delayed_work_sync(&husb239->pd_work);
|
||||
|
||||
if (husb239->workqueue)
|
||||
destroy_workqueue(husb239->workqueue);
|
||||
|
||||
@@ -1303,6 +1330,10 @@ static int __maybe_unused husb239_suspend(struct device *dev)
|
||||
{
|
||||
struct husb239 *husb239 = dev_get_drvdata(dev);
|
||||
|
||||
/* Make sure any pending irq work is finished before suspends */
|
||||
flush_work(&husb239->work);
|
||||
flush_delayed_work(&husb239->pd_work);
|
||||
|
||||
/* Clear all interruption */
|
||||
regmap_write(husb239->regmap, HUSB239_REG_INT, 0xFF);
|
||||
regmap_write(husb239->regmap, HUSB239_REG_INT1, 0xFF);
|
||||
@@ -1313,6 +1344,10 @@ static int __maybe_unused husb239_suspend(struct device *dev)
|
||||
|
||||
static int __maybe_unused husb239_resume(struct device *dev)
|
||||
{
|
||||
struct husb239 *husb239 = dev_get_drvdata(dev);
|
||||
|
||||
queue_delayed_work(husb239->workqueue,
|
||||
&husb239->pd_work, msecs_to_jiffies(PD_DEETCT_DELAY_MS));
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -84,54 +84,55 @@
|
||||
#define RESET_SDH1 73
|
||||
#define RESET_USB_AXI 74
|
||||
#define RESET_USBP1_AXI 75
|
||||
#define RESET_USB3_0 76
|
||||
#define RESET_QSPI 77
|
||||
#define RESET_QSPI_BUS 78
|
||||
#define RESET_DMA 79
|
||||
#define RESET_AES 80
|
||||
#define RESET_VPU 81
|
||||
#define RESET_GPU 82
|
||||
#define RESET_SDH2 83
|
||||
#define RESET_MC 84
|
||||
#define RESET_EM_AXI 85
|
||||
#define RESET_EM 86
|
||||
#define RESET_AUDIO_SYS 87
|
||||
#define RESET_HDMI 88
|
||||
#define RESET_PCIE0 89
|
||||
#define RESET_PCIE1 90
|
||||
#define RESET_PCIE2 91
|
||||
#define RESET_EMAC0 92
|
||||
#define RESET_EMAC1 93
|
||||
#define RESET_COMBO_PHY 76
|
||||
#define RESET_USB3_0 77
|
||||
#define RESET_QSPI 78
|
||||
#define RESET_QSPI_BUS 79
|
||||
#define RESET_DMA 80
|
||||
#define RESET_AES 81
|
||||
#define RESET_VPU 82
|
||||
#define RESET_GPU 83
|
||||
#define RESET_SDH2 84
|
||||
#define RESET_MC 85
|
||||
#define RESET_EM_AXI 86
|
||||
#define RESET_EM 87
|
||||
#define RESET_AUDIO_SYS 88
|
||||
#define RESET_HDMI 89
|
||||
#define RESET_PCIE0 90
|
||||
#define RESET_PCIE1 91
|
||||
#define RESET_PCIE2 92
|
||||
#define RESET_EMAC0 93
|
||||
#define RESET_EMAC1 94
|
||||
|
||||
//APBC2
|
||||
#define RESET_SEC_UART1 94
|
||||
#define RESET_SEC_SSP2 95
|
||||
#define RESET_SEC_TWSI3 96
|
||||
#define RESET_SEC_RTC 97
|
||||
#define RESET_SEC_TIMERS0 98
|
||||
#define RESET_SEC_KPC 99
|
||||
#define RESET_SEC_GPIO 100
|
||||
#define RESET_SEC_UART1 95
|
||||
#define RESET_SEC_SSP2 96
|
||||
#define RESET_SEC_TWSI3 97
|
||||
#define RESET_SEC_RTC 98
|
||||
#define RESET_SEC_TIMERS0 99
|
||||
#define RESET_SEC_KPC 100
|
||||
#define RESET_SEC_GPIO 101
|
||||
|
||||
#define RESET_RCPU_HDMIAUDIO 101
|
||||
#define RESET_RCPU_CAN 102
|
||||
#define RESET_RCPU_HDMIAUDIO 102
|
||||
#define RESET_RCPU_CAN 103
|
||||
|
||||
#define RESET_RCPU_I2C0 103
|
||||
#define RESET_RCPU_SSP0 104
|
||||
#define RESET_RCPU_IR 105
|
||||
#define RESET_RCPU_UART0 106
|
||||
#define RESET_RCPU_UART1 107
|
||||
#define RESET_RCPU_I2C0 104
|
||||
#define RESET_RCPU_SSP0 105
|
||||
#define RESET_RCPU_IR 106
|
||||
#define RESET_RCPU_UART0 107
|
||||
#define RESET_RCPU_UART1 108
|
||||
|
||||
#define RESET_RCPU2_PWM0 108
|
||||
#define RESET_RCPU2_PWM1 109
|
||||
#define RESET_RCPU2_PWM2 110
|
||||
#define RESET_RCPU2_PWM3 111
|
||||
#define RESET_RCPU2_PWM4 112
|
||||
#define RESET_RCPU2_PWM5 113
|
||||
#define RESET_RCPU2_PWM6 114
|
||||
#define RESET_RCPU2_PWM7 115
|
||||
#define RESET_RCPU2_PWM8 116
|
||||
#define RESET_RCPU2_PWM9 117
|
||||
#define RESET_RCPU2_PWM0 109
|
||||
#define RESET_RCPU2_PWM1 110
|
||||
#define RESET_RCPU2_PWM2 111
|
||||
#define RESET_RCPU2_PWM3 112
|
||||
#define RESET_RCPU2_PWM4 113
|
||||
#define RESET_RCPU2_PWM5 114
|
||||
#define RESET_RCPU2_PWM6 115
|
||||
#define RESET_RCPU2_PWM7 116
|
||||
#define RESET_RCPU2_PWM8 117
|
||||
#define RESET_RCPU2_PWM9 118
|
||||
|
||||
#define RESET_NUMBER 118
|
||||
#define RESET_NUMBER 119
|
||||
|
||||
#endif /* __DT_BINDINGS_RESET_SAPCEMIT_K1X_H__ */
|
||||
|
||||
@@ -227,7 +227,7 @@ Architecture: $debarch
|
||||
Description: Linux kernel, version $version
|
||||
This package contains the Linux kernel, modules and corresponding other
|
||||
files, version: $version.
|
||||
Depends: spacemit-flash-dtbs, bianbu-esos (= 0.0.9)
|
||||
Depends: spacemit-flash-dtbs, bianbu-esos (= 0.0.10)
|
||||
Provides: linux-image-$baseversion
|
||||
EOF
|
||||
|
||||
|
||||
@@ -52,6 +52,8 @@
|
||||
#define BITCLK_DIV_468 (0x0 << 27)
|
||||
#define FRAME_48K_I2S (0x4 << 15)
|
||||
|
||||
#define SYSCLK_PRE_CTRL 0x08
|
||||
|
||||
/*
|
||||
* ssp:sspa audio private data
|
||||
*/
|
||||
@@ -299,16 +301,16 @@ static int i2s_sspa_hw_params(struct snd_pcm_substream *substream,
|
||||
sspa_priv->mclk_fs = sspa_priv->sysclk / (params_rate(params));
|
||||
switch (sspa_priv->mclk_fs) {
|
||||
case 64:
|
||||
target = SYSCLK_BASE_156M | 4 << 15 | 200; //64fs
|
||||
target = SYSCLK_BASE_156M | 326 << 15 | 32600; //64fs
|
||||
break;
|
||||
case 128:
|
||||
target = SYSCLK_BASE_156M | 8 << 15 | 200; //128fs
|
||||
target = SYSCLK_BASE_156M | 652 << 15 | 32600; //128fs
|
||||
break;
|
||||
case 256:
|
||||
target = SYSCLK_BASE_156M | 16 << 15 | 200; //256fs
|
||||
target = SYSCLK_BASE_156M | 1304 << 15 | 32600; //256fs
|
||||
break;
|
||||
default:
|
||||
target = SYSCLK_BASE_156M | 16 << 15 | 200; //256fs
|
||||
target = SYSCLK_BASE_156M | 1304 << 15 | 32600; //256fs
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -333,6 +335,10 @@ static int i2s_sspa_hw_params(struct snd_pcm_substream *substream,
|
||||
val = __raw_readl(sspa->pmumain + ISCCR1);
|
||||
val = val & ~0x5FFFFFFF;
|
||||
__raw_writel(val | target, sspa->pmumain + ISCCR1);
|
||||
|
||||
val = __raw_readl(sspa->pmumain + SYSCLK_PRE_CTRL);
|
||||
val |= 1 << 29;
|
||||
__raw_writel(val, sspa->pmumain + SYSCLK_PRE_CTRL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -479,22 +485,26 @@ static void i2s_sspa_init(struct sspa_priv *priv)
|
||||
|
||||
switch (priv->mclk_fs) {
|
||||
case 64:
|
||||
target = SYSCLK_BASE_156M | 0 << 27| 4 << 15 | 200; //64fs
|
||||
target = SYSCLK_BASE_156M | 0 << 27 | 326 << 15 | 32600; //64fs
|
||||
break;
|
||||
case 128:
|
||||
target = SYSCLK_BASE_156M | 1 << 27| 8 << 15 | 200; //128fs
|
||||
target = SYSCLK_BASE_156M | 1 << 27 | 652 << 15 | 32600; //128fs
|
||||
break;
|
||||
case 256:
|
||||
target = SYSCLK_BASE_156M | 3 << 27| 16 << 15 | 200; //256fs
|
||||
target = SYSCLK_BASE_156M | 3 << 27 | 1304 << 15 | 32600; //256fs
|
||||
break;
|
||||
default:
|
||||
target = SYSCLK_BASE_156M | 3 << 27| 16 << 15 | 200; //256fs
|
||||
target = SYSCLK_BASE_156M | 3 << 27 | 1304 << 15 | 32600; //256fs
|
||||
break;
|
||||
}
|
||||
val = __raw_readl(sspa->pmumain + ISCCR1);
|
||||
val = val & ~0x5FFFFFFF;
|
||||
__raw_writel(val | target, sspa->pmumain + ISCCR1);
|
||||
|
||||
val = __raw_readl(sspa->pmumain + SYSCLK_PRE_CTRL);
|
||||
val |= 1 << 29;
|
||||
__raw_writel(val, sspa->pmumain + SYSCLK_PRE_CTRL);
|
||||
|
||||
}
|
||||
|
||||
static int i2s_sspa_suspend(struct device *dev)
|
||||
|
||||
Reference in New Issue
Block a user