board: spacemit-k3: skeleton support

arch/riscv/Kconfig

@@ -47,6 +47,9 @@ config TARGET_SIPEED_MAIX
 	bool "Support Sipeed Maix Board"
 	select SYS_CACHE_SHIFT_6
 
+config TARGET_SPACEMIT_K3
+	bool "Support SpacemiT K3 based Boards"
+
 config TARGET_STARFIVE_VISIONFIVE2
 	bool "Support StarFive VisionFive2 Board"
 	select BOARD_LATE_INIT
@@ -116,6 +119,7 @@ source "board/sipeed/maix/Kconfig"
 source "board/sophgo/milkv_duo/Kconfig"
 source "board/sophgo/licheerv_nano/Kconfig"
 source "board/spacemit/bananapi-f3/Kconfig"
+source "board/spacemit/k3-generic/Kconfig"
 source "board/starfive/visionfive2/Kconfig"
 source "board/thead/th1520_lpi4a/Kconfig"
 source "board/xilinx/mbv/Kconfig"
@@ -129,6 +133,7 @@ source "arch/riscv/cpu/ast2700/Kconfig"
 source "arch/riscv/cpu/generic/Kconfig"
 source "arch/riscv/cpu/jh7110/Kconfig"
 source "arch/riscv/cpu/k1/Kconfig"
+source "arch/riscv/cpu/k3/Kconfig"
 source "arch/riscv/cpu/k230/Kconfig"
 source "arch/riscv/cpu/th1520/Kconfig"
 

arch/riscv/cpu/k3/Kconfig

@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Copyright (c) 2026, Hangfan Li <lihangfan@iscas.ac.cn>
+
+# Due to limitation of Kconfig, the following symbols cannot be selected here:
+# CONFIG_ARCH_RV64I
+# CONFIG_RISCV_SMODE
+
+config SPACEMIT_K3
+	bool
+	select ARCH_EARLY_INIT_R
+	imply CPU
+	imply CPU_RISCV
+	imply RISCV_ISA_ZICBOM
+
+if SPACEMIT_K3
+
+config SYS_CPU
+	default "k3"
+
+endif

arch/riscv/cpu/k3/Makefile

@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Copyright (c) 2026, Hangfan Li <lihangfan@iscas.ac.cn>
+
+obj-$(CONFIG_XPL_BUILD) += spl.o
+obj-y += cpu.o
+obj-y += cache.o
+obj-y += dram.o

arch/riscv/cpu/k3/cpu.c

@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2026 Hangfan Li <lihangfan@iscas.ac.cn>
+ */
+
+#include <irq_func.h>
+#include <asm/cache.h>
+
+
+/*
+ * cleanup_before_linux() is called just before we call linux
+ * it prepares the processor for linux
+ *
+ * we disable interrupt and caches.
+ */
+int cleanup_before_linux(void)
+{
+	disable_interrupts();
+
+	cache_flush();
+
+	return 0;
+}
+

arch/riscv/cpu/k3/dram.c

@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2026 Hangfan Li <lihangfan@iscas.ac.cn>
+ */
+
+#include <fdtdec.h>
+#include <init.h>
+#include <linux/sizes.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+__weak int dram_init(void)
+{
+	return fdtdec_setup_mem_size_base();
+}
+
+__weak int dram_init_banksize(void)
+{
+	return fdtdec_setup_memory_banksize();
+}
+

arch/riscv/dts/k3-cpus.dtsi

@@ -0,0 +1,74 @@
+/ {
+	cpus {
+		bootph-all;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		timebase-frequency = <24000000>;
+
+		cpu_0: cpu@0 {
+			bootph-all;
+			compatible = "spacemit,x100", "riscv";
+			device_type = "cpu";
+			reg = <0>;
+			riscv,isa = "rv64imafdcvh_zicbom_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zfhmin_zba_zbb_zbc_zbs_zkt_zvbb_zvbc_zvfh_zvfhmin_zvkb_zvkg_zvkn_zvknc_zvkned_zvkng_zvknha_zvknhb_zvks_zvksc_zvksed_zvksh_zvksg_zvkt_ssaia_sscofpmf_sstc_svinval_svnapot_svpbmt_smstateen";
+			riscv,isa-base = "rv64i";
+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "h",
+					"zicbom", "zicboz", "zicntr", "zicond", "zicsr",
+					"zifencei", "zihintpause", "zihpm", "zfh", "zfhmin",
+					"zba", "zbb", "zbc", "zbs", "zkt", "zvbb", "zvbc",
+					"zvfh", "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc",
+					"zvkned", "zvkng", "zvknha", "zvknhb", "zvks",
+					"zvksc", "zvksed", "zvksh", "zvksg", "zvkt", "ssaia",
+					"sscofpmf", "sstc", "svinval", "svnapot", "svpbmt",
+					"smstateen";
+			riscv,cbom-block-size = <64>;
+			/*riscv,cbop-block-size = <64>;*/
+			riscv,cboz-block-size = <64>;
+			i-cache-block-size = <64>;
+			i-cache-size = <65536>;
+			i-cache-sets = <256>;
+			d-cache-block-size = <64>;
+			d-cache-size = <65536>;
+			d-cache-sets = <256>;
+			next-level-cache = <&cluster0_l2_cache>;
+			mmu-type = "riscv,sv39";
+		};
+
+		cluster0_l2_cache: l2-cache0 {
+			bootph-all;
+			compatible = "cache";
+			cache-block-size = <64>;
+			cache-level = <2>;
+			cache-size = <4194304>;
+			cache-sets = <4096>;
+			cache-unified;
+		};
+
+		cluster1_l2_cache: l2-cache1 {
+			compatible = "cache";
+			cache-block-size = <64>;
+			cache-level = <2>;
+			cache-size = <4194304>;
+			cache-sets = <4096>;
+			cache-unified;
+		};
+
+		cluster2_l2_cache: l2-cache2 {
+			compatible = "cache";
+			cache-block-size = <64>;
+			cache-level = <2>;
+			cache-size = <1048576>;
+			cache-sets = <1024>;
+			cache-unified;
+		};
+
+		cluster3_l2_cache: l2-cache3 {
+			compatible = "cache";
+			cache-block-size = <64>;
+			cache-level = <2>;
+			cache-size = <1048576>;
+			cache-sets = <1024>;
+			cache-unified;
+		};
+	};
+};

arch/riscv/dts/k3-spacemit-deb1.dts

@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (C) 2026 Hangfan Li <lihangfan@iscas.ac.cn>
+ */
+
+#include "k3.dtsi"
+
+/ {
+	model = "SpacemiT K3 DEB1 Board";
+	compatible = "spacemit,k3-deb1", "spacemit,k3";
+
+	chosen {
+		stdout-path = "serial0";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
+	};
+};

arch/riscv/dts/k3.dtsi

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (C) 2026 Hangfan Li <lihangfan@iscas.ac.cn>
+ */
+
+/dts-v1/;
+
+#include "k3-cpus.dtsi"
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	model = "SpacemiT K3";
+	compatible = "spacemit,k3";
+
+	aliases {
+	};
+
+};

board/spacemit/k3-generic/Kconfig

@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Copyright (c) 2026, Hangfan Li <lihangfan@iscas.ac.cn>
+
+if TARGET_SPACEMIT_K3
+
+config SYS_VENDOR
+	default "spacemit"
+
+config SYS_BOARD
+	default "k3-generic"
+
+config SYS_CONFIG_NAME
+	default "spacemit-k3-generic"
+
+config CUSTOM_SYS_INIT_SP_ADDR
+	default 0xc0880000
+
+config TEXT_BASE
+	hex
+	default 0x80200000 if RISCV_SMODE
+
+config SYS_LOAD_ADDR
+	hex
+	default 0x102000000
+
+config DEFAULT_DEVICE_TREE
+	default "k3-spacemit-deb1"
+
+config BOARD_SPECIFIC_OPTIONS
+	def_bool y
+	select SPACEMIT_K3
+	select HAS_CUSTOM_SYS_INIT_SP_ADDR
+
+endif

board/spacemit/k3-generic/Makefile

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Copyright (c) 2026, Hangfan Li <lihangfan@iscas.ac.cn>
+
+obj-y	:= k3-generic.o

board/spacemit/k3-generic/k3-generic.c

@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (c) 2026, Hangfan Li <lihangfan@iscas.ac.cn>
+ */
+
+int board_init(void)
+{
+    /* Add board-specific initialization */
+    return 0;
+}

configs/k3_defconfig

@@ -0,0 +1,4 @@
+CONFIG_RISCV=y
+CONFIG_TARGET_SPACEMIT_K3=y
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y

include/configs/spacemit-k3-generic.h

@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (c) 2026, Hangfan Li <lihangfan@iscas.ac.cn>
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+
+
+#endif /* __CONFIG_H */