Merge remote-tracking branch 'origin/f32' into f30

Signed-off-by: Kaleb S. KEITHLEY <kkeithle@redhat.com>

0001-src-common-crc32c_intel_fast.patch

@@ -1,228 +0,0 @@
---- ceph-15.2.4/src/yasm-wrapper.orig	2020-06-30 11:40:51.000000000 -0400
-+++ ceph-15.2.4/src/yasm-wrapper	2020-07-20 12:21:34.574980869 -0400
-@@ -1,10 +1,11 @@
--#!/bin/sh -e
-+#!/bin/sh
- 
- # libtool and yasm do not get along.
- # filter out any crap that libtool feeds us that yasm does not understand.
- #echo $0: got $*
- new=""
- touch=""
-+object=""
- while [ -n "$*" ]; do
-     case "$1" in
- 	-f )
-@@ -29,6 +30,12 @@
- 	    touch="$1"
- 	    shift
- 	    ;;
-+	-o )
-+	    shift
-+	    object="$1"
-+	    new="$new -o $1"
-+	    shift
-+	    ;;
- 	* )
- 	    new="$new $1"
- 	    shift
-@@ -36,8 +43,15 @@
-     esac
- done
- 
--#echo $0: yasm $new
--yasm $new
-+#echo ${0}: yasm ${new}
-+yasm ${new}
-+
-+echo ${new} | grep -- "crc32c_intel_fast*asm\.s"
-+if [ $? -ne 0 ]; then
-+    touch /tmp/${object}
-+    ld -r -z ibt -z shstk -z noexecstack -o ${object}.tmp ${object}
-+    mv ${object}.tmp ${object}
-+fi
- 
- [ -n "$touch" ] && touch $touch
- 
---- ceph-15.2.2/src/common/crc32c_intel_fast_asm.s.orig	2020-05-26 08:34:32.226201974 -0400
-+++ ceph-15.2.2/src/common/crc32c_intel_fast_asm.s	2020-05-26 17:19:20.327201974 -0400
-@@ -1,5 +1,5 @@
- ;
--; Copyright 2012-2013 Intel Corporation All Rights Reserved.
-+; Copyright 2012-2015 Intel Corporation All Rights Reserved.
- ; All rights reserved.
- ;
- ; http://opensource.org/licenses/BSD-3-Clause
-@@ -59,16 +59,34 @@
- 	xor     rbx, rbx                ;; rbx = crc1 = 0;
- 	xor     r10, r10                ;; r10 = crc2 = 0;
- 
-+	cmp	len, %%bSize*3*2
-+	jbe	%%non_prefetch
-+
-  %assign i 0
-  %rep %%bSize/8 - 1
--	crc32   rax, [bufptmp+i + 0*%%bSize]  ;; update crc0
--	crc32   rbx, [bufptmp+i + 1*%%bSize]  ;; update crc1
--	crc32   r10, [bufptmp+i + 2*%%bSize]  ;; update crc2
-+ %if i < %%bSize*3/4
-+	prefetchnta	[bufptmp+ %%bSize*3 + i*4]
-+ %endif
-+	crc32   rax, qword [bufptmp+i + 0*%%bSize]  ;; update crc0
-+	crc32   rbx, qword [bufptmp+i + 1*%%bSize]  ;; update crc1
-+	crc32   r10, qword [bufptmp+i + 2*%%bSize]  ;; update crc2
- 	%assign i (i+8)
-  %endrep
--	crc32   rax, [bufptmp+i + 0*%%bSize]  ;; update crc0
--	crc32   rbx, [bufptmp+i + 1*%%bSize]  ;; update crc1
--; SKIP  ;crc32  r10, [bufptmp+i + 2*%%bSize]  ;; update crc2
-+	jmp %%next %+ %1
-+
-+%%non_prefetch:
-+ %assign i 0
-+ %rep %%bSize/8 - 1
-+	crc32   rax, qword [bufptmp+i + 0*%%bSize]  ;; update crc0
-+	crc32   rbx, qword [bufptmp+i + 1*%%bSize]  ;; update crc1
-+	crc32  r10, qword [bufptmp+i + 2*%%bSize]  ;; update crc2
-+	%assign i (i+8)
-+ %endrep
-+
-+%%next %+ %1:
-+	crc32   rax, qword [bufptmp+i + 0*%%bSize]  ;; update crc0
-+	crc32   rbx, qword [bufptmp+i + 1*%%bSize]  ;; update crc1
-+; SKIP	;crc32  r10, qword [bufptmp+i + 2*%%bSize]  ;; update crc2
- 
- 	; merge in crc0
- 	movzx   bufp_dw, al
-@@ -180,12 +198,15 @@
- %define crc_init_dw     r8d 
- %endif
- 
--
-+	endbranch
- 	push    rdi
- 	push    rbx
- 
- 	mov     rax, crc_init           ;; rax = crc_init;
- 
-+	cmp	len, 8
-+	jb	less_than_8
-+
- ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- ;; 1) ALIGN: ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- 
-@@ -195,9 +216,6 @@
- 					;; amount of the address
- 	je      proc_block              ;; Skip if aligned
- 
--	cmp     len, 8
--	jb      less_than_8
--
- 	;;;; Calculate CRC of unaligned bytes of the buffer (if any) ;;;;
- 	mov     rbx, [bufptmp]          ;; load a quadword from the buffer
- 	add     bufptmp, bufp           ;; align buffer pointer for
-@@ -233,7 +251,7 @@
- 	jnc     bit7                    ;; jump to bit-6 if bit-7 == 0
-  %assign i 0
-  %rep 16
--	crc32   rax, [bufptmp+i]        ;; compute crc32 of 8-byte data
-+	crc32   rax, qword [bufptmp+i]  ;; compute crc32 of 8-byte data
- 	%assign i (i+8)
-  %endrep
- 	je      do_return               ;; return if remaining data is zero
-@@ -244,7 +262,7 @@
- 	jnc     bit6                    ;; jump to bit-6 if bit-7 == 0
-  %assign i 0
-  %rep 8
--	crc32   rax, [bufptmp+i]        ;; compute crc32 of 8-byte data
-+	crc32   rax, qword [bufptmp+i]  ;; compute crc32 of 8-byte data
- 	%assign i (i+8)
-  %endrep
- 	je      do_return               ;; return if remaining data is zero
-@@ -254,7 +272,7 @@
- 	jnc     bit5                    ;; jump to bit-5 if bit-6 == 0
-  %assign i 0
-  %rep 4
--	crc32   rax, [bufptmp+i]        ;;    compute crc32 of 8-byte data
-+	crc32   rax, qword [bufptmp+i]  ;;    compute crc32 of 8-byte data
- 	%assign i (i+8)
-  %endrep
- 	je      do_return               ;; return if remaining data is zero
-@@ -264,7 +282,7 @@
- 	jnc     bit4                    ;; jump to bit-4 if bit-5 == 0
-  %assign i 0
-  %rep 2
--	crc32   rax, [bufptmp+i]        ;;    compute crc32 of 8-byte data
-+	crc32   rax, qword [bufptmp+i]  ;;    compute crc32 of 8-byte data
- 	%assign i (i+8)
-  %endrep
- 	je      do_return               ;; return if remaining data is zero
-@@ -272,11 +290,11 @@
- bit4:
- 	shl     len_b, 1                ;; shift-out MSB (bit-4)
- 	jnc     bit3                    ;; jump to bit-3 if bit-4 == 0
--	crc32   rax, [bufptmp]          ;; compute crc32 of 8-byte data
-+	crc32   rax, qword [bufptmp]    ;; compute crc32 of 8-byte data
- 	je      do_return               ;; return if remaining data is zero
- 	add     bufptmp, 8              ;; buf +=8; (next 8 bytes)
- bit3:
--	mov     rbx, [bufptmp]          ;; load a 8-bytes from the buffer:
-+	mov     rbx, qword [bufptmp]    ;; load a 8-bytes from the buffer:
- 	shl     len_b, 1                ;; shift-out MSB (bit-3)
- 	jnc     bit2                    ;; jump to bit-2 if bit-3 == 0
- 	crc32   eax, ebx                ;; compute crc32 of 4-byte data
---- ceph-15.2.2/src/common/crc32c_intel_fast_zero_asm.s.orig	2020-05-26 08:34:32.226201974 -0400
-+++ ceph-15.2.2/src/common/crc32c_intel_fast_zero_asm.s	2020-05-26 17:19:32.497201974 -0400
-@@ -1,5 +1,5 @@
- ;
--; Copyright 2012-2013 Intel Corporation All Rights Reserved.
-+; Copyright 2012-2015 Intel Corporation All Rights Reserved.
- ; All rights reserved.
- ;
- ; http://opensource.org/licenses/BSD-3-Clause
-@@ -59,6 +59,19 @@
- 	xor     rbx, rbx                ;; rbx = crc1 = 0;
- 	xor     r10, r10                ;; r10 = crc2 = 0;
- 
-+	cmp	len, %%bSize*3*2
-+	jbe	%%non_prefetch
-+
-+ %assign i 0
-+ %rep %%bSize/8 - 1
-+	crc32   rax, bufptmp  ;; update crc0
-+	crc32   rbx, bufptmp  ;; update crc1
-+	crc32   r10, bufptmp  ;; update crc2
-+	%assign i (i+8)
-+ %endrep
-+	jmp %%next %+ %1
-+
-+%%non_prefetch:
-  %assign i 0
-  %rep %%bSize/8 - 1
- 	crc32   rax, bufptmp  ;; update crc0
-@@ -66,6 +79,8 @@
- 	crc32   r10, bufptmp  ;; update crc2
- 	%assign i (i+8)
-  %endrep
-+
-+%%next %+ %1:
- 	crc32   rax, bufptmp  ;; update crc0
- 	crc32   rbx, bufptmp  ;; update crc1
- ; SKIP  ;crc32  r10, bufptmp  ;; update crc2
-@@ -180,12 +195,15 @@
- %define crc_init_dw     r8d
- %endif
- 
--
-+	endbranch
- 	push    rdi
- 	push    rbx
- 
- 	mov     rax, crc_init           ;; rax = crc_init;
- 
-+	cmp	len, 8
-+	jb	less_than_8
-+
- ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- ;; 1) ALIGN: ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- 

0003-src-common-bitstr.h.patch

@@ -1,21 +1,13 @@
---- ceph-15.1.0/src/common/bit_str.h.orig	2020-02-03 09:47:20.047149798 -0500
-+++ ceph-15.1.0/src/common/bit_str.h	2020-02-03 09:47:50.213149798 -0500
-@@ -17,6 +17,7 @@
- #include <cstdint>
- #include <iosfwd>
+--- ceph-14.2.6/src/common/bit_str.h.orig	2020-01-24 11:37:20.547679336 -0500
++++ ceph-14.2.6/src/common/bit_str.h	2020-01-24 11:37:55.351904895 -0500
+@@ -14,7 +14,10 @@
+ #ifndef CEPH_COMMON_BIT_STR_H
+ #define CEPH_COMMON_BIT_STR_H
+ 
++#include <cstdint>
++#include <iosfwd>
  #include <functional>
 +#include <ostream>
  
  namespace ceph {
    class Formatter;
---- ceph-15.2.4/src/global/signal_handler.h.orig        2020-07-17 12:57:54.763628429 -0400
-+++ ceph-15.2.4/src/global/signal_handler.h     2020-07-17 12:58:10.610628429 -0400
-@@ -16,6 +16,8 @@
- #define CEPH_GLOBAL_SIGNAL_HANDLER_H
-
- #include <signal.h>
-+#include <string>
-+
- #include "acconfig.h"
-
- typedef void (*signal_handler_t)(int);

0004-src-librbd-api-PoolMetadata.h.patch

@@ -0,0 +1,10 @@
+--- ceph-14.2.6/src/librbd/api/PoolMetadata.h.orig	2020-01-24 12:39:23.738816885 -0500
++++ ceph-14.2.6/src/librbd/api/PoolMetadata.h	2020-01-24 12:39:36.522902386 -0500
+@@ -8,6 +8,7 @@
+ #include "include/rados/librados_fwd.hpp"
+ 
+ #include <map>
++#include <string>
+ 
+ namespace librbd {
+ 

0005-cmake-modules-CheckCxxAtomic.cmake.patch

@@ -0,0 +1,39 @@
+--- a/cmake/modules/CheckCxxAtomic.cmake	2020-03-02 12:49:20.000000000 -0500
++++ b/cmake/modules/CheckCxxAtomic.cmake	2020-01-29 12:53:56.952149798 -0500
+@@ -10,18 +10,29 @@
+     check_cxx_source_compiles("
+ #include <atomic>
+ #include <cstdint>
++
++#if __s390x__
++// Boost needs 16-byte atomics for tagged pointers.
++// These are implemented via inline instructions on the platform
++// if 16-byte alignment can be proven, and are delegated to libatomic
++// library routines otherwise.  Whether or not alignment is provably
++// OK for a std::atomic unfortunately depends on compiler version and
++// optimization levels, and also on the details of the expression.
++// We specifically test access via an otherwise unknown pointer here
++// to ensure we get the most complex case.  If this access can be
++// done without libatomic, then all accesses can be done.
++bool atomic16(std::atomic<unsigned __int128> *ptr)
++{
++  return *ptr != 0;
++}
++#endif
++
+ int main() {
+   std::atomic<uint8_t> w1;
+   std::atomic<uint16_t> w2;
+   std::atomic<uint32_t> w4;
+   std::atomic<uint64_t> w8;
+-#ifdef __s390x__
+-  // Boost needs 16-byte atomics for tagged pointers.
+-  std::atomic<unsigned __int128> w16;
+-#else
+-  #define w16 0
+-#endif
+-  return w1 + w2 + w4 + w8 + w16;
++  return w1 + w2 + w4 + w8;
+ }
+ " ${var})
+ endfunction(check_cxx_atomics)

cmake-modules-BuildBoost.cmake.noautopatch

@@ -1,13 +0,0 @@
-diff --git a/cmake/modules/BuildBoost.cmake b/cmake/modules/BuildBoost.cmake
-index 2e92132366..3cb1e3d958 100644
---- a/cmake/modules/BuildBoost.cmake
-+++ b/cmake/modules/BuildBoost.cmake
-@@ -62,7 +62,7 @@ function(do_build_boost version)
-   else()
-     list(APPEND boost_features "address-model=32")
-   endif()
--  set(BOOST_CXXFLAGS "-fPIC -w") # check on arm, etc <---XXX
-+  set(BOOST_CXXFLAGS "-fPIC -w -fexceptions -fstack-protector-strong -grecord-gcc-switches -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -fasynchronous-unwind-tables -fstack-clash-protection -fcf-protection -ftemplate-depth-1024 -fno-new-ttp-matching -fno-builtin-malloc -fno-builtin-calloc -fno-builtin-realloc -fno-builtin-free") # check on arm, etc <---XXX
-   list(APPEND boost_features "cxxflags=${BOOST_CXXFLAGS}")
- 
-   set(boost_with_libs)

sources

@@ -1 +1 @@
-SHA512 (ceph-15.2.15.tar.gz) = e4d929ffda5c3e31767d93340fb97b5d49ca1d5641f6c30134ce5542486fc4f72684aef2ef47cb940a332e8b9144d8cec63ce8a9f86c773dbc0ccebdd8e7fb19
+SHA512 (ceph-14.2.9.tar.gz) = 0a26372d0037c32fe1d24be880e272fcce5089b02adfb0e791e0406155f6e66c913fa43762028f49c1fa3f30c6c8d819c521dd11702a37cc7040dfd3097c068e