Update for 2020.11.2

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>

.clang-format

@@ -1,567 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# clang-format configuration file. Intended for clang-format >= 4.
-#
-# For more information, see:
-#
-#   Documentation/process/clang-format.rst
-#   https://clang.llvm.org/docs/ClangFormat.html
-#   https://clang.llvm.org/docs/ClangFormatStyleOptions.html
-#
-
-# Buildroot: imported from Linux 5.15.6, with minimal modifications.
-#            Please note, this is not enforced at the moment. Intended
-#            as an aid when working with in-tree C files, like
-#            makedevs.c
-#
----
-AccessModifierOffset: -4
-AlignAfterOpenBracket: Align
-AlignConsecutiveAssignments: false
-AlignConsecutiveDeclarations: false
-#AlignEscapedNewlines: Left # Unknown to clang-format-4.0
-AlignOperands: true
-AlignTrailingComments: false
-AllowAllParametersOfDeclarationOnNextLine: false
-AllowShortBlocksOnASingleLine: false
-AllowShortCaseLabelsOnASingleLine: false
-AllowShortFunctionsOnASingleLine: None
-AllowShortIfStatementsOnASingleLine: false
-AllowShortLoopsOnASingleLine: false
-AlwaysBreakAfterDefinitionReturnType: None
-AlwaysBreakAfterReturnType: None
-AlwaysBreakBeforeMultilineStrings: false
-AlwaysBreakTemplateDeclarations: false
-BinPackArguments: true
-BinPackParameters: true
-BraceWrapping:
-  AfterClass: false
-  AfterControlStatement: false
-  AfterEnum: false
-  AfterFunction: true
-  AfterNamespace: true
-  AfterObjCDeclaration: false
-  AfterStruct: false
-  AfterUnion: false
-  #AfterExternBlock: false # Unknown to clang-format-5.0
-  BeforeCatch: false
-  BeforeElse: false
-  IndentBraces: false
-  #SplitEmptyFunction: true # Unknown to clang-format-4.0
-  #SplitEmptyRecord: true # Unknown to clang-format-4.0
-  #SplitEmptyNamespace: true # Unknown to clang-format-4.0
-BreakBeforeBinaryOperators: None
-BreakBeforeBraces: Custom
-#BreakBeforeInheritanceComma: false # Unknown to clang-format-4.0
-BreakBeforeTernaryOperators: false
-BreakConstructorInitializersBeforeComma: false
-#BreakConstructorInitializers: BeforeComma # Unknown to clang-format-4.0
-BreakAfterJavaFieldAnnotations: false
-BreakStringLiterals: false
-ColumnLimit: 132 # Specially for Buildroot
-CommentPragmas: '^ IWYU pragma:'
-#CompactNamespaces: false # Unknown to clang-format-4.0
-ConstructorInitializerAllOnOneLineOrOnePerLine: false
-ConstructorInitializerIndentWidth: 8
-ContinuationIndentWidth: 8
-Cpp11BracedListStyle: false
-DerivePointerAlignment: false
-DisableFormat: false
-ExperimentalAutoDetectBinPacking: false
-#FixNamespaceComments: false # Unknown to clang-format-4.0
-
-# Taken from:
-#   git grep -h '^#define [^[:space:]]*for_each[^[:space:]]*(' include/ \
-#   | sed "s,^#define \([^[:space:]]*for_each[^[:space:]]*\)(.*$,  - '\1'," \
-#   | sort | uniq
-ForEachMacros:
-  - 'apei_estatus_for_each_section'
-  - 'ata_for_each_dev'
-  - 'ata_for_each_link'
-  - '__ata_qc_for_each'
-  - 'ata_qc_for_each'
-  - 'ata_qc_for_each_raw'
-  - 'ata_qc_for_each_with_internal'
-  - 'ax25_for_each'
-  - 'ax25_uid_for_each'
-  - '__bio_for_each_bvec'
-  - 'bio_for_each_bvec'
-  - 'bio_for_each_bvec_all'
-  - 'bio_for_each_integrity_vec'
-  - '__bio_for_each_segment'
-  - 'bio_for_each_segment'
-  - 'bio_for_each_segment_all'
-  - 'bio_list_for_each'
-  - 'bip_for_each_vec'
-  - 'bitmap_for_each_clear_region'
-  - 'bitmap_for_each_set_region'
-  - 'blkg_for_each_descendant_post'
-  - 'blkg_for_each_descendant_pre'
-  - 'blk_queue_for_each_rl'
-  - 'bond_for_each_slave'
-  - 'bond_for_each_slave_rcu'
-  - 'bpf_for_each_spilled_reg'
-  - 'btree_for_each_safe128'
-  - 'btree_for_each_safe32'
-  - 'btree_for_each_safe64'
-  - 'btree_for_each_safel'
-  - 'card_for_each_dev'
-  - 'cgroup_taskset_for_each'
-  - 'cgroup_taskset_for_each_leader'
-  - 'cpufreq_for_each_entry'
-  - 'cpufreq_for_each_entry_idx'
-  - 'cpufreq_for_each_valid_entry'
-  - 'cpufreq_for_each_valid_entry_idx'
-  - 'css_for_each_child'
-  - 'css_for_each_descendant_post'
-  - 'css_for_each_descendant_pre'
-  - 'device_for_each_child_node'
-  - 'displayid_iter_for_each'
-  - 'dma_fence_chain_for_each'
-  - 'do_for_each_ftrace_op'
-  - 'drm_atomic_crtc_for_each_plane'
-  - 'drm_atomic_crtc_state_for_each_plane'
-  - 'drm_atomic_crtc_state_for_each_plane_state'
-  - 'drm_atomic_for_each_plane_damage'
-  - 'drm_client_for_each_connector_iter'
-  - 'drm_client_for_each_modeset'
-  - 'drm_connector_for_each_possible_encoder'
-  - 'drm_for_each_bridge_in_chain'
-  - 'drm_for_each_connector_iter'
-  - 'drm_for_each_crtc'
-  - 'drm_for_each_crtc_reverse'
-  - 'drm_for_each_encoder'
-  - 'drm_for_each_encoder_mask'
-  - 'drm_for_each_fb'
-  - 'drm_for_each_legacy_plane'
-  - 'drm_for_each_plane'
-  - 'drm_for_each_plane_mask'
-  - 'drm_for_each_privobj'
-  - 'drm_mm_for_each_hole'
-  - 'drm_mm_for_each_node'
-  - 'drm_mm_for_each_node_in_range'
-  - 'drm_mm_for_each_node_safe'
-  - 'flow_action_for_each'
-  - 'for_each_acpi_dev_match'
-  - 'for_each_active_dev_scope'
-  - 'for_each_active_drhd_unit'
-  - 'for_each_active_iommu'
-  - 'for_each_aggr_pgid'
-  - 'for_each_available_child_of_node'
-  - 'for_each_bio'
-  - 'for_each_board_func_rsrc'
-  - 'for_each_bvec'
-  - 'for_each_card_auxs'
-  - 'for_each_card_auxs_safe'
-  - 'for_each_card_components'
-  - 'for_each_card_dapms'
-  - 'for_each_card_pre_auxs'
-  - 'for_each_card_prelinks'
-  - 'for_each_card_rtds'
-  - 'for_each_card_rtds_safe'
-  - 'for_each_card_widgets'
-  - 'for_each_card_widgets_safe'
-  - 'for_each_cgroup_storage_type'
-  - 'for_each_child_of_node'
-  - 'for_each_clear_bit'
-  - 'for_each_clear_bit_from'
-  - 'for_each_cmsghdr'
-  - 'for_each_compatible_node'
-  - 'for_each_component_dais'
-  - 'for_each_component_dais_safe'
-  - 'for_each_comp_order'
-  - 'for_each_console'
-  - 'for_each_cpu'
-  - 'for_each_cpu_and'
-  - 'for_each_cpu_not'
-  - 'for_each_cpu_wrap'
-  - 'for_each_dapm_widgets'
-  - 'for_each_dev_addr'
-  - 'for_each_dev_scope'
-  - 'for_each_dma_cap_mask'
-  - 'for_each_dpcm_be'
-  - 'for_each_dpcm_be_rollback'
-  - 'for_each_dpcm_be_safe'
-  - 'for_each_dpcm_fe'
-  - 'for_each_drhd_unit'
-  - 'for_each_dss_dev'
-  - 'for_each_dtpm_table'
-  - 'for_each_efi_memory_desc'
-  - 'for_each_efi_memory_desc_in_map'
-  - 'for_each_element'
-  - 'for_each_element_extid'
-  - 'for_each_element_id'
-  - 'for_each_endpoint_of_node'
-  - 'for_each_evictable_lru'
-  - 'for_each_fib6_node_rt_rcu'
-  - 'for_each_fib6_walker_rt'
-  - 'for_each_free_mem_pfn_range_in_zone'
-  - 'for_each_free_mem_pfn_range_in_zone_from'
-  - 'for_each_free_mem_range'
-  - 'for_each_free_mem_range_reverse'
-  - 'for_each_func_rsrc'
-  - 'for_each_hstate'
-  - 'for_each_if'
-  - 'for_each_iommu'
-  - 'for_each_ip_tunnel_rcu'
-  - 'for_each_irq_nr'
-  - 'for_each_link_codecs'
-  - 'for_each_link_cpus'
-  - 'for_each_link_platforms'
-  - 'for_each_lru'
-  - 'for_each_matching_node'
-  - 'for_each_matching_node_and_match'
-  - 'for_each_member'
-  - 'for_each_memcg_cache_index'
-  - 'for_each_mem_pfn_range'
-  - '__for_each_mem_range'
-  - 'for_each_mem_range'
-  - '__for_each_mem_range_rev'
-  - 'for_each_mem_range_rev'
-  - 'for_each_mem_region'
-  - 'for_each_migratetype_order'
-  - 'for_each_msi_entry'
-  - 'for_each_msi_entry_safe'
-  - 'for_each_msi_vector'
-  - 'for_each_net'
-  - 'for_each_net_continue_reverse'
-  - 'for_each_netdev'
-  - 'for_each_netdev_continue'
-  - 'for_each_netdev_continue_rcu'
-  - 'for_each_netdev_continue_reverse'
-  - 'for_each_netdev_feature'
-  - 'for_each_netdev_in_bond_rcu'
-  - 'for_each_netdev_rcu'
-  - 'for_each_netdev_reverse'
-  - 'for_each_netdev_safe'
-  - 'for_each_net_rcu'
-  - 'for_each_new_connector_in_state'
-  - 'for_each_new_crtc_in_state'
-  - 'for_each_new_mst_mgr_in_state'
-  - 'for_each_new_plane_in_state'
-  - 'for_each_new_private_obj_in_state'
-  - 'for_each_node'
-  - 'for_each_node_by_name'
-  - 'for_each_node_by_type'
-  - 'for_each_node_mask'
-  - 'for_each_node_state'
-  - 'for_each_node_with_cpus'
-  - 'for_each_node_with_property'
-  - 'for_each_nonreserved_multicast_dest_pgid'
-  - 'for_each_of_allnodes'
-  - 'for_each_of_allnodes_from'
-  - 'for_each_of_cpu_node'
-  - 'for_each_of_pci_range'
-  - 'for_each_old_connector_in_state'
-  - 'for_each_old_crtc_in_state'
-  - 'for_each_old_mst_mgr_in_state'
-  - 'for_each_oldnew_connector_in_state'
-  - 'for_each_oldnew_crtc_in_state'
-  - 'for_each_oldnew_mst_mgr_in_state'
-  - 'for_each_oldnew_plane_in_state'
-  - 'for_each_oldnew_plane_in_state_reverse'
-  - 'for_each_oldnew_private_obj_in_state'
-  - 'for_each_old_plane_in_state'
-  - 'for_each_old_private_obj_in_state'
-  - 'for_each_online_cpu'
-  - 'for_each_online_node'
-  - 'for_each_online_pgdat'
-  - 'for_each_pci_bridge'
-  - 'for_each_pci_dev'
-  - 'for_each_pci_msi_entry'
-  - 'for_each_pcm_streams'
-  - 'for_each_physmem_range'
-  - 'for_each_populated_zone'
-  - 'for_each_possible_cpu'
-  - 'for_each_present_cpu'
-  - 'for_each_prime_number'
-  - 'for_each_prime_number_from'
-  - 'for_each_process'
-  - 'for_each_process_thread'
-  - 'for_each_prop_codec_conf'
-  - 'for_each_prop_dai_codec'
-  - 'for_each_prop_dai_cpu'
-  - 'for_each_prop_dlc_codecs'
-  - 'for_each_prop_dlc_cpus'
-  - 'for_each_prop_dlc_platforms'
-  - 'for_each_property_of_node'
-  - 'for_each_registered_fb'
-  - 'for_each_requested_gpio'
-  - 'for_each_requested_gpio_in_range'
-  - 'for_each_reserved_mem_range'
-  - 'for_each_reserved_mem_region'
-  - 'for_each_rtd_codec_dais'
-  - 'for_each_rtd_components'
-  - 'for_each_rtd_cpu_dais'
-  - 'for_each_rtd_dais'
-  - 'for_each_set_bit'
-  - 'for_each_set_bit_from'
-  - 'for_each_set_clump8'
-  - 'for_each_sg'
-  - 'for_each_sg_dma_page'
-  - 'for_each_sg_page'
-  - 'for_each_sgtable_dma_page'
-  - 'for_each_sgtable_dma_sg'
-  - 'for_each_sgtable_page'
-  - 'for_each_sgtable_sg'
-  - 'for_each_sibling_event'
-  - 'for_each_subelement'
-  - 'for_each_subelement_extid'
-  - 'for_each_subelement_id'
-  - '__for_each_thread'
-  - 'for_each_thread'
-  - 'for_each_unicast_dest_pgid'
-  - 'for_each_vsi'
-  - 'for_each_wakeup_source'
-  - 'for_each_zone'
-  - 'for_each_zone_zonelist'
-  - 'for_each_zone_zonelist_nodemask'
-  - 'fwnode_for_each_available_child_node'
-  - 'fwnode_for_each_child_node'
-  - 'fwnode_graph_for_each_endpoint'
-  - 'gadget_for_each_ep'
-  - 'genradix_for_each'
-  - 'genradix_for_each_from'
-  - 'hash_for_each'
-  - 'hash_for_each_possible'
-  - 'hash_for_each_possible_rcu'
-  - 'hash_for_each_possible_rcu_notrace'
-  - 'hash_for_each_possible_safe'
-  - 'hash_for_each_rcu'
-  - 'hash_for_each_safe'
-  - 'hctx_for_each_ctx'
-  - 'hlist_bl_for_each_entry'
-  - 'hlist_bl_for_each_entry_rcu'
-  - 'hlist_bl_for_each_entry_safe'
-  - 'hlist_for_each'
-  - 'hlist_for_each_entry'
-  - 'hlist_for_each_entry_continue'
-  - 'hlist_for_each_entry_continue_rcu'
-  - 'hlist_for_each_entry_continue_rcu_bh'
-  - 'hlist_for_each_entry_from'
-  - 'hlist_for_each_entry_from_rcu'
-  - 'hlist_for_each_entry_rcu'
-  - 'hlist_for_each_entry_rcu_bh'
-  - 'hlist_for_each_entry_rcu_notrace'
-  - 'hlist_for_each_entry_safe'
-  - 'hlist_for_each_entry_srcu'
-  - '__hlist_for_each_rcu'
-  - 'hlist_for_each_safe'
-  - 'hlist_nulls_for_each_entry'
-  - 'hlist_nulls_for_each_entry_from'
-  - 'hlist_nulls_for_each_entry_rcu'
-  - 'hlist_nulls_for_each_entry_safe'
-  - 'i3c_bus_for_each_i2cdev'
-  - 'i3c_bus_for_each_i3cdev'
-  - 'ide_host_for_each_port'
-  - 'ide_port_for_each_dev'
-  - 'ide_port_for_each_present_dev'
-  - 'idr_for_each_entry'
-  - 'idr_for_each_entry_continue'
-  - 'idr_for_each_entry_continue_ul'
-  - 'idr_for_each_entry_ul'
-  - 'in_dev_for_each_ifa_rcu'
-  - 'in_dev_for_each_ifa_rtnl'
-  - 'inet_bind_bucket_for_each'
-  - 'inet_lhash2_for_each_icsk_rcu'
-  - 'key_for_each'
-  - 'key_for_each_safe'
-  - 'klp_for_each_func'
-  - 'klp_for_each_func_safe'
-  - 'klp_for_each_func_static'
-  - 'klp_for_each_object'
-  - 'klp_for_each_object_safe'
-  - 'klp_for_each_object_static'
-  - 'kunit_suite_for_each_test_case'
-  - 'kvm_for_each_memslot'
-  - 'kvm_for_each_vcpu'
-  - 'list_for_each'
-  - 'list_for_each_codec'
-  - 'list_for_each_codec_safe'
-  - 'list_for_each_continue'
-  - 'list_for_each_entry'
-  - 'list_for_each_entry_continue'
-  - 'list_for_each_entry_continue_rcu'
-  - 'list_for_each_entry_continue_reverse'
-  - 'list_for_each_entry_from'
-  - 'list_for_each_entry_from_rcu'
-  - 'list_for_each_entry_from_reverse'
-  - 'list_for_each_entry_lockless'
-  - 'list_for_each_entry_rcu'
-  - 'list_for_each_entry_reverse'
-  - 'list_for_each_entry_safe'
-  - 'list_for_each_entry_safe_continue'
-  - 'list_for_each_entry_safe_from'
-  - 'list_for_each_entry_safe_reverse'
-  - 'list_for_each_entry_srcu'
-  - 'list_for_each_prev'
-  - 'list_for_each_prev_safe'
-  - 'list_for_each_safe'
-  - 'llist_for_each'
-  - 'llist_for_each_entry'
-  - 'llist_for_each_entry_safe'
-  - 'llist_for_each_safe'
-  - 'mci_for_each_dimm'
-  - 'media_device_for_each_entity'
-  - 'media_device_for_each_intf'
-  - 'media_device_for_each_link'
-  - 'media_device_for_each_pad'
-  - 'nanddev_io_for_each_page'
-  - 'netdev_for_each_lower_dev'
-  - 'netdev_for_each_lower_private'
-  - 'netdev_for_each_lower_private_rcu'
-  - 'netdev_for_each_mc_addr'
-  - 'netdev_for_each_uc_addr'
-  - 'netdev_for_each_upper_dev_rcu'
-  - 'netdev_hw_addr_list_for_each'
-  - 'nft_rule_for_each_expr'
-  - 'nla_for_each_attr'
-  - 'nla_for_each_nested'
-  - 'nlmsg_for_each_attr'
-  - 'nlmsg_for_each_msg'
-  - 'nr_neigh_for_each'
-  - 'nr_neigh_for_each_safe'
-  - 'nr_node_for_each'
-  - 'nr_node_for_each_safe'
-  - 'of_for_each_phandle'
-  - 'of_property_for_each_string'
-  - 'of_property_for_each_u32'
-  - 'pci_bus_for_each_resource'
-  - 'pcl_for_each_chunk'
-  - 'pcl_for_each_segment'
-  - 'pcm_for_each_format'
-  - 'ping_portaddr_for_each_entry'
-  - 'plist_for_each'
-  - 'plist_for_each_continue'
-  - 'plist_for_each_entry'
-  - 'plist_for_each_entry_continue'
-  - 'plist_for_each_entry_safe'
-  - 'plist_for_each_safe'
-  - 'pnp_for_each_card'
-  - 'pnp_for_each_dev'
-  - 'protocol_for_each_card'
-  - 'protocol_for_each_dev'
-  - 'queue_for_each_hw_ctx'
-  - 'radix_tree_for_each_slot'
-  - 'radix_tree_for_each_tagged'
-  - 'rb_for_each'
-  - 'rbtree_postorder_for_each_entry_safe'
-  - 'rdma_for_each_block'
-  - 'rdma_for_each_port'
-  - 'rdma_umem_for_each_dma_block'
-  - 'resource_list_for_each_entry'
-  - 'resource_list_for_each_entry_safe'
-  - 'rhl_for_each_entry_rcu'
-  - 'rhl_for_each_rcu'
-  - 'rht_for_each'
-  - 'rht_for_each_entry'
-  - 'rht_for_each_entry_from'
-  - 'rht_for_each_entry_rcu'
-  - 'rht_for_each_entry_rcu_from'
-  - 'rht_for_each_entry_safe'
-  - 'rht_for_each_from'
-  - 'rht_for_each_rcu'
-  - 'rht_for_each_rcu_from'
-  - '__rq_for_each_bio'
-  - 'rq_for_each_bvec'
-  - 'rq_for_each_segment'
-  - 'scsi_for_each_prot_sg'
-  - 'scsi_for_each_sg'
-  - 'sctp_for_each_hentry'
-  - 'sctp_skb_for_each'
-  - 'shdma_for_each_chan'
-  - '__shost_for_each_device'
-  - 'shost_for_each_device'
-  - 'sk_for_each'
-  - 'sk_for_each_bound'
-  - 'sk_for_each_entry_offset_rcu'
-  - 'sk_for_each_from'
-  - 'sk_for_each_rcu'
-  - 'sk_for_each_safe'
-  - 'sk_nulls_for_each'
-  - 'sk_nulls_for_each_from'
-  - 'sk_nulls_for_each_rcu'
-  - 'snd_array_for_each'
-  - 'snd_pcm_group_for_each_entry'
-  - 'snd_soc_dapm_widget_for_each_path'
-  - 'snd_soc_dapm_widget_for_each_path_safe'
-  - 'snd_soc_dapm_widget_for_each_sink_path'
-  - 'snd_soc_dapm_widget_for_each_source_path'
-  - 'tb_property_for_each'
-  - 'tcf_exts_for_each_action'
-  - 'udp_portaddr_for_each_entry'
-  - 'udp_portaddr_for_each_entry_rcu'
-  - 'usb_hub_for_each_child'
-  - 'v4l2_device_for_each_subdev'
-  - 'v4l2_m2m_for_each_dst_buf'
-  - 'v4l2_m2m_for_each_dst_buf_safe'
-  - 'v4l2_m2m_for_each_src_buf'
-  - 'v4l2_m2m_for_each_src_buf_safe'
-  - 'virtio_device_for_each_vq'
-  - 'while_for_each_ftrace_op'
-  - 'xa_for_each'
-  - 'xa_for_each_marked'
-  - 'xa_for_each_range'
-  - 'xa_for_each_start'
-  - 'xas_for_each'
-  - 'xas_for_each_conflict'
-  - 'xas_for_each_marked'
-  - 'xbc_array_for_each_value'
-  - 'xbc_for_each_key_value'
-  - 'xbc_node_for_each_array_value'
-  - 'xbc_node_for_each_child'
-  - 'xbc_node_for_each_key_value'
-  - 'zorro_for_each_dev'
-
-#IncludeBlocks: Preserve # Unknown to clang-format-5.0
-IncludeCategories:
-  - Regex: '.*'
-    Priority: 1
-IncludeIsMainRegex: '(Test)?$'
-IndentCaseLabels: false
-#IndentPPDirectives: None # Unknown to clang-format-5.0
-IndentWidth: 8
-IndentWrappedFunctionNames: false
-JavaScriptQuotes: Leave
-JavaScriptWrapImports: true
-KeepEmptyLinesAtTheStartOfBlocks: false
-MacroBlockBegin: ''
-MacroBlockEnd: ''
-MaxEmptyLinesToKeep: 1
-NamespaceIndentation: None
-#ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0
-ObjCBlockIndentWidth: 8
-ObjCSpaceAfterProperty: true
-ObjCSpaceBeforeProtocolList: true
-
-# Taken from git's rules
-#PenaltyBreakAssignment: 10 # Unknown to clang-format-4.0
-PenaltyBreakBeforeFirstCallParameter: 30
-PenaltyBreakComment: 10
-PenaltyBreakFirstLessLess: 0
-PenaltyBreakString: 10
-PenaltyExcessCharacter: 100
-PenaltyReturnTypeOnItsOwnLine: 60
-
-PointerAlignment: Right
-ReflowComments: false
-SortIncludes: false
-#SortUsingDeclarations: false # Unknown to clang-format-4.0
-SpaceAfterCStyleCast: false
-SpaceAfterTemplateKeyword: true
-SpaceBeforeAssignmentOperators: true
-#SpaceBeforeCtorInitializerColon: true # Unknown to clang-format-5.0
-#SpaceBeforeInheritanceColon: true # Unknown to clang-format-5.0
-SpaceBeforeParens: ControlStatements
-#SpaceBeforeRangeBasedForLoopColon: true # Unknown to clang-format-5.0
-SpaceInEmptyParentheses: false
-SpacesBeforeTrailingComments: 1
-SpacesInAngles: false
-SpacesInContainerLiterals: false
-SpacesInCStyleCastParentheses: false
-SpacesInParentheses: false
-SpacesInSquareBrackets: false
-Standard: Cpp03
-TabWidth: 8
-UseTab: Always
-...

.flake8

@@ -2,4 +2,4 @@
 exclude=
     # copied from the kernel sources
     utils/diffconfig
-max-line-length=132
+max-line-length=80

.gitlab-ci.yml

@@ -1,7 +1,7 @@
 # Configuration for Gitlab-CI.
 # Builds appear on https://gitlab.com/buildroot.org/buildroot/pipelines
 
-image: $CI_REGISTRY/buildroot.org/buildroot/base:20220206.1756
+image: buildroot/base:20200814.2228
 
 stages:
   - generate-gitlab-ci
@@ -11,11 +11,8 @@ generate-gitlab-ci-yml:
   stage: generate-gitlab-ci
   script: ./support/scripts/generate-gitlab-ci-yml support/misc/gitlab-ci.yml.in > generated-gitlab-ci.yml
   artifacts:
-    when: always
     paths:
       - generated-gitlab-ci.yml
-      - br-test-pkg/*/.config
-      - br-test-pkg/*/missing.config
 
 buildroot-pipeline:
   stage: build
@@ -24,5 +21,3 @@ buildroot-pipeline:
       - artifact: generated-gitlab-ci.yml
         job: generate-gitlab-ci-yml
     strategy: depend
-  variables:
-    PARENT_PIPELINE_ID: $CI_PIPELINE_ID

Config.in

@@ -87,8 +87,6 @@ config BR2_NEEDS_HOST_GCC_PLUGIN_SUPPORT
 
 source "arch/Config.in"
 
-source "toolchain/Config.in"
-
 menu "Build options"
 
 menu "Commands"
@@ -121,10 +119,6 @@ config BR2_SCP
 	string "Secure copy (scp) command"
 	default "scp"
 
-config BR2_SFTP
-	string "Secure file transfer (sftp) command"
-	default "sftp"
-
 config BR2_HG
 	string "Mercurial (hg) command"
 	default "hg"
@@ -287,15 +281,14 @@ config BR2_LUAROCKS_MIRROR
 
 config BR2_CPAN_MIRROR
 	string "CPAN mirror (Perl packages)"
-	default "https://cpan.metacpan.org"
+	default "http://cpan.metacpan.org"
 	help
 	  CPAN (Comprehensive Perl Archive Network) is a repository of
 	  Perl packages. It has multiple software mirrors scattered
 	  around the world. This option allows you to select a mirror.
 
 	  The list of mirrors is available at:
-	  http://mirrors.cpan.org/          (tabular)
-	  http://mirrors.cpan.org/map.html  (clickable world map)
+	  http://search.cpan.org/mirror
 
 endif
 
@@ -419,23 +412,10 @@ config BR2_DEBUG_3
 endchoice
 endif
 
-config BR2_ENABLE_RUNTIME_DEBUG
-	bool "build packages with runtime debugging info"
-	help
-	  Some packages may have runtime assertions, extra traces, and
-	  similar runtime elements that can help debugging. However,
-	  these elements may negatively influence performance so should
-	  normally not be enabled on production systems.
-
-	  Enable this option to enable such runtime debugging.
-
-	  Note: disabling this option is not a guarantee that all
-	  packages effectively removed these runtime debugging elements.
-
 config BR2_STRIP_strip
 	bool "strip target binaries"
 	default y
-	depends on BR2_BINFMT_ELF
+	depends on !BR2_PACKAGE_HOST_ELF2FLT
 	help
 	  Binaries and libraries in the target filesystem will be
 	  stripped using the normal 'strip' command. This allows to save
@@ -554,25 +534,6 @@ config BR2_OPTIMIZE_FAST
 
 endchoice
 
-config BR2_ENABLE_LTO
-	bool "build packages with link-time optimisation"
-	help
-	  Enable the link-time optimisation (LTO) option when building
-	  packages. Link-time optimisation re-runs optimisations at
-	  link time, which allows the compiler to do interprocedural
-	  analysis across compilation units and thus come with better
-	  results: smaller size and better performance.
-
-	  Note that this analysis is limited to statically linked
-	  object files and libraries.
-
-	  This option may significantly increase build times,
-	  sometimes 5 times longer, with only limited gains.
-
-	  At this time, this option only enables LTO in packages that
-	  have an explicit configuration option for it. Other packages
-	  always enable LTO, but most packages never enable LTO.
-
 config BR2_GOOGLE_BREAKPAD_ENABLE
 	bool "Enable google-breakpad support"
 	depends on BR2_INSTALL_LIBSTDCPP
@@ -623,7 +584,6 @@ choice
 
 config BR2_STATIC_LIBS
 	bool "static only"
-	depends on !BR2_TOOLCHAIN_USES_GLIBC
 	help
 	  Build and use only static libraries. No shared libraries will
 	  be installed on the target. This potentially increases your
@@ -632,9 +592,6 @@ config BR2_STATIC_LIBS
 	  option is enabled, due to their need for dynamic library
 	  support.
 
-comment "static only needs a toolchain w/ uclibc or musl"
-	depends on BR2_TOOLCHAIN_USES_GLIBC
-
 config BR2_SHARED_LIBS
 	bool "shared only"
 	depends on BR2_BINFMT_SUPPORTS_SHARED
@@ -756,18 +713,8 @@ endmenu
 
 comment "Security Hardening Options"
 
-config BR2_PIC_PIE_ARCH_SUPPORTS
-	bool
-	default y
-	# Microblaze glibc toolchains don't work with PIC/PIE enabled
-	depends on !BR2_microblaze
-	# Nios2 toolchains produce non working binaries with -fPIC
-	depends on !BR2_nios2
-
 config BR2_PIC_PIE
 	bool "Build code with PIC/PIE"
-	default y
-	depends on BR2_PIC_PIE_ARCH_SUPPORTS
 	depends on BR2_SHARED_LIBS
 	depends on BR2_TOOLCHAIN_SUPPORTS_PIE
 	help
@@ -775,15 +722,12 @@ config BR2_PIC_PIE
 	  Position-Independent Executables (PIE).
 
 comment "PIC/PIE needs a toolchain w/ PIE"
-	depends on BR2_PIC_PIE_ARCH_SUPPORTS
 	depends on BR2_SHARED_LIBS
 	depends on !BR2_TOOLCHAIN_SUPPORTS_PIE
 
 choice
 	bool "Stack Smashing Protection"
 	default BR2_SSP_ALL if BR2_ENABLE_SSP # legacy
-	default BR2_SSP_STRONG if BR2_TOOLCHAIN_HAS_SSP_STRONG
-	default BR2_SSP_REGULAR
 	depends on BR2_TOOLCHAIN_HAS_SSP
 	help
 	  Enable stack smashing protection support using GCC's
@@ -845,8 +789,6 @@ comment "Stack Smashing Protection needs a toolchain w/ SSP"
 
 choice
 	bool "RELRO Protection"
-	default BR2_RELRO_FULL if BR2_TOOLCHAIN_SUPPORTS_PIE
-	default BR2_RELRO_PARTIAL
 	depends on BR2_SHARED_LIBS
 	help
 	  Enable a link-time protection know as RELRO (RELocation Read
@@ -866,7 +808,6 @@ config BR2_RELRO_PARTIAL
 
 config BR2_RELRO_FULL
 	bool "Full"
-	depends on BR2_PIC_PIE_ARCH_SUPPORTS
 	depends on BR2_TOOLCHAIN_SUPPORTS_PIE
 	select BR2_PIC_PIE
 	help
@@ -875,7 +816,6 @@ config BR2_RELRO_FULL
 	  program loading, i.e every time an executable is started.
 
 comment "RELRO Full needs a toolchain w/ PIE"
-	depends on BR2_PIC_PIE_ARCH_SUPPORTS
 	depends on !BR2_TOOLCHAIN_SUPPORTS_PIE
 
 endchoice
@@ -883,16 +823,8 @@ endchoice
 comment "RELocation Read Only (RELRO) needs shared libraries"
 	depends on !BR2_SHARED_LIBS
 
-config BR2_FORTIFY_SOURCE_ARCH_SUPPORTS
-	bool
-	default y
-	# Microblaze glibc toolchains don't work with Fortify Source enabled
-	depends on !BR2_microblaze
-
 choice
 	bool "Buffer-overflow Detection (FORTIFY_SOURCE)"
-	default BR2_FORTIFY_SOURCE_1
-	depends on BR2_FORTIFY_SOURCE_ARCH_SUPPORTS
 	depends on BR2_TOOLCHAIN_USES_GLIBC
 	depends on !BR2_OPTIMIZE_0
 	help
@@ -933,10 +865,11 @@ config BR2_FORTIFY_SOURCE_2
 endchoice
 
 comment "Fortify Source needs a glibc toolchain and optimization"
-	depends on BR2_FORTIFY_SOURCE_ARCH_SUPPORTS
 	depends on (!BR2_TOOLCHAIN_USES_GLIBC || BR2_OPTIMIZE_0)
 endmenu
 
+source "toolchain/Config.in"
+
 source "system/Config.in"
 
 source "linux/Config.in"

Makefile

@@ -92,9 +92,9 @@ all:
 .PHONY: all
 
 # Set and export the version string
-export BR2_VERSION := 2022.11.1
+export BR2_VERSION := 2020.11.2
 # Actual time the release is cut (for reproducible builds)
-BR2_VERSION_EPOCH = 1674028000
+BR2_VERSION_EPOCH = 1612125000
 
 # Save running make version since it's clobbered by the make package
 RUNNING_MAKE_VERSION := $(MAKE_VERSION)
@@ -141,7 +141,7 @@ nobuild_targets := source %-source \
 	clean distclean help show-targets graph-depends \
 	%-graph-depends %-show-depends %-show-version \
 	graph-build graph-size list-defconfigs \
-	savedefconfig update-defconfig printvars show-vars
+	savedefconfig update-defconfig printvars
 ifeq ($(MAKECMDGOALS),)
 BR_BUILDING = y
 else ifneq ($(filter-out $(nobuild_targets),$(MAKECMDGOALS)),)
@@ -229,8 +229,6 @@ LEGAL_MANIFEST_CSV_HOST = $(LEGAL_INFO_DIR)/host-manifest.csv
 LEGAL_WARNINGS = $(LEGAL_INFO_DIR)/.warnings
 LEGAL_REPORT = $(LEGAL_INFO_DIR)/README
 
-CPE_UPDATES_DIR = $(BASE_DIR)/cpe-updates
-
 BR2_CONFIG = $(CONFIG_DIR)/.config
 
 # Pull in the user's configuration file
@@ -286,16 +284,12 @@ ifndef HOSTCC
 HOSTCC := gcc
 HOSTCC := $(shell which $(HOSTCC) || type -p $(HOSTCC) || echo gcc)
 endif
-ifndef HOSTCC_NOCCACHE
 HOSTCC_NOCCACHE := $(HOSTCC)
-endif
 ifndef HOSTCXX
 HOSTCXX := g++
 HOSTCXX := $(shell which $(HOSTCXX) || type -p $(HOSTCXX) || echo g++)
 endif
-ifndef HOSTCXX_NOCCACHE
 HOSTCXX_NOCCACHE := $(HOSTCXX)
-endif
 ifndef HOSTCPP
 HOSTCPP := cpp
 endif
@@ -426,7 +420,6 @@ unexport O
 unexport GCC_COLORS
 unexport PLATFORM
 unexport OS
-unexport DEVICE_TREE
 
 GNU_HOST_NAME := $(shell support/gnuconfig/config.guess)
 
@@ -438,8 +431,22 @@ QUIET := $(if $(findstring s,$(filter-out --%,$(MAKEFLAGS))),-q)
 
 # Strip off the annoying quoting
 ARCH := $(call qstrip,$(BR2_ARCH))
-NORMALIZED_ARCH := $(call qstrip,$(BR2_NORMALIZED_ARCH))
-KERNEL_ARCH := $(call qstrip,$(BR2_NORMALIZED_ARCH))
+
+KERNEL_ARCH := $(shell echo "$(ARCH)" | sed -e "s/-.*//" \
+	-e s/i.86/i386/ -e s/sun4u/sparc64/ \
+	-e s/arcle/arc/ \
+	-e s/arceb/arc/ \
+	-e s/arm.*/arm/ -e s/sa110/arm/ \
+	-e s/aarch64.*/arm64/ \
+	-e s/nds32.*/nds32/ \
+	-e s/or1k/openrisc/ \
+	-e s/parisc64/parisc/ \
+	-e s/powerpc64.*/powerpc/ \
+	-e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
+	-e s/riscv.*/riscv/ \
+	-e s/sh.*/sh/ \
+	-e s/s390x/s390/ \
+	-e s/microblazeel/microblaze/)
 
 ZCAT := $(call qstrip,$(BR2_ZCAT))
 BZCAT := $(call qstrip,$(BR2_BZCAT))
@@ -478,7 +485,8 @@ BR_CACHE_DIR ?= $(call qstrip,$(BR2_CCACHE_DIR))
 export BR_CACHE_DIR
 HOSTCC = $(CCACHE) $(HOSTCC_NOCCACHE)
 HOSTCXX = $(CCACHE) $(HOSTCXX_NOCCACHE)
-export BR2_USE_CCACHE ?= 1
+else
+export BR_NO_CCACHE
 endif
 
 # Scripts in support/ or post-build scripts may need to reference
@@ -564,12 +572,14 @@ ifeq ($(BR_FORCE_CHECK_DEPENDENCIES),YES)
 
 define CHECK_ONE_DEPENDENCY
 ifeq ($$($(2)_TYPE),target)
+ifeq ($$($(2)_IS_VIRTUAL),)
 ifneq ($$($$($(2)_KCONFIG_VAR)),y)
 $$(error $$($(2)_NAME) is in the dependency chain of $$($(1)_NAME) that \
 has added it to its _DEPENDENCIES variable without selecting it or \
 depending on it from Config.in)
 endif
 endif
+endif
 endef
 
 $(foreach pkg,$(call UPPERCASE,$(PACKAGES)),\
@@ -583,9 +593,6 @@ $(BUILD_DIR)/buildroot-config/auto.conf: $(BR2_CONFIG)
 
 .PHONY: prepare
 prepare: $(BUILD_DIR)/buildroot-config/auto.conf
-	@$(foreach s, $(call qstrip,$(BR2_ROOTFS_PRE_BUILD_SCRIPT)), \
-		$(call MESSAGE,"Executing pre-build script $(s)"); \
-		$(EXTRA_ENV) $(s) $(TARGET_DIR) $(call qstrip,$(BR2_ROOTFS_POST_SCRIPT_ARGS))$(sep))
 
 .PHONY: world
 world: target-post-image
@@ -646,17 +653,40 @@ STRIP_FIND_SPECIAL_LIBS_CMD = \
 	\( -name 'ld-*.so*' -o -name 'libpthread*.so*' \) \
 	-print0
 
-# Generate locale data.
+ifeq ($(BR2_ECLIPSE_REGISTER),y)
+define TOOLCHAIN_ECLIPSE_REGISTER
+	./support/scripts/eclipse-register-toolchain `readlink -f $(O)` \
+		$(notdir $(TARGET_CROSS)) $(BR2_ARCH)
+endef
+TARGET_FINALIZE_HOOKS += TOOLCHAIN_ECLIPSE_REGISTER
+endif
+
+# Generate locale data. Basically, we call the localedef program
+# (built by the host-localedef package) for each locale. The input
+# data comes preferably from the toolchain, or if the toolchain does
+# not have them (Linaro toolchains), we use the ones available on the
+# host machine.
 ifeq ($(BR2_TOOLCHAIN_USES_GLIBC),y)
 GLIBC_GENERATE_LOCALES = $(call qstrip,$(BR2_GENERATE_LOCALE))
 ifneq ($(GLIBC_GENERATE_LOCALES),)
 PACKAGES += host-localedef
 
 define GENERATE_GLIBC_LOCALES
-	+$(MAKE) -f support/misc/gen-glibc-locales.mk \
-		ENDIAN=$(call LOWERCASE,$(BR2_ENDIAN)) \
-		LOCALES="$(GLIBC_GENERATE_LOCALES)" \
-		Q=$(Q)
+	$(Q)mkdir -p $(TARGET_DIR)/usr/lib/locale/
+	$(Q)for locale in $(GLIBC_GENERATE_LOCALES) ; do \
+		inputfile=`echo $${locale} | cut -f1 -d'.'` ; \
+		charmap=`echo $${locale} | cut -f2 -d'.' -s` ; \
+		if test -z "$${charmap}" ; then \
+			charmap="UTF-8" ; \
+		fi ; \
+		echo "Generating locale $${inputfile}.$${charmap}" ; \
+		I18NPATH=$(STAGING_DIR)/usr/share/i18n:/usr/share/i18n \
+		$(HOST_DIR)/bin/localedef \
+			--prefix=$(TARGET_DIR) \
+			--$(call LOWERCASE,$(BR2_ENDIAN))-endian \
+			-i $${inputfile} -f $${charmap} \
+			$${locale} ; \
+	done
 endef
 TARGET_FINALIZE_HOOKS += GENERATE_GLIBC_LOCALES
 endif
@@ -724,7 +754,7 @@ target-finalize: $(PACKAGES) $(TARGET_DIR) host-finalize
 	rm -rf $(TARGET_DIR)/usr/include $(TARGET_DIR)/usr/share/aclocal \
 		$(TARGET_DIR)/usr/lib/pkgconfig $(TARGET_DIR)/usr/share/pkgconfig \
 		$(TARGET_DIR)/usr/lib/cmake $(TARGET_DIR)/usr/share/cmake \
-		$(TARGET_DIR)/usr/lib/rpm $(TARGET_DIR)/usr/doc
+		$(TARGET_DIR)/usr/doc
 	find $(TARGET_DIR)/usr/{lib,share}/ -name '*.cmake' -print0 | xargs -0 rm -f
 	find $(TARGET_DIR)/lib/ $(TARGET_DIR)/usr/lib/ $(TARGET_DIR)/usr/libexec/ \
 		\( -name '*.a' -o -name '*.la' -o -name '*.prl' \) -print0 | xargs -0 rm -f
@@ -799,14 +829,6 @@ endif # merged /usr
 
 	touch $(TARGET_DIR)/usr
 
-# Note: this will run in the filesystem context, so will use a copy
-# of target/, not the real one, so the files are still available on
-# re-builds (foo-rebuild, etc...)
-define ROOTFS_RM_HWDB_DATA
-	rm -rf $(TARGET_DIR)/usr/lib/udev/hwdb.d/ $(TARGET_DIR)/etc/udev/hwdb.d/
-endef
-ROOTFS_PRE_CMD_HOOKS += ROOTFS_RM_HWDB_DATA
-
 .PHONY: target-post-image
 target-post-image: $(TARGETS_ROOTFS) target-finalize staging-finalize
 	@rm -f $(ROOTFS_COMMON_TAR)
@@ -870,9 +892,6 @@ graph-build: $(O)/build/build-time.log
 				   --type=pie-$(t) --input=$(<) \
 				   --output=$(GRAPHS_DIR)/build.pie-$(t).$(BR_GRAPH_OUT) \
 				   $(if $(BR2_GRAPH_ALT),--alternate-colors)$(sep))
-	./support/scripts/graph-build-time --type=timeline --input=$(<) \
-		--output=$(GRAPHS_DIR)/build.timeline.$(BR_GRAPH_OUT) \
-		$(if $(BR2_GRAPH_ALT),--alternate-colors)
 
 .PHONY: graph-depends-requirements
 graph-depends-requirements:
@@ -926,14 +945,6 @@ pkg-stats:
 		--html $(O)/pkg-stats.html \
 		--nvd-path $(DL_DIR)/buildroot-nvd
 
-.PHONY: missing-cpe
-missing-cpe:
-	$(Q)mkdir -p $(CPE_UPDATES_DIR)
-	$(Q)cd "$(CONFIG_DIR)" ; \
-	$(TOPDIR)/support/scripts/gen-missing-cpe \
-		--nvd-path $(DL_DIR)/buildroot-nvd \
-		--output $(CPE_UPDATES_DIR)
-
 else # ifeq ($(BR2_HAVE_DOT_CONFIG),y)
 
 # Some subdirectories are also package names. To avoid that "make linux"
@@ -1010,18 +1021,13 @@ oldconfig syncconfig olddefconfig: $(BUILD_DIR)/buildroot-config/conf outputmake
 defconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile
 	@$(COMMON_CONFIG_ENV) $< --defconfig$(if $(DEFCONFIG),=$(DEFCONFIG)) $(CONFIG_CONFIG_IN)
 
-%_defconfig: $(BUILD_DIR)/buildroot-config/conf  outputmakefile
-	@defconfig=$(or \
-		$(firstword \
-			$(foreach d, \
-				$(call reverse,$(TOPDIR) $(BR2_EXTERNAL_DIRS)), \
-				$(wildcard $(d)/configs/$@) \
-			) \
-		), \
-		$(error "Can't find $@") \
-	); \
-	$(COMMON_CONFIG_ENV) BR2_DEFCONFIG=$${defconfig} \
-		$< --defconfig=$${defconfig} $(CONFIG_CONFIG_IN)
+define percent_defconfig
+# Override the BR2_DEFCONFIG from COMMON_CONFIG_ENV with the new defconfig
+%_defconfig: $(BUILD_DIR)/buildroot-config/conf $(1)/configs/%_defconfig outputmakefile
+	@$$(COMMON_CONFIG_ENV) BR2_DEFCONFIG=$(1)/configs/$$@ \
+		$$< --defconfig=$(1)/configs/$$@ $$(CONFIG_CONFIG_IN)
+endef
+$(eval $(foreach d,$(call reverse,$(TOPDIR) $(BR2_EXTERNAL_DIRS)),$(call percent_defconfig,$(d))$(sep)))
 
 update-defconfig: savedefconfig
 
@@ -1057,55 +1063,23 @@ endif
 # Makefiles. Alternatively, if a non-empty VARS variable is passed,
 # only the variables matching the make pattern passed in VARS are
 # displayed.
-# show-vars does the same, but as a JSON dictionnary.
-#
-# Note: we iterate of .VARIABLES and filter each variable individually,
-# to workaround a bug in make 4.3; see https://savannah.gnu.org/bugs/?59093
 .PHONY: printvars
 printvars:
-ifndef VARS
-	$(error Please pass a non-empty VARS to 'make printvars')
-endif
 	@:
 	$(foreach V, \
-		$(sort $(foreach X, $(.VARIABLES), $(filter $(VARS),$(X)))), \
+		$(sort $(filter $(VARS),$(.VARIABLES))), \
 		$(if $(filter-out environment% default automatic, \
 				$(origin $V)), \
 		$(if $(QUOTED_VARS),\
 			$(info $V='$(subst ','\'',$(if $(RAW_VARS),$(value $V),$($V)))'), \
 			$(info $V=$(if $(RAW_VARS),$(value $V),$($V))))))
-# ')))) # Syntax colouring...
-
-# See details above, same as for printvars
-.PHONY: show-vars
-show-vars: VARS?=%
-show-vars:
-	@:
-	$(foreach i, \
-		$(call clean-json, { \
-			$(foreach V, \
-				$(.VARIABLES), \
-				$(and $(filter $(VARS),$(V)) \
-					, \
-					$(filter-out environment% default automatic, $(origin $V)) \
-					, \
-					"$V": { \
-						"expanded": $(call mk-json-str,$($V))$(comma) \
-						"raw": $(call mk-json-str,$(value $V)) \
-					}$(comma) \
-				) \
-			) \
-		} ) \
-		, \
-		$(info $(i)) \
-	)
+# ' Syntax colouring...
 
 .PHONY: clean
 clean:
 	rm -rf $(BASE_TARGET_DIR) $(BINARIES_DIR) $(HOST_DIR) $(HOST_DIR_SYMLINK) \
 		$(BUILD_DIR) $(BASE_DIR)/staging \
-		$(LEGAL_INFO_DIR) $(GRAPHS_DIR) $(PER_PACKAGE_DIR) $(CPE_UPDATES_DIR) \
-		$(O)/pkg-stats.*
+		$(LEGAL_INFO_DIR) $(GRAPHS_DIR) $(PER_PACKAGE_DIR)
 
 .PHONY: distclean
 distclean: clean
@@ -1166,7 +1140,6 @@ help:
 	@echo '  <pkg>-dirclean         - Remove <pkg> build directory'
 	@echo '  <pkg>-reconfigure      - Restart the build from the configure step'
 	@echo '  <pkg>-rebuild          - Restart the build from the build step'
-	@echo '  <pkg>-reinstall        - Restart the build from the install step'
 	$(foreach p,$(HELP_PACKAGES), \
 		@echo $(sep) \
 		@echo '$($(p)_NAME):' $(sep) \
@@ -1190,10 +1163,7 @@ help:
 	@echo '  legal-info             - generate info about license compliance'
 	@echo '  show-info              - generate info about packages, as a JSON blurb'
 	@echo '  pkg-stats              - generate info about packages as JSON and HTML'
-	@echo '  missing-cpe            - generate XML snippets for missing CPE identifiers'
 	@echo '  printvars              - dump internal variables selected with VARS=...'
-	@echo '  show-vars              - dump all internal variables as a JSON blurb; use VARS=...'
-	@echo '                           to limit the list to variables names matching that pattern'
 	@echo
 	@echo '  make V=0|1             - 0 => quiet build (default), 1 => verbose build'
 	@echo '  make O=dir             - Locate all output files in "dir", including .config'
@@ -1242,7 +1212,7 @@ release:
 	$(MAKE) O=$(OUT) distclean
 	tar rf $(OUT).tar $(OUT)
 	gzip -9 -c < $(OUT).tar > $(OUT).tar.gz
-	xz -9 -c < $(OUT).tar > $(OUT).tar.xz
+	bzip2 -9 -c < $(OUT).tar > $(OUT).tar.bz2
 	rm -rf $(OUT) $(OUT).tar
 
 print-version:
@@ -1253,12 +1223,11 @@ check-flake8:
 	| xargs file \
 	| grep 'Python script' \
 	| cut -d':' -f1 \
-	| xargs -- python3 -m flake8 --statistics
+	| xargs -- python3 -m flake8 --statistics --max-line-length=132
 
 check-package:
-	find $(TOPDIR) -type f \( -name '*.mk' -o -name '*.hash' -o -name 'Config.*' -o -name '*.patch' \) \
-		-a -not -name '*.orig' -a -not -name '*.rej' \
-		-exec ./utils/check-package --exclude=Sob {} +
+	find $(TOPDIR) -type f \( -name '*.mk' -o -name '*.hash' -o -name 'Config.*' \) \
+		-exec ./utils/check-package {} +
 
 include docs/manual/manual.mk
 -include $(foreach dir,$(BR2_EXTERNAL_DIRS),$(sort $(wildcard $(dir)/docs/*/*.mk)))

README

@@ -20,7 +20,7 @@ Buildroot comes with a basic configuration for a number of boards. Run
 
 Please feed suggestions, bug reports, insults, and bribes back to the
 buildroot mailing list: buildroot@buildroot.org
-You can also find us on #buildroot on OFTC IRC.
+You can also find us on #buildroot on Freenode IRC.
 
 If you would like to contribute patches, please read
 https://buildroot.org/manual.html#submitting-patches

arch/Config.in

@@ -9,7 +9,10 @@ config BR2_KERNEL_64_USERLAND_32
 config BR2_SOFT_FLOAT
 	bool
 
-config BR2_USE_MMU
+config BR2_ARCH_HAS_MMU_MANDATORY
+	bool
+
+config BR2_ARCH_HAS_MMU_OPTIONAL
 	bool
 
 choice
@@ -20,7 +23,7 @@ choice
 
 config BR2_arcle
 	bool "ARC (little endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Synopsys' DesignWare ARC Processor Cores are a family of
 	  32-bit CPUs that can be used from deeply embedded to high
@@ -28,7 +31,7 @@ config BR2_arcle
 
 config BR2_arceb
 	bool "ARC (big endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Synopsys' DesignWare ARC Processor Cores are a family of
 	  32-bit CPUs that can be used from deeply embedded to high
@@ -46,7 +49,7 @@ config BR2_arm
 
 config BR2_armeb
 	bool "ARM (big endian)"
-	select BR2_USE_MMU
+	# MMU support is set by the subarchitecture file, arch/Config.in.arm
 	help
 	  ARM is a 32-bit reduced instruction set computer (RISC)
 	  instruction set architecture (ISA) developed by ARM Holdings.
@@ -57,6 +60,7 @@ config BR2_armeb
 config BR2_aarch64
 	bool "AArch64 (little endian)"
 	select BR2_ARCH_IS_64
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Aarch64 is a 64-bit architecture developed by ARM Holdings.
 	  http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
@@ -65,14 +69,26 @@ config BR2_aarch64
 config BR2_aarch64_be
 	bool "AArch64 (big endian)"
 	select BR2_ARCH_IS_64
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Aarch64 is a 64-bit architecture developed by ARM Holdings.
 	  http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
 	  http://en.wikipedia.org/wiki/ARM
 
+config BR2_csky
+	bool "csky"
+	select BR2_ARCH_HAS_MMU_MANDATORY
+	# Most variants are supported by gcc-9+, except one that is
+	# handled as a special exception in package/gcc/Config.in.host
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
+	help
+	  csky is processor IP from china.
+	  http://www.c-sky.com/
+	  http://www.github.com/c-sky
+
 config BR2_i386
 	bool "i386"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Intel i386 architecture compatible microprocessor
 	  http://en.wikipedia.org/wiki/I386
@@ -86,7 +102,7 @@ config BR2_m68k
 
 config BR2_microblazeel
 	bool "Microblaze AXI (little endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Soft processor core designed for Xilinx FPGAs from Xilinx. AXI
 	  bus based architecture (little endian)
@@ -95,7 +111,7 @@ config BR2_microblazeel
 
 config BR2_microblazebe
 	bool "Microblaze non-AXI (big endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Soft processor core designed for Xilinx FPGAs from Xilinx. PLB
 	  bus based architecture (non-AXI, big endian)
@@ -104,7 +120,7 @@ config BR2_microblazebe
 
 config BR2_mips
 	bool "MIPS (big endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  MIPS is a RISC microprocessor from MIPS Technologies. Big
 	  endian.
@@ -113,7 +129,7 @@ config BR2_mips
 
 config BR2_mipsel
 	bool "MIPS (little endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  MIPS is a RISC microprocessor from MIPS Technologies. Little
 	  endian.
@@ -123,7 +139,7 @@ config BR2_mipsel
 config BR2_mips64
 	bool "MIPS64 (big endian)"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  MIPS is a RISC microprocessor from MIPS Technologies. Big
 	  endian.
@@ -133,16 +149,24 @@ config BR2_mips64
 config BR2_mips64el
 	bool "MIPS64 (little endian)"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  MIPS is a RISC microprocessor from MIPS Technologies. Little
 	  endian.
 	  http://www.mips.com/
 	  http://en.wikipedia.org/wiki/MIPS_Technologies
 
+config BR2_nds32
+	bool "nds32"
+	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
+	select BR2_ARCH_HAS_MMU_MANDATORY
+	help
+	  nds32 is a 32-bit architecture developed by Andes Technology.
+	  https://en.wikipedia.org/wiki/Andes_Technology
+
 config BR2_nios2
 	bool "Nios II"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Nios II is a soft core processor from Altera Corporation.
 	  http://www.altera.com/
@@ -150,14 +174,14 @@ config BR2_nios2
 
 config BR2_or1k
 	bool "OpenRISC"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  OpenRISC is a free and open processor for embedded system.
 	  http://openrisc.io
 
 config BR2_powerpc
 	bool "PowerPC"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  PowerPC is a RISC architecture created by Apple-IBM-Motorola
 	  alliance. Big endian.
@@ -167,7 +191,7 @@ config BR2_powerpc
 config BR2_powerpc64
 	bool "PowerPC64 (big endian)"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  PowerPC is a RISC architecture created by Apple-IBM-Motorola
 	  alliance. Big endian.
@@ -177,7 +201,7 @@ config BR2_powerpc64
 config BR2_powerpc64le
 	bool "PowerPC64 (little endian)"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  PowerPC is a RISC architecture created by Apple-IBM-Motorola
 	  alliance. Little endian.
@@ -186,6 +210,7 @@ config BR2_powerpc64le
 
 config BR2_riscv
 	bool "RISCV"
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	help
 	  RISC-V is an open, free Instruction Set Architecture created
@@ -197,7 +222,7 @@ config BR2_riscv
 config BR2_s390x
 	bool "s390x"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  s390x is a big-endian architecture made by IBM.
 	  http://www.ibm.com/
@@ -205,7 +230,7 @@ config BR2_s390x
 
 config BR2_sh
 	bool "SuperH"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	help
 	  SuperH (or SH) is a 32-bit reduced instruction set computer
 	  (RISC) instruction set architecture (ISA) developed by
@@ -215,7 +240,7 @@ config BR2_sh
 
 config BR2_sparc
 	bool "SPARC"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  SPARC (from Scalable Processor Architecture) is a RISC
 	  instruction set architecture (ISA) developed by Sun
@@ -226,7 +251,7 @@ config BR2_sparc
 config BR2_sparc64
 	bool "SPARC64"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  SPARC (from Scalable Processor Architecture) is a RISC
 	  instruction set architecture (ISA) developed by Sun
@@ -237,7 +262,7 @@ config BR2_sparc64
 config BR2_x86_64
 	bool "x86_64"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  x86-64 is an extension of the x86 instruction set (Intel i386
 	  architecture compatible microprocessor).
@@ -296,22 +321,11 @@ config BR2_ARCH_NEEDS_GCC_AT_LEAST_10
 	bool
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
 
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_10
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_12
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-
 # The following string values are defined by the individual
 # Config.in.$ARCH files
 config BR2_ARCH
 	string
 
-config BR2_NORMALIZED_ARCH
-	string
-
 config BR2_ENDIAN
 	string
 
@@ -358,62 +372,6 @@ config BR2_BINFMT_SUPPORTS_SHARED
 config BR2_READELF_ARCH_NAME
 	string
 
-if BR2_arcle || BR2_arceb
-source "arch/Config.in.arc"
-endif
-
-if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
-source "arch/Config.in.arm"
-endif
-
-if BR2_m68k
-source "arch/Config.in.m68k"
-endif
-
-if BR2_microblazeel || BR2_microblazebe
-source "arch/Config.in.microblaze"
-endif
-
-if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
-source "arch/Config.in.mips"
-endif
-
-if BR2_nios2
-source "arch/Config.in.nios2"
-endif
-
-if BR2_or1k
-source "arch/Config.in.or1k"
-endif
-
-if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
-source "arch/Config.in.powerpc"
-endif
-
-if BR2_riscv
-source "arch/Config.in.riscv"
-endif
-
-if BR2_s390x
-source "arch/Config.in.s390x"
-endif
-
-if BR2_sh
-source "arch/Config.in.sh"
-endif
-
-if BR2_sparc || BR2_sparc64
-source "arch/Config.in.sparc"
-endif
-
-if BR2_i386 || BR2_x86_64
-source "arch/Config.in.x86"
-endif
-
-if BR2_xtensa
-source "arch/Config.in.xtensa"
-endif
-
 # Set up target binary format
 choice
 	prompt "Target Binary Format"
@@ -464,4 +422,68 @@ config BR2_BINFMT_FLAT_SHARED
 
 endchoice
 
+if BR2_arcle || BR2_arceb
+source "arch/Config.in.arc"
+endif
+
+if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
+source "arch/Config.in.arm"
+endif
+
+if BR2_csky
+source "arch/Config.in.csky"
+endif
+
+if BR2_m68k
+source "arch/Config.in.m68k"
+endif
+
+if BR2_microblazeel || BR2_microblazebe
+source "arch/Config.in.microblaze"
+endif
+
+if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
+source "arch/Config.in.mips"
+endif
+
+if BR2_nds32
+source "arch/Config.in.nds32"
+endif
+
+if BR2_nios2
+source "arch/Config.in.nios2"
+endif
+
+if BR2_or1k
+source "arch/Config.in.or1k"
+endif
+
+if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
+source "arch/Config.in.powerpc"
+endif
+
+if BR2_riscv
+source "arch/Config.in.riscv"
+endif
+
+if BR2_s390x
+source "arch/Config.in.s390x"
+endif
+
+if BR2_sh
+source "arch/Config.in.sh"
+endif
+
+if BR2_sparc || BR2_sparc64
+source "arch/Config.in.sparc"
+endif
+
+if BR2_i386 || BR2_x86_64
+source "arch/Config.in.x86"
+endif
+
+if BR2_xtensa
+source "arch/Config.in.xtensa"
+endif
+
 endmenu # Target options

arch/Config.in.arc

@@ -39,14 +39,9 @@ config BR2_archs38_full
 
 config BR2_archs4x_rel31
 	bool "ARC HS48 rel 31"
-	help
-	   Build for HS48 release 3.1
-
-config BR2_archs4x
-	bool "ARC HS48"
 	help
 	   Latest release of HS48 processor
-	   - Dual and Quad multiply and MAC operations
+	   - Dual- and quad multiply and MC oprations
 	   - Double-precision FPU
 
 endchoice
@@ -54,17 +49,12 @@ endchoice
 # Choice of atomic instructions presence
 config BR2_ARC_ATOMIC_EXT
 	bool "Atomic extension (LLOCK/SCOND instructions)"
-	default y if BR2_arc770d
-	default y if BR2_archs38 || BR2_archs38_64mpy || BR2_archs38_full
-	default y if BR2_archs4x_rel31 || BR2_archs4x
+	default y if BR2_arc770d || BR2_archs38 || BR2_archs38_64mpy || BR2_archs38_full || BR2_archs4x_rel31
 
 config BR2_ARCH
 	default "arc"	if BR2_arcle
 	default "arceb"	if BR2_arceb
 
-config BR2_NORMALIZED_ARCH
-	default "arc"
-
 config BR2_arc
 	bool
 	default y if BR2_arcle || BR2_arceb
@@ -80,12 +70,10 @@ config BR2_GCC_TARGET_CPU
 	default "hs38"	 if BR2_archs38_64mpy
 	default "hs38_linux"	 if BR2_archs38_full
 	default "hs4x_rel31"	 if BR2_archs4x_rel31
-	default "hs4x"	 if BR2_archs4x
 
 config BR2_READELF_ARCH_NAME
 	default "ARCompact"	if BR2_arc750d || BR2_arc770d
-	default "ARCv2"		if BR2_archs38 || BR2_archs38_64mpy || BR2_archs38_full
-	default "ARCv2"		if BR2_archs4x_rel31 || BR2_archs4x
+	default "ARCv2"		if BR2_archs38 || BR2_archs38_64mpy || BR2_archs38_full || BR2_archs4x_rel31
 
 choice
 	prompt "MMU Page Size"
@@ -105,7 +93,7 @@ choice
 
 config BR2_ARC_PAGE_SIZE_4K
 	bool "4KB"
-	depends on !BR2_arc750d
+	depends on BR2_arc770d || BR2_archs38 || BR2_archs38_64mpy || BR2_archs38_full || BR2_archs4x_rel31
 
 config BR2_ARC_PAGE_SIZE_8K
 	bool "8KB"
@@ -115,7 +103,7 @@ config BR2_ARC_PAGE_SIZE_8K
 
 config BR2_ARC_PAGE_SIZE_16K
 	bool "16KB"
-	depends on !BR2_arc750d
+	depends on BR2_arc770d || BR2_archs38 || BR2_archs38_64mpy || BR2_archs38_full || BR2_archs4x_rel31
 
 endchoice
 

arch/Config.in.arm

@@ -73,26 +73,21 @@ config BR2_ARM_CPU_HAS_THUMB2
 
 config BR2_ARM_CPU_ARMV4
 	bool
-	select BR2_USE_MMU
 
 config BR2_ARM_CPU_ARMV5
 	bool
-	select BR2_USE_MMU
 
 config BR2_ARM_CPU_ARMV6
 	bool
-	select BR2_USE_MMU
 
 config BR2_ARM_CPU_ARMV7A
 	bool
-	select BR2_USE_MMU
 
 config BR2_ARM_CPU_ARMV7M
 	bool
 
 config BR2_ARM_CPU_ARMV8A
 	bool
-	select BR2_USE_MMU
 
 choice
 	prompt "Target Architecture Variant"
@@ -108,19 +103,23 @@ config BR2_arm920t
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm922t
 	bool "arm922t"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_fa526
 	bool "fa526/626"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_strongarm
 	bool "strongarm sa110/sa1100"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 
 comment "armv5 cores"
 config BR2_arm926t
@@ -129,11 +128,18 @@ config BR2_arm926t
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV5
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_iwmmxt
+	bool "iwmmxt"
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_ARMV5
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_xscale
 	bool "xscale"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV5
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 
 comment "armv6 cores"
 config BR2_arm1136j_s
@@ -141,29 +147,34 @@ config BR2_arm1136j_s
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm1136jf_s
 	bool "arm1136jf-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm1176jz_s
 	bool "arm1176jz-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm1176jzf_s
 	bool "arm1176jzf-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm11mpcore
 	bool "mpcore"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 
 comment "armv7a cores"
 config BR2_cortex_a5
@@ -173,6 +184,7 @@ config BR2_cortex_a5
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a7
 	bool "cortex-A7"
 	select BR2_ARM_CPU_HAS_ARM
@@ -180,6 +192,7 @@ config BR2_cortex_a7
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a8
 	bool "cortex-A8"
 	select BR2_ARM_CPU_HAS_ARM
@@ -187,6 +200,7 @@ config BR2_cortex_a8
 	select BR2_ARM_CPU_HAS_VFPV3
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a9
 	bool "cortex-A9"
 	select BR2_ARM_CPU_HAS_ARM
@@ -194,6 +208,7 @@ config BR2_cortex_a9
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV3
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a12
 	bool "cortex-A12"
 	select BR2_ARM_CPU_HAS_ARM
@@ -201,6 +216,7 @@ config BR2_cortex_a12
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a15
 	bool "cortex-A15"
 	select BR2_ARM_CPU_HAS_ARM
@@ -208,6 +224,7 @@ config BR2_cortex_a15
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a15_a7
 	bool "cortex-A15/A7 big.LITTLE"
 	select BR2_ARM_CPU_HAS_ARM
@@ -215,6 +232,7 @@ config BR2_cortex_a15_a7
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_cortex_a17
 	bool "cortex-A17"
@@ -223,6 +241,7 @@ config BR2_cortex_a17
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_cortex_a17_a7
 	bool "cortex-A17/A7 big.LITTLE"
@@ -231,15 +250,15 @@ config BR2_cortex_a17_a7
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_pj4
 	bool "pj4"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV3
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 
-# Cortex-M cores are only supported for little endian configurations
-if BR2_arm
 comment "armv7m cores"
 config BR2_cortex_m3
 	bool "cortex-M3"
@@ -256,7 +275,6 @@ config BR2_cortex_m7
 	select BR2_ARM_CPU_MAYBE_HAS_FPV5
 	select BR2_ARM_CPU_ARMV7M
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-endif # BR2_arm
 endif # !BR2_ARCH_IS_64
 
 comment "armv8 cores"
@@ -268,6 +286,7 @@ config BR2_cortex_a32
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_cortex_a35
 	bool "cortex-A35"
@@ -276,6 +295,7 @@ config BR2_cortex_a35
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_cortex_a53
 	bool "cortex-A53"
@@ -284,6 +304,7 @@ config BR2_cortex_a53
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a57
 	bool "cortex-A57"
 	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
@@ -291,6 +312,7 @@ config BR2_cortex_a57
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a57_a53
 	bool "cortex-A57/A53 big.LITTLE"
 	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
@@ -298,6 +320,7 @@ config BR2_cortex_a57_a53
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_cortex_a72
 	bool "cortex-A72"
@@ -306,6 +329,7 @@ config BR2_cortex_a72
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_cortex_a72_a53
 	bool "cortex-A72/A53 big.LITTLE"
@@ -314,6 +338,7 @@ config BR2_cortex_a72_a53
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_cortex_a73
 	bool "cortex-A73"
@@ -322,6 +347,7 @@ config BR2_cortex_a73
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_cortex_a73_a35
 	bool "cortex-A73/A35 big.LITTLE"
@@ -330,6 +356,7 @@ config BR2_cortex_a73_a35
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_cortex_a73_a53
 	bool "cortex-A73/A53 big.LITTLE"
@@ -338,12 +365,14 @@ config BR2_cortex_a73_a53
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_emag
 	bool "emag"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
 config BR2_exynos_m1
 	bool "exynos-m1"
@@ -352,54 +381,63 @@ config BR2_exynos_m1
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_falkor
 	bool "falkor"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_phecda
 	bool "phecda"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
 config BR2_qdf24xx
 	bool "qdf24xx"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_thunderx
 	bool "thunderx (aka octeontx)"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_thunderxt81
 	bool "thunderxt81 (aka octeontx81)"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_thunderxt83
 	bool "thunderxt83 (aka octeontx83)"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_thunderxt88
 	bool "thunderxt88"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_thunderxt88p1
 	bool "thunderxt88p1"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_xgene1
 	bool "xgene1"
@@ -408,6 +446,7 @@ config BR2_xgene1
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 
 comment "armv8.1a cores"
@@ -416,18 +455,21 @@ config BR2_thunderx2t99
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_thunderx2t99p1
 	bool "thunderx2t99p1"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_vulcan
 	bool "vulcan"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 
 comment "armv8.2a cores"
@@ -436,18 +478,21 @@ config BR2_cortex_a55
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
 config BR2_cortex_a75
 	bool "cortex-A75"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
 config BR2_cortex_a75_a55
 	bool "cortex-A75/A55 big.LITTLE"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
 config BR2_cortex_a76
 	bool "cortex-A76"
@@ -456,6 +501,7 @@ config BR2_cortex_a76
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
 config BR2_cortex_a76_a55
 	bool "cortex-A76/A55 big.LITTLE"
@@ -464,6 +510,7 @@ config BR2_cortex_a76_a55
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
 config BR2_neoverse_n1
 	bool "neoverse-N1 (aka ares)"
@@ -472,12 +519,14 @@ config BR2_neoverse_n1
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
 config BR2_tsv110
 	bool "tsv110"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
 
 comment "armv8.4a cores"
@@ -486,6 +535,7 @@ config BR2_saphira
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
 endchoice
 
@@ -766,41 +816,12 @@ config BR2_ARM_INSTRUCTIONS_THUMB2
 
 endchoice
 
-choice
-	prompt "MMU Page Size"
-	default BR2_ARM64_PAGE_SIZE_4K
-	depends on BR2_aarch64 || BR2_aarch64_be
-	help
-	  The default is 4KB, and you should probably keep this unless
-	  you know what you are doing. In particular, the kernel
-	  configuration must match this choice. If your kernel is
-	  built by Buildroot, the kernel configuration is
-	  automatically adjusted, but not if you built your kernel
-	  outside of Buildroot.
-
-config BR2_ARM64_PAGE_SIZE_4K
-	bool "4KB"
-
-config BR2_ARM64_PAGE_SIZE_64K
-	bool "64KB"
-
-endchoice
-
-config BR2_ARM64_PAGE_SIZE
-	string
-	default "4K" if BR2_ARM64_PAGE_SIZE_4K
-	default "64K" if BR2_ARM64_PAGE_SIZE_64K
-
 config BR2_ARCH
 	default "arm"		if BR2_arm
 	default "armeb"		if BR2_armeb
 	default "aarch64"	if BR2_aarch64
 	default "aarch64_be"	if BR2_aarch64_be
 
-config BR2_NORMALIZED_ARCH
-	default "arm"		if BR2_arm || BR2_armeb
-	default "arm64"		if BR2_aarch64 || BR2_aarch64_be
-
 config BR2_ENDIAN
 	default "LITTLE" if (BR2_arm || BR2_aarch64)
 	default "BIG"	 if (BR2_armeb || BR2_aarch64_be)
@@ -813,6 +834,7 @@ config BR2_GCC_TARGET_CPU
 	default "strongarm"	if BR2_strongarm
 	# armv5
 	default "arm926ej-s"	if BR2_arm926t
+	default "iwmmxt"	if BR2_iwmmxt
 	default "xscale"	if BR2_xscale
 	# armv6
 	default "arm1136j-s"	if BR2_arm1136j_s

arch/Config.in.csky

@@ -0,0 +1,49 @@
+choice
+	prompt "Target Architecture Variant"
+	default BR2_ck610
+	help
+	  Specific CPU variant to use
+
+config BR2_ck610
+	# Not supported by upstream gcc <= 9, and handled as a special
+	# exception in package/gcc/Config.in.host
+	bool "ck610"
+
+config BR2_ck807
+	bool "ck807"
+
+config BR2_ck810
+	bool "ck810"
+
+config BR2_ck860
+	bool "ck860"
+
+endchoice
+
+config BR2_CSKY_FPU
+	bool "Enable FPU coprocessor"
+	depends on BR2_ck810 || BR2_ck807 || BR2_ck860
+	help
+	  You can say N here if your C-SKY CPU doesn't have a
+	  Floating-Point Coprocessor or if you don't need FPU support
+	  for your user-space programs.
+
+config BR2_CSKY_VDSP
+	bool "Enable VDSP enhanced instructions Co-processor"
+	depends on BR2_CSKY_FPU
+
+config BR2_GCC_TARGET_FLOAT_ABI
+	default "soft"		if !BR2_CSKY_FPU
+	default "hard"		if BR2_CSKY_FPU
+
+config BR2_ARCH
+	default "csky"
+
+config BR2_ENDIAN
+	default "LITTLE"
+
+config BR2_READELF_ARCH_NAME
+	default "CSKY"
+
+# vim: ft=kconfig
+# -*- mode:kconfig; -*-

arch/Config.in.m68k

@@ -1,9 +1,6 @@
 config BR2_ARCH
 	default "m68k"		if BR2_m68k
 
-config BR2_NORMALIZED_ARCH
-	default "m68k"
-
 config BR2_ENDIAN
 	default "BIG"
 
@@ -26,7 +23,7 @@ choice
 config BR2_m68k_68040
 	bool "68040"
 	select BR2_m68k_m68k
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 
 config BR2_m68k_cf5208
 	bool "5208"

arch/Config.in.microblaze

@@ -2,9 +2,6 @@ config BR2_ARCH
 	default "microblazeel"  if BR2_microblazeel
 	default "microblaze"    if BR2_microblazebe
 
-config BR2_NORMALIZED_ARCH
-	default "microblaze"
-
 config BR2_ENDIAN
 	default "LITTLE" if BR2_microblazeel
 	default "BIG"	 if BR2_microblazebe

arch/Config.in.mips

@@ -235,9 +235,6 @@ config BR2_ARCH
 	default "mips64"	if BR2_mips64
 	default "mips64el"	if BR2_mips64el
 
-config BR2_NORMALIZED_ARCH
-	default "mips"
-
 config BR2_ENDIAN
 	default "LITTLE"	if BR2_mipsel || BR2_mips64el
 	default "BIG"		if BR2_mips || BR2_mips64

arch/Config.in.nds32

@@ -0,0 +1,14 @@
+config BR2_ARCH
+	default "nds32le"
+
+config BR2_GCC_TARGET_ARCH
+	default "v3"
+
+config BR2_ENDIAN
+	default "LITTLE"
+
+config BR2_READELF_ARCH_NAME
+	default "Andes Technology compact code size embedded RISC processor family"
+
+# vim: ft=kconfig
+# -*- mode:kconfig; -*-

arch/Config.in.nios2

@@ -1,9 +1,6 @@
 config BR2_ARCH
 	default "nios2"
 
-config BR2_NORMALIZED_ARCH
-	default "nios2"
-
 config BR2_ENDIAN
 	default "LITTLE"
 

arch/Config.in.or1k

@@ -1,9 +1,6 @@
 config BR2_ARCH
 	default "or1k"
 
-config BR2_NORMALIZED_ARCH
-	default "openrisc"
-
 config BR2_ENDIAN
 	default "BIG"
 

arch/Config.in.powerpc

@@ -1,10 +1,6 @@
 config BR2_POWERPC_CPU_HAS_ALTIVEC
 	bool
 
-config BR2_POWERPC_CPU_HAS_VSX
-	bool
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-
 config BR2_POWERPC_CPU_HAS_SPE
 	bool
 
@@ -15,135 +11,124 @@ choice
 	  Specific CPU variant to use
 config BR2_generic_powerpc
 	bool "generic"
-	# No C library supports this variant on ppc64le
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_401
 	bool "401"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_403
 	bool "403"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_405
 	bool "405"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_405fp
 	bool "405 with FPU"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_440
 	bool "440"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_440fp
 	bool "440 with FPU"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_464
 	bool "464"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_464fp
 	bool "464 with FPU"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_476
 	bool "476"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_476fp
 	bool "476 with FPU"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_505
 	bool "505"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
+config BR2_powerpc_601
+	bool "601"
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_602
 	bool "602"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_603
 	bool "603"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_603e
 	bool "603e"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_604
 	bool "604"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_604e
 	bool "604e"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_620
 	bool "620"
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_630
 	bool "630"
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_740
 	bool "740"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_7400
 	bool "7400"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_7450
 	bool "7450"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_750
 	bool "750"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_821
 	bool "821"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_823
 	bool "823"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_860
 	bool "860"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_970
 	bool "970"
-	depends on BR2_powerpc || BR2_powerpc64
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_8540
 	bool "8540 / e500v1"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 	select BR2_POWERPC_CPU_HAS_SPE
 config BR2_powerpc_8548
 	bool "8548 / e500v2"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 	select BR2_POWERPC_CPU_HAS_SPE
 config BR2_powerpc_e300c2
 	bool "e300c2"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_e300c3
 	bool "e300c3"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_e500mc
 	bool "e500mc"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_e5500
 	bool "e5500"
-	depends on BR2_powerpc || BR2_powerpc64
+	depends on !BR2_powerpc64le
 config BR2_powerpc_e6500
 	bool "e6500"
-	depends on BR2_powerpc || BR2_powerpc64
+	depends on !BR2_powerpc64le
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_power4
 	bool "power4"
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_power5
 	bool "power5"
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_power6
 	bool "power6"
-	depends on BR2_powerpc || BR2_powerpc64
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_power7
 	bool "power7"
-	depends on BR2_powerpc || BR2_powerpc64
-	select BR2_POWERPC_CPU_HAS_VSX
+	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_power8
 	bool "power8"
-	select BR2_POWERPC_CPU_HAS_VSX
-config BR2_powerpc_power9
-	bool "power9"
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
-	select BR2_POWERPC_CPU_HAS_VSX
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 endchoice
 
 choice
@@ -175,9 +160,6 @@ config BR2_ARCH
 	default "powerpc64"	if BR2_powerpc64
 	default "powerpc64le"	if BR2_powerpc64le
 
-config BR2_NORMALIZED_ARCH
-	default "powerpc"
-
 config BR2_ENDIAN
 	default "BIG"    if BR2_powerpc || BR2_powerpc64
 	default "LITTLE" if BR2_powerpc64le
@@ -194,6 +176,7 @@ config BR2_GCC_TARGET_CPU
 	default "476"		if BR2_powerpc_476
 	default "476fp"		if BR2_powerpc_476fp
 	default "505"		if BR2_powerpc_505
+	default "601"		if BR2_powerpc_601
 	default "602"		if BR2_powerpc_602
 	default "603"		if BR2_powerpc_603
 	default "603e"		if BR2_powerpc_603e
@@ -221,7 +204,6 @@ config BR2_GCC_TARGET_CPU
 	default "power6"	if BR2_powerpc_power6
 	default "power7"	if BR2_powerpc_power7
 	default "power8"	if BR2_powerpc_power8
-	default "power9"	if BR2_powerpc_power9
 
 config BR2_READELF_ARCH_NAME
 	default "PowerPC"	if BR2_powerpc

arch/Config.in.riscv

@@ -71,7 +71,6 @@ choice
 
 config BR2_RISCV_32
 	bool "32-bit"
-	select BR2_USE_MMU
 
 config BR2_RISCV_64
 	bool "64-bit"
@@ -79,15 +78,6 @@ config BR2_RISCV_64
 
 endchoice
 
-config BR2_RISCV_USE_MMU
-	bool "MMU support"
-	default y
-	depends on BR2_RISCV_64
-	select BR2_USE_MMU
-	help
-	  Enable this option if your RISC-V core has a MMU (Memory
-	  Management Unit).
-
 choice
 	prompt "Target ABI"
 	default BR2_RISCV_ABI_ILP32D if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
@@ -116,7 +106,6 @@ config BR2_RISCV_ABI_LP64
 config BR2_RISCV_ABI_LP64F
 	bool "lp64f"
 	depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
-	depends on BR2_USE_MMU
 
 config BR2_RISCV_ABI_LP64D
 	bool "lp64d"
@@ -127,9 +116,6 @@ config BR2_ARCH
 	default "riscv32" if !BR2_ARCH_IS_64
 	default "riscv64" if BR2_ARCH_IS_64
 
-config BR2_NORMALIZED_ARCH
-	default "riscv"
-
 config BR2_ENDIAN
 	default "LITTLE"
 

arch/Config.in.s390x

@@ -17,9 +17,6 @@ endchoice
 config BR2_ARCH
 	default "s390x"	if BR2_s390x
 
-config BR2_NORMALIZED_ARCH
-	default "s390"
-
 config BR2_ENDIAN
 	default "BIG"
 

arch/Config.in.sh

@@ -5,6 +5,8 @@ choice
 	help
 	  Specific CPU variant to use
 
+config BR2_sh2a
+	bool "sh2a (SH2A big endian)"
 config BR2_sh4
 	bool "sh4 (SH4 little endian)"
 config BR2_sh4eb
@@ -16,17 +18,15 @@ config BR2_sh4aeb
 endchoice
 
 config BR2_ARCH
+	default "sh2a"		if BR2_sh2a
 	default "sh4"		if BR2_sh4
 	default "sh4eb"		if BR2_sh4eb
 	default "sh4a"		if BR2_sh4a
 	default "sh4aeb"	if BR2_sh4aeb
 
-config BR2_NORMALIZED_ARCH
-	default "sh"
-
 config BR2_ENDIAN
 	default "LITTLE"	if BR2_sh4 || BR2_sh4a
-	default "BIG"		if BR2_sh4eb || BR2_sh4aeb
+	default "BIG"		if BR2_sh2a || BR2_sh4eb || BR2_sh4aeb
 
 config BR2_READELF_ARCH_NAME
 	default "Renesas / SuperH SH"

arch/Config.in.sparc

@@ -21,10 +21,6 @@ config BR2_ARCH
 	default "sparc"	if BR2_sparc
 	default "sparc64" if BR2_sparc64
 
-config BR2_NORMALIZED_ARCH
-	default "sparc"	if BR2_sparc
-	default "sparc64" if BR2_sparc64
-
 config BR2_ENDIAN
 	default "BIG"
 

arch/Config.in.x86

@@ -19,12 +19,7 @@ config BR2_X86_CPU_HAS_AVX
 	bool
 config BR2_X86_CPU_HAS_AVX2
 	bool
-config BR2_X86_CPU_HAS_AVX512
-	bool
 
-# This list of CPU architecture variant is (loosely) ordered according
-# to the gcc documentation at
-# https://gcc.gnu.org/onlinedocs/gcc-11.2.0/gcc/x86-Options.html
 choice
 	prompt "Target Architecture Variant"
 	default BR2_x86_i586 if BR2_i386
@@ -86,78 +81,6 @@ config BR2_x86_prescott
 	select BR2_X86_CPU_HAS_SSE
 	select BR2_X86_CPU_HAS_SSE2
 	select BR2_X86_CPU_HAS_SSE3
-config BR2_x86_x86_64
-	bool "x86-64"
-	depends on BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	help
-	  This option corresponds to -march=x86-64, documented as a
-	  "Generic CPU with 64-bit extensions" by the GCC
-	  documentation. It is a 64-bit CPU with MMX, SSE and SSE2
-	  support.
-config BR2_x86_x86_64_v2
-	bool "x86-64-v2"
-	depends on BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	help
-	  This option corresponds to the x86-64-v2 micro-architecture
-	  level, as defined by the x86-64 psABI document, see
-	  https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
-
-	  It is close to the Nehalem CPU architecture, and is
-	  applicable for CPUs that support CMPXCHG16B, LAHF-SAHF,
-	  POPCNT, SSE3, SSE4.1, SSE4.2, SSSE3.
-config BR2_x86_x86_64_v3
-	bool "x86-64-v3"
-	depends on BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	help
-	  This option corresponds to the x86-64-v3 micro-architecture
-	  level, as defined by the x86-64 psABI document, see
-	  https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
-
-	  It is close to the Haswell CPU architecture, and is
-	  applicable for CPUs that support all of x86-64-v2 plus AVX,
-	  AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE.
-config BR2_x86_x86_64_v4
-	bool "x86-64-v4"
-	depends on BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	help
-	  This option corresponds to the x86-64-v4 micro-architecture
-	  level, as defined by the x86-64 psABI document, see
-	  https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
-
-	  It is applicable for CPUs that support all of x86-64-v3 plus
-	  AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL.
 config BR2_x86_nocona
 	bool "nocona"
 	select BR2_X86_CPU_HAS_MMX
@@ -180,19 +103,6 @@ config BR2_x86_corei7
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
-	help
-	  This option is deprecated. Since gcc 4.9, the gcc option
-	  "nehalem" is preferred. Use BR2_x86_nehalem instead.
-config BR2_x86_nehalem
-	bool "nehalem"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_x86_westmere
 	bool "westmere"
 	select BR2_X86_CPU_HAS_MMX
@@ -202,7 +112,6 @@ config BR2_x86_westmere
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_x86_corei7_avx
 	bool "corei7-avx"
 	select BR2_X86_CPU_HAS_MMX
@@ -213,20 +122,6 @@ config BR2_x86_corei7_avx
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
 	select BR2_X86_CPU_HAS_AVX
-	help
-	  This option is deprecated. Since gcc 4.9, the gcc option
-	  "sandybridge" is preferred. Use BR2_x86_sandybridge instead.
-config BR2_x86_sandybridge
-	bool "sandybridge"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_x86_core_avx2
 	bool "core-avx2"
 	select BR2_X86_CPU_HAS_MMX
@@ -238,45 +133,6 @@ config BR2_x86_core_avx2
 	select BR2_X86_CPU_HAS_SSE42
 	select BR2_X86_CPU_HAS_AVX
 	select BR2_X86_CPU_HAS_AVX2
-	help
-	  This option is deprecated. Since gcc 4.9, the gcc option
-	  "haswell" is preferred. Use BR2_x86_haswell instead.
-config BR2_x86_haswell
-	bool "haswell"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_broadwell
-	bool "broadwell"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_skylake
-	bool "skylake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_x86_atom
 	bool "atom"
 	select BR2_X86_CPU_HAS_MMX
@@ -284,17 +140,6 @@ config BR2_x86_atom
 	select BR2_X86_CPU_HAS_SSE2
 	select BR2_X86_CPU_HAS_SSE3
 	select BR2_X86_CPU_HAS_SSSE3
-	help
-	  This option is deprecated. Since gcc 4.9, the gcc option
-	  "bonnell" is preferred. Use BR2_x86_bonnell instead.
-config BR2_x86_bonnell
-	bool "bonnell"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_x86_silvermont
 	bool "silvermont"
 	select BR2_X86_CPU_HAS_MMX
@@ -304,167 +149,6 @@ config BR2_x86_silvermont
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_goldmont
-	bool "goldmont"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_goldmont_plus
-	bool "goldmont-plus"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_tremont
-	bool "tremont"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_skylake_avx512
-	bool "skylake-avx512"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_x86_cannonlake
-	bool "cannonlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-config BR2_x86_icelake_client
-	bool "icelake-client"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-config BR2_x86_icelake_server
-	bool "icelake-server"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-config BR2_x86_cascadelake
-	bool "cascadelake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_cooperlake
-	bool "cooperlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_10
-config BR2_x86_tigerlake
-	bool "tigerlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_sapphirerapids
-	bool "sapphirerapids"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-config BR2_x86_alderlake
-	bool "alderlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-config BR2_x86_rocketlake
-	bool "rocketlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
 config BR2_x86_k6
 	bool "k6"
 	depends on !BR2_x86_64
@@ -556,16 +240,30 @@ config BR2_ARCH
 	default "i686"		if BR2_x86_c32
 	default "i586"		if BR2_x86_winchip_c6
 	default "i586"		if BR2_x86_winchip2
-	# We use the property of Kconfig that the first match of a
-	# list of default will be chosen. So the following entry will
-	# not match for all BR2_i386=y configurations, but only the
-	# ones that didn't match any of the previous cases (i486,
-	# i586).
-	default "i686"		if BR2_i386
-	default "x86_64"	if BR2_x86_64
-
-config BR2_NORMALIZED_ARCH
-	default "i386"		if !BR2_x86_64
+	default "i686"		if BR2_x86_i686
+	default "i686"		if BR2_x86_pentium2
+	default "i686"		if BR2_x86_pentium3
+	default "i686"		if BR2_x86_pentium4
+	default "i686"		if BR2_x86_pentium_m
+	default "i686"		if BR2_x86_pentiumpro
+	default "i686"		if BR2_x86_prescott
+	default "i686"		if BR2_x86_nocona && BR2_i386
+	default "i686"		if BR2_x86_core2 && BR2_i386
+	default "i686"		if BR2_x86_corei7 && BR2_i386
+	default "i686"		if BR2_x86_westmere && BR2_i386
+	default "i686"		if BR2_x86_corei7_avx && BR2_i386
+	default "i686"		if BR2_x86_core_avx2 && BR2_i386
+	default "i686"		if BR2_x86_atom && BR2_i386
+	default "i686"		if BR2_x86_silvermont && BR2_i386
+	default "i686"		if BR2_x86_opteron && BR2_i386
+	default "i686"		if BR2_x86_opteron_sse3 && BR2_i386
+	default "i686"		if BR2_x86_barcelona && BR2_i386
+	default "i686"		if BR2_x86_jaguar && BR2_i386
+	default "i686"		if BR2_x86_steamroller && BR2_i386
+	default "i686"		if BR2_x86_k6
+	default "i686"		if BR2_x86_k6_2
+	default "i686"		if BR2_x86_athlon
+	default "i686"		if BR2_x86_athlon_4
 	default "x86_64"	if BR2_x86_64
 
 config BR2_ENDIAN
@@ -583,37 +281,14 @@ config BR2_GCC_TARGET_ARCH
 	default "pentium3"	if BR2_x86_pentium3
 	default "pentium4"	if BR2_x86_pentium4
 	default "prescott"	if BR2_x86_prescott
-	default "x86-64"	if BR2_x86_x86_64
-	default "x86-64-v2"	if BR2_x86_x86_64_v2
-	default "x86-64-v3"	if BR2_x86_x86_64_v3
-	default "x86-64-v4"	if BR2_x86_x86_64_v4
 	default "nocona"	if BR2_x86_nocona
 	default "core2"		if BR2_x86_core2
 	default "corei7"	if BR2_x86_corei7
-	default "nehalem"	if BR2_x86_nehalem
 	default "corei7-avx"	if BR2_x86_corei7_avx
-	default "sandybridge"	if BR2_x86_sandybridge
 	default "core-avx2"	if BR2_x86_core_avx2
-	default "haswell"	if BR2_x86_haswell
-	default "broadwell"	if BR2_x86_broadwell
-	default "skylake"	if BR2_x86_skylake
 	default "atom"		if BR2_x86_atom
-	default "bonnell"	if BR2_x86_bonnell
 	default "westmere"	if BR2_x86_westmere
 	default "silvermont"	if BR2_x86_silvermont
-	default "goldmont"	if BR2_x86_goldmont
-	default "goldmont-plus"	if BR2_x86_goldmont_plus
-	default "tremont"	if BR2_x86_tremont
-	default "skylake-avx512" if BR2_x86_skylake_avx512
-	default "cannonlake"	if BR2_x86_cannonlake
-	default "icelake-client" if BR2_x86_icelake_client
-	default "icelake-server" if BR2_x86_icelake_server
-	default "cascadelake"	if BR2_x86_cascadelake
-	default "cooperlake"	if BR2_x86_cooperlake
-	default "tigerlake"	if BR2_x86_tigerlake
-	default "sapphirerapids" if BR2_x86_sapphirerapids
-	default "alderlake"	if BR2_x86_alderlake
-	default "rocketlake"	if BR2_x86_rocketlake
 	default "k8"		if BR2_x86_opteron
 	default "k8-sse3"	if BR2_x86_opteron_sse3
 	default "barcelona"	if BR2_x86_barcelona

arch/Config.in.xtensa

@@ -5,10 +5,11 @@ choice
 
 config BR2_XTENSA_CUSTOM
 	bool "Custom Xtensa processor configuration"
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 
 config BR2_xtensa_fsf
 	bool "fsf - Default configuration"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 
 endchoice
 
@@ -40,15 +41,6 @@ config BR2_XTENSA_BIG_ENDIAN
 
 endchoice
 
-config BR2_XTENSA_USE_MMU
-	bool "MMU support"
-	default y
-	depends on BR2_XTENSA_CUSTOM
-	select BR2_USE_MMU
-	help
-	  Enable this option if your Xtensa core has a MMU (Memory
-	  Management Unit).
-
 config BR2_ENDIAN
 	default "LITTLE"	if BR2_XTENSA_LITTLE_ENDIAN
 	default "BIG"		if BR2_xtensa_fsf || BR2_XTENSA_BIG_ENDIAN
@@ -56,9 +48,6 @@ config BR2_ENDIAN
 config BR2_ARCH
 	default "xtensa"	if BR2_xtensa
 
-config BR2_NORMALIZED_ARCH
-	default "xtensa"
-
 config BR2_READELF_ARCH_NAME
 	default "Tensilica Xtensa Processor"
 

arch/arch.mk

@@ -18,16 +18,5 @@ GCC_TARGET_FPU := $(call qstrip,$(BR2_GCC_TARGET_FPU))
 GCC_TARGET_FLOAT_ABI := $(call qstrip,$(BR2_GCC_TARGET_FLOAT_ABI))
 GCC_TARGET_MODE := $(call qstrip,$(BR2_GCC_TARGET_MODE))
 
-# Explicitly set LD's "max-page-size" instead of relying on some defaults
-ifeq ($(BR2_ARC_PAGE_SIZE_4K)$(BR2_ARM64_PAGE_SIZE_4K),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096
-else ifeq ($(BR2_ARC_PAGE_SIZE_8K),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=8192 -Wl,-z,common-page-size=8192
-else ifeq ($(BR2_ARC_PAGE_SIZE_16K),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=16384 -Wl,-z,common-page-size=16384
-else ifeq ($(BR2_ARM64_PAGE_SIZE_64K),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=65536 -Wl,-z,common-page-size=65536
-endif
-
 # Include any architecture specific makefiles.
 -include $(sort $(wildcard arch/arch.mk.*))

arch/arch.mk.arc

@@ -2,7 +2,16 @@ ifeq ($(BR2_arc),y)
 
 # -matomic is always required when the ARC core has the atomic extensions
 ifeq ($(BR2_ARC_ATOMIC_EXT),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -matomic
+ARCH_TOOLCHAIN_WRAPPER_OPTS = -matomic
+endif
+
+# Explicitly set LD's "max-page-size" instead of relying on some defaults
+ifeq ($(BR2_ARC_PAGE_SIZE_4K),y)
+ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=4096
+else ifeq ($(BR2_ARC_PAGE_SIZE_8K),y)
+ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=8192
+else ifeq ($(BR2_ARC_PAGE_SIZE_16K),y)
+ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=16384
 endif
 
 endif

arch/arch.mk.csky

@@ -0,0 +1,26 @@
+#
+# Configure the GCC_TARGET_ARCH variable and append the
+# appropriate C-SKY ISA extensions.
+#
+
+ifeq ($(BR2_csky),y)
+
+ifeq ($(BR2_ck610),y)
+GCC_TARGET_CPU := ck610
+else ifeq ($(BR2_ck807),y)
+GCC_TARGET_CPU := ck807
+else ifeq ($(BR2_ck810),y)
+GCC_TARGET_CPU := ck810
+else ifeq ($(BR2_ck860),y)
+GCC_TARGET_CPU := ck860
+endif
+
+ifeq ($(BR2_CSKY_FPU),y)
+GCC_TARGET_CPU := $(GCC_TARGET_CPU)f
+endif
+
+ifeq ($(BR2_CSKY_VDSP),y)
+GCC_TARGET_CPU := $(GCC_TARGET_CPU)v
+endif
+
+endif

arch/arch.mk.riscv

@@ -27,13 +27,4 @@ ifeq ($(BR2_RISCV_ISA_RVC),y)
 GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)c
 endif
 
-# Starting from gcc 12.x, csr and fence instructions have been
-# separated from the base I instruction set, and special -march
-# suffixes are needed to enable their support. In Buildroot, we assume
-# all RISC-V cores that support Linux implement those instructions, so
-# we unconditionally enable those extensions.
-ifeq ($(BR2_TOOLCHAIN_GCC_AT_LEAST_12),y)
-GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)_zicsr_zifencei
-endif
-
 endif

arch/arch.mk.xtensa

@@ -1,9 +1,3 @@
-BR_ARCH_XTENSA_OVERLAY_FILE = $(call qstrip,$(BR2_XTENSA_OVERLAY_FILE))
-
-ifeq ($(BR_BUILDING)$(BR2_XTENSA_CUSTOM)$(BR2_TOOLCHAIN_BUILDROOT):$(BR_ARCH_XTENSA_OVERLAY_FILE),yyy:)
-$(error No xtensa overlay file provided. Check your BR2_XTENSA_OVERLAY_FILE setting)
-endif
-
 ################################################################################
 # This variable can be used by packages that need to extract the overlay.
 #
@@ -15,6 +9,7 @@ endif
 #       tar xf $(ARCH_XTENSA_OVERLAY_FILE) -C $(@D) --strip-components=1 gcc
 #   endif
 ################################################################################
+BR_ARCH_XTENSA_OVERLAY_FILE = $(call qstrip,$(BR2_XTENSA_OVERLAY_FILE))
 ifneq ($(filter http://% https://% ftp://% scp://%,$(BR_ARCH_XTENSA_OVERLAY_FILE)),)
 ARCH_XTENSA_OVERLAY_URL = $(BR_ARCH_XTENSA_OVERLAY_FILE)
 ARCH_XTENSA_OVERLAY_FILE = $($(PKG)_DL_DIR)/$(notdir $(BR_ARCH_XTENSA_OVERLAY_FILE))

board/aarch64-efi/genimage-efi.cfg

@@ -1,30 +1,30 @@
 image efi-part.vfat {
-	vfat {
-		file EFI {
-			image = "efi-part/EFI"
-		}
-		file Image {
-			image = "Image"
-		}
-	}
-
-	size = 64M
+  vfat {
+    file startup.nsh {
+      image = "efi-part/startup.nsh"
+    }
+    file EFI {
+      image = "efi-part/EFI"
+    }
+    file Image {
+      image = "Image"
+    }
+  }
+  size = 32M
 }
 
 image disk.img {
-	hdimage {
-		partition-table-type = "gpt"
-	}
 
-	partition boot {
-		image = "efi-part.vfat"
-		partition-type-uuid = U
-		offset = 32K
-		bootable = true
-	}
+  hdimage {
+  }
 
-	partition root {
-		partition-type-uuid = b921b045-1df0-41c3-af44-4c6f280d3fae
-		image = "rootfs.ext2"
-	}
+  partition boot {
+    partition-type = 0xEF
+    image = "efi-part.vfat"
+  }
+
+  partition root {
+    partition-type = 0x83
+    image = "rootfs.ext2"
+  }
 }

board/aarch64-efi/grub.cfg

@@ -2,5 +2,5 @@ set default="0"
 set timeout="5"
 
 menuentry "Buildroot" {
-	linux /Image root=PARTLABEL=root rootwait
+	linux /Image root=/dev/vda2 rootwait console=ttyAMA0
 }

board/aarch64-efi/readme.txt

@@ -1,10 +1,6 @@
 
 The aarch64_efi_defconfig allows to build a minimal Linux system that
-can boot on all AArch64 servers providing an EFI firmware.
-
-This includes all Arm EBBR[1] compliant systems, and all Arm SystemReady[2]
-compliant systems for example.
-
+can boot on all AArch64 servers providing an EFI firmware and ACPI.
 
 Building and booting
 ====================
@@ -36,18 +32,3 @@ Note that </path/to/QEMU_EFI.fd> needs to point to a valid aarch64 UEFI
 firmware image for qemu.
 It may be provided by your distribution as a edk2-aarch64 or AAVMF
 package, in path such as /usr/share/edk2/aarch64/QEMU_EFI.fd .
-
-U-Boot based qemu firmware
-==========================
-
-A qemu firmware with support for UEFI based on U-Boot can be built following
-the instructions in [3], with qemu_arm64_defconfig.
-
-This should give you a nor_flash.bin, which you can use with qemu as an
-alternative to QEMU_EFI.fd. You will also need to change the machine
-specification to "-M virt,secure=on" on qemu command line, to enable TrustZone
-support, and you will need to increase the memory with "-m 1024".
-
-[1]: https://github.com/ARM-software/ebbr
-[2]: https://developer.arm.com/architectures/system-architectures/arm-systemready
-[3]: https://github.com/glikely/u-boot-tfa-build

board/acmesystems/acqua-a5/at91-sama5d3_acqua.dts

@@ -1,301 +0,0 @@
-/*
- * acme-acqua.dts - Device Tree file for Acqua A5 Board
- *
- *  Copyright (C) 2014 Atmel,
- *		  2014 Nicolas Ferre <nicolas.ferre@atmel.com>
- * 
- *	2020 Sergio Tanzilli <tanzilli@acmesystems.it>
- *
- * Licensed under GPLv2 or later.
- */
-/dts-v1/;
-#include "sama5d31.dtsi"
-
-/ {
-	model = "Acme Systems Acqua SOM";
-	compatible = "acme,acqua", "atmel,sama5d3", "atmel,sama5";
-
-	chosen {
-		stdout-path = "serial0:115200n8";
-		bootargs = "mem=256M console=ttyS0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait consoleblank=0";
-	};
-
-	memory {
-		reg = <0x20000000 0x10000000>;
-	};
-
-	clocks {
-		slow_xtal {
-			clock-frequency = <32768>;
-		};
-
-		main_xtal {
-			clock-frequency = <12000000>;
-		};
-	};
-
-	ahb {
-		apb {
-			hlcdc: hlcdc@f0030000 {
-				status = "disabled";
-				hlcdc-display-controller {
-					pinctrl-names = "default";
-					pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888_alt>;
-					port@0 {
-						hlcdc_panel_output: endpoint@0 {
-							remote-endpoint = <&panel_input>;
-						};
-					};
-				};
-			};
-		
-			/* MicroSD mounted on the SOM */
-		
-			mmc0: mmc@f0000000 {
-				pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
-				status = "okay";
-				slot@0 {
-					reg = <0>;
-					bus-width = <4>;
-				};
-			};
-  
-  			/* Optional MicroSD to mount on the carrier board */
-  
-			mmc1: mmc@f8000000 {
-				pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
-				status = "disabled";
-				slot@0 {
-					reg = <0>;
-					bus-width = <4>;
-					cd-gpios = <&pioE 1 GPIO_ACTIVE_LOW>;
-				};
-			};
-
-			spi0: spi@f0004000 {
-				cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
-				status = "disabled";
-			};
-
-			can0: can@f000c000 {
-				status = "disabled";
-			};
-
-			tcb0: timer@f0010000 {
-				timer0: timer@0 {
-					compatible = "atmel,tcb-timer";
-					reg = <0>;
-				};
-
-				timer1: timer@1 {
-					compatible = "atmel,tcb-timer";
-					reg = <1>;
-				};
-			};
-
-			i2c0: i2c@f0014000 {
-				pinctrl-0 = <&pinctrl_i2c0_pu>;
-				status = "disabled";
-			};
-
-			i2c1: i2c@f0018000 {
-				status = "disabled";
-			};
-
-			macb1: ethernet@f802c000 {
-				compatible = "atmel,sama5d3-macb", "cdns,at91sam9260-macb", "cdns,macb";
-				
-				status = "okay";
-				phy-mode = "rmii";
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				nvmem-cells = <&eth0_addr>;
-				nvmem-cell-names = "mac-address";
-
-                phy0: ethernet-phy@1 {
-                    interrupt-parent = <&pioE>;
-                    interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
-                    reg = <1>;
-                };
-
-				/*ethernet-phy@1 {
-					reg = <0x1>;
-				};*/
-			};
-
-			/* Bit banging internal I2C to manage the AT24MAC402 chip */
-
-			i2c3@ {
-				compatible = "i2c-gpio";
-				gpios = <&pioE 1 0 /* SDA */
-						 &pioE 2 0 /* SCK */
-						>;
-				i2c-gpio,delay-us = <4>;    /* ~178 kHz */
-				#address-cells = <1>;
-				#size-cells = <0>;
-			
-				/* EEPROM contains the eth0 MAC address */
-				 
-				eeprom@58 {
-					compatible = "atmel,24mac402";
-					pagesize = <256>;
-					read-only;
-					reg = <0x58>;
-					#address-cells = <1>;
-					#size-cells = <1>;
-
-					eth0_addr: eth-mac-addr@9A {
-						reg = <0x0 0x06>;
-					};
-				};
-			};
-
-			pwm0: pwm@f002c000 {
-				pinctrl-names = "default";
-				pinctrl-0 = <&pinctrl_pwm0_pwmh0_0 &pinctrl_pwm0_pwmh1_0>;
-				status = "disabled";
-			};
-
-			usart0: serial@f001c000 {
-				status = "okay";
-			};
-
-			usart1: serial@f0020000 {
-				pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
-				status = "disabled";
-			};
-
-			uart0: serial@f0024000 {
-				status = "disabled";
-			};
-
-
-			spi1: spi@f8008000 {
-				cs-gpios = <&pioC 25 0>;
-				status = "disabled";
-			};
-
-			adc0: adc@f8018000 {
-				atmel,adc-vref = <3300>;
-				atmel,adc-channels-used = <0xfe>;
-				pinctrl-0 = <
-					&pinctrl_adc0_adtrg
-					&pinctrl_adc0_ad1
-					&pinctrl_adc0_ad2
-					&pinctrl_adc0_ad3
-					&pinctrl_adc0_ad4
-					&pinctrl_adc0_ad5
-					&pinctrl_adc0_ad6
-					&pinctrl_adc0_ad7
-					>;
-				status = "disabled";
-			};
-
-			i2c2: i2c@f801c000 {
-				dmas = <0>, <0>;	/* Do not use DMA for i2c2 */
-				pinctrl-0 = <&pinctrl_i2c2_pu>;
-				status = "disabled";
-			};
-
-
-			dbgu: serial@ffffee00 {
-				status = "okay";
-			};
-
-			pinctrl@fffff200 {
-				board {
-					pinctrl_i2c0_pu: i2c0_pu {
-						atmel,pins =
-							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
-							<AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
-					};
-
-					pinctrl_i2c2_pu: i2c2_pu {
-						atmel,pins =
-							<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
-							<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
-					};
-
-					pinctrl_key_gpio: key_gpio_0 {
-						atmel,pins =
-							<AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
-					};
-
-					pinctrl_mmc0_cd: mmc0_cd {
-						atmel,pins =
-							<AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
-					};
-
-					pinctrl_mmc1_cd: mmc1_cd {
-						atmel,pins =
-							<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
-					};
-
-					pinctrl_usba_vbus: usba_vbus {
-						atmel,pins =
-							<AT91_PIOE 9 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;	/* PE9, conflicts with A9 */
-					};
-				};
-			};
-		};
-
-        usb0: gadget@500000 {
-            status = "okay";
-        };
-
-        usb1: ohci@600000 {
-            status = "okay";
-        };
-
-        usb2: ehci@700000 {
-            status = "okay";
-        };
-		
-	};
-
-
-	panel: panel {
-		/* compatible = "acme,43inch", "simple-panel"; */
-		compatible = "acme,50inch", "simple-panel";
-		/* compatible = "acme,70inch", "simple-panel"; */
-		
-		status = "disable"
-
-		port@0 {
-			panel_input: endpoint@0 {
-				remote-endpoint = <&hlcdc_panel_output>;
-			};
-		};
-	};
-
- 
-	leds {
-		compatible = "gpio-leds";
-
-		led0 {
-			label = "led0";
-			gpios = <&pioE 3 GPIO_ACTIVE_LOW>;
-			default-state = "off";
-		};
-
-		led1 {
-			label = "led1";
-			gpios = <&pioE 4 GPIO_ACTIVE_LOW>;
-			default-state = "off";
-		};
-
-		led2 {
-			label = "led2";
-			gpios = <&pioE 5 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "heartbeat";
-		};
-
-		led3 {
-			label = "led3";
-			gpios = <&pioE 6 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "mmc0";
-			default-state = "off";
-		};
-	};		
-};

board/acmesystems/acqua-a5/genimage.cfg

@@ -1,29 +0,0 @@
-# Minimal SD card image for the Acme Systems Acqua A5
-
-image boot.vfat {
-	vfat {
-		files = {
-			"boot.bin",
-			"zImage",
-			"at91-sama5d3_acqua.dtb"
-		}
-	}
-
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-	}
-}

board/acmesystems/acqua-a5/readme.txt

@@ -1,44 +0,0 @@
-Acme Systems Acqua A5
-
-Intro
-=====
-
-The Acqua A5 is a system on module based on the Microchip SAMA5D31 SoC:
-
-    https://www.acmesystems.it/acqua
-
-The files here support configurations that build a microSD image for a
-minimal system that can be accessed through the serial console. You will
-need an USB-to-serial interface in order to access that console from
-your computer:
-
-    https://www.acmesystems.it/DPI
-
-How to build the image
-======================
-
-If you have an Acqua module with 256 MiB of RAM, type:
-
-$ make acmesystems_acqua_a5_256mb_defconfig
-
-If you have the 512 MiB version, type instead:
-
-$ make acmesystems_acqua_a5_512mb_defconfig
-
-You can optionally tweak the configuration and add packages by typing:
-
-$ make menuconfig
-
-Then, proceed with the build:
-
-$ make
-
-How to write the microSD card
-=============================
-
-The system image is the file "sdcard.img" in the "output/images"
-directory. Write it to the card by invoking:
-
-$ sudo dd if=output/images/sdcard.img of=/dev/sdX bs=1M
-
-where `sdX' is the block device representing the microSD card.

board/acmesystems/aria-g25/genimage.cfg

@@ -11,10 +11,9 @@ image boot.vfat {
 		}
 
 		file boot.bin {
-			image = "at91sam9x5_aria-sdcardboot-linux-zimage-dt-3.10.3.bin"
+			image = "at91sam9x5_aria-sdcardboot-linux-zimage-dt-3.8.13.bin"
 		}
 	}
-
 	size = 16M
 }
 

board/acmesystems/arietta-g25/genimage.cfg

@@ -5,16 +5,15 @@ image boot.vfat {
 		file zImage {
 			image = "zImage"
 		}
-
+		
 		file acme-arietta.dtb {
 			image = "at91-ariettag25.dtb"
 		}
-
+		
 		file boot.bin {
-			image = "at91sam9x5_arietta-sdcardboot-linux-zimage-dt-3.10.3.bin"
-		}
+			image = "at91sam9x5_arietta-sdcardboot-linux-zimage-dt-3.8.13.bin"
+		} 
 	}
-
 	size = 16M
 }
 

board/altera/socrates_cyclone5/genimage.cfg

@@ -5,7 +5,6 @@ image boot.vfat {
 			"socfpga_cyclone5_socrates.dtb"
 		}
 	}
-
 	size = 8M
 }
 
@@ -18,13 +17,13 @@ image uboot.img {
 		in-partition-table = "no"
 		image = "u-boot-spl.bin.crc"
 		offset = 0
-		size = 64K
+		size = 64k
 	}
 
 	partition uboot-full {
 		in-partition-table = "no"
 		image = "u-boot.img"
-		offset = 256K
+		offset = 256k
 	}
 
 	size = 1M
@@ -37,7 +36,7 @@ image sdcard.img {
 	partition uboot-env {
 		in-partition-table = "no"
 		image = "uboot-env.bin"
-		offset = 17K # 512 * 34 -> just after gpt
+		offset = 17408 # 512 * 34 -> just after gpt
 	}
 
 	partition boot {

board/amarula/a64-relic/extlinux.conf

@@ -0,0 +1,4 @@
+label linux-4.17.0-rc3
+  kernel /Image
+  devicetree /sun50i-a64-amarula-relic.dtb
+  append console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p4 rootwait

board/amarula/a64-relic/genimage.cfg

@@ -0,0 +1,10 @@
+image boot.vfat {
+	vfat {
+		files = {
+			"Image",
+			"sun50i-a64-amarula-relic.dtb",
+			"extlinux"
+		}
+	}
+	size = 64M
+}

board/amarula/a64-relic/readme.txt

@@ -0,0 +1,90 @@
+Amarula A64 Relic
+================
+
+Amarula A64-Relic is an Allwinner A64 based IoT device, which supports:
+- Allwinner A64 Cortex-A53
+- Mali-400MP2 GPU
+- AXP803 PMIC
+- 1GB DDR3 RAM
+- 8GB eMMC
+- AP6330 Wifi/BLE
+- MIPI-DSI
+- CSI: OV5640 sensor
+- USB OTG
+- 12V DC power supply
+
+Wiki link:
+https://openedev.amarulasolutions.com/display/ODWIKI/Amarual+A64-Relic
+
+Build
+=====
+
+  $ make amarula_a64_relic_defconfig
+
+  $ make
+
+build files at output/images/:
+  - sunxi-spl.bin
+  - u-boot.itb
+  - Image
+  - sun50i-a64-amarula-relic.dtb
+  - boot.vfat
+  - rootfs.ext4
+
+Write eMMC
+=========
+
+The board comes with an operating system preloaded on the eMMC.
+To replace it with the Buildroot-built system, take the following
+steps
+
+1. Connect the board UART with host and open minicom(ttyUSBx/115200N8)
+
+2. Supply 12V DC for power-on the board.
+
+3. Interrupt U-Boot by pressing enter
+
+4. Create GPT partitions
+  => mmc dev 1
+  => gpt write mmc 1 $partitions
+
+5. Connect the board USB-OTG with USB slot on the host.
+
+6. Initiate fastboot
+  => fastboot 0
+
+7. Write images from host onto eMMC using fastboot
+  $ cd output/images
+  $ sudo fastboot -i 0x1f3a flash loader1 sunxi-spl.bin
+  $ sudo fastboot -i 0x1f3a flash loader2 u-boot.itb
+  $ sudo fastboot -i 0x1f3a flash esp boot.vfat
+  $ sudo fastboot -i 0x1f3a flash system rootfs.ext4
+
+Update eMMC during Development
+==============================
+
+During development, reflashing the entire filesystem image at every
+change is time consuming. A useful alternative is to directly access
+over USB the filesystem stored on the eMMC, using the USB Mass Storage
+capability of U-Boot. To achieve this:
+
+1. Build U-Boot by enabling UMS
+   $ make uboot-menuconfig
+   (select CONFIG_CMD_USB_MASS_STORAGE=y)
+
+2. Follow all 6 steps from 'Write eMMC' and mount eMMC on host
+    => mmc dev 1
+    => ums 0 mmc 1
+
+WiFi
+====
+
+ # wpa_passphrase ACCESSPOINTNAME >> /etc/wpa_supplicant.conf
+   (type password and enter)
+ # wpa_supplicant -i wlan0 -c /etc/wpa_supplicant.conf -B
+ # udhcpc -i wlan0
+ # ping google.com
+
+--
+Jagan Teki <jagan@amarulasolutions.com>
+29-Jun-2018

board/amarula/a64-relic/rootfs_overlay/lib/firmware/brcm/brcmfmac4330-sdio.txt

@@ -0,0 +1,83 @@
+#AP6330_NVRAM_V1.0_20121130
+#Sample variables file for BCM94330 SD FC AGB board
+manfid=0x2d0
+prodid=0x0547
+vendid=0x14e4
+devid=0x4360
+boardtype=0x05e1
+boardrev=0x1202
+boardflags=0x0080200
+nocrc=1
+xtalfreq=26000
+boardnum=22
+macaddr=00:90:4c:c5:12:38
+ag0=254
+aa2g=1
+ccode=ALL
+pa0itssit=0x20
+pa0b0=5587
+pa0b1=-633
+pa0b2=-158
+rssismf2g=0xa
+rssismc2g=0x3
+rssisav2g=0x7
+#rssi params for 5GHz
+rssismf5g=0x4
+rssismc5g=0x3
+rssisav5g=0x7
+#PA parameters for lower a-band
+pa1lob0=4748
+pa1lob1=-566
+pa1lob2=-180
+#PA parameters for midband
+pa1b0=4762
+pa1b1=-593
+pa1b2=-172
+#PA parameters for high band
+#pa1hib0=4596
+pa1hib0=4666
+pa1hib1=-619
+pa1hib2=-163
+rxpo5g=0
+maxp2ga0=74
+maxp5ga0=66
+maxp5gla0=66
+maxp5gha0=66
+# 2.4G Tx Power offsets
+cck2gpo=0x2222
+ofdm2gpo=0x44444444
+mcs2gpo0=0x6666
+mcs2gpo1=0x6666
+# 5G Tx Power offsets
+ofdm5gpo=0x44444444
+ofdm5glpo=0x44444444
+ofdm5ghpo=0x44444444
+mcs5gpo0=0x6666
+mcs5gpo1=0x6666
+mcs5glpo0=0x6666
+mcs5glpo1=0x6666
+mcs5ghpo0=0x6666
+mcs5ghpo1=0x6666
+sromrev=3
+il0macaddr=00:90:4c:c5:12:38
+wl0id=0x431b
+cckPwrOffset=4
+swctrlmap_2g=0x44844484,0x42824282,0x40804484,0x18282,0x1ff
+triso5g=0
+swctrlmap_5g=0x00100010,0x20202020,0x20202020,0x14202,0x0f0
+rfreg033=0x19
+rfreg033_cck=0x1f
+dacrate2g=160
+dacrate5g=160
+txalpfbyp2g=1
+bphyscale=17
+cckPwrIdxCorr=-15
+pacalidx2g=50
+#pacalidx5g=20
+noise_cal_ref_2g=53
+noise_cal_po_2g=0
+noise_cal_ref_5g=52
+noise_cal_po_5g=5,0,0
+# 4330 OOB parameter: High level trigger
+muxenab=0x10
+

board/amarula/vyasa/patches/uboot/0001-include-configs-Increase-CONFIG_SYS_BOOTM_LEN-to-16M.patch

@@ -0,0 +1,35 @@
+From 8ee2b03039cccf64402a72dea2185d7fe1972729 Mon Sep 17 00:00:00 2001
+From: Shyam Saini <shyam.saini@amarulasolutions.com>
+Date: Mon, 15 Apr 2019 16:16:16 +0530
+Subject: [PATCH] include: configs: Increase CONFIG_SYS_BOOTM_LEN to 16MB
+
+The default value of CONFIG_SYS_BOOTM_LEN is 0x800000 i.e, 8MB which
+causes board reset because of larger uImage size.
+
+Error log snippet:
+   Booting using the fdt blob at 0x1f00000
+   Loading Kernel Image ... Image too large: increase CONFIG_SYS_BOOTM_LEN
+Must RESET board to recover
+resetting ...
+
+Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
+---
+ include/configs/rk3288_common.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
+index 72a54bc0ab..eab7cf4d86 100644
+--- a/include/configs/rk3288_common.h
++++ b/include/configs/rk3288_common.h
+@@ -9,6 +9,8 @@
+ #include <asm/arch/hardware.h>
+ #include "rockchip-common.h"
+ 
++#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* 16MB */
++
+ #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+ #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+ #define CONFIG_SYS_CBSIZE		1024
+-- 
+2.11.0
+

board/andes/ae350/ae350.dts

@@ -1,274 +0,0 @@
-/dts-v1/;
-
-/ {
-	#address-cells = <2>;
-	#size-cells = <2>;
-	compatible = "andestech,ae350";
-	model = "andestech,ax45";
-	aliases {
-		uart0 = &serial0;
-		spi0 = &spi;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,38400n8 earlycon=sbi debug loglevel=7";
-		stdout-path = "uart0:38400n8";
-	};
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		timebase-frequency = <60000000>;
-		CPU0: cpu@0 {
-			device_type = "cpu";
-			reg = <0>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64i2p0m2p0a2p0f2p0d2p0c2p0xv5-1p1xdsp0p0";
-			riscv,priv-major = <1>;
-			riscv,priv-minor = <10>;
-			mmu-type = "riscv,sv48";
-			clock-frequency = <60000000>;
-			i-cache-size = <0x8000>;
-			i-cache-sets = <256>;
-			i-cache-block-size = <64>;
-			i-cache-line-size = <64>;
-			d-cache-size = <0x8000>;
-			d-cache-sets = <128>;
-			d-cache-block-size = <64>;
-			d-cache-line-size = <64>;
-			next-level-cache = <&L2>;
-			CPU0_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				interrupt-controller;
-				compatible = "riscv,cpu-intc";
-			};
-		};
-		CPU1: cpu@1 {
-			device_type = "cpu";
-			reg = <1>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64i2p0m2p0a2p0f2p0d2p0c2p0xv5-1p1xdsp0p0";
-			riscv,priv-major = <1>;
-			riscv,priv-minor = <10>;
-			mmu-type = "riscv,sv48";
-			clock-frequency = <60000000>;
-			i-cache-size = <0x8000>;
-			i-cache-sets = <256>;
-			i-cache-block-size = <64>;
-			i-cache-line-size = <64>;
-			d-cache-size = <0x8000>;
-			d-cache-sets = <128>;
-			d-cache-block-size = <64>;
-			d-cache-line-size = <64>;
-			next-level-cache = <&L2>;
-			CPU1_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				interrupt-controller;
-				compatible = "riscv,cpu-intc";
-			};
-		};
-		CPU2: cpu@2 {
-			device_type = "cpu";
-			reg = <2>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64i2p0m2p0a2p0f2p0d2p0c2p0xv5-1p1xdsp0p0";
-			riscv,priv-major = <1>;
-			riscv,priv-minor = <10>;
-			mmu-type = "riscv,sv48";
-			clock-frequency = <60000000>;
-			i-cache-size = <0x8000>;
-			i-cache-sets = <256>;
-			i-cache-block-size = <64>;
-			i-cache-line-size = <64>;
-			d-cache-size = <0x8000>;
-			d-cache-sets = <128>;
-			d-cache-block-size = <64>;
-			d-cache-line-size = <64>;
-			next-level-cache = <&L2>;
-			CPU2_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				interrupt-controller;
-				compatible = "riscv,cpu-intc";
-			};
-		};
-		CPU3: cpu@3 {
-			device_type = "cpu";
-			reg = <3>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64i2p0m2p0a2p0f2p0d2p0c2p0xv5-1p1xdsp0p0";
-			riscv,priv-major = <1>;
-			riscv,priv-minor = <10>;
-			mmu-type = "riscv,sv48";
-			clock-frequency = <60000000>;
-			i-cache-size = <0x8000>;
-			i-cache-sets = <256>;
-			i-cache-block-size = <64>;
-			i-cache-line-size = <64>;
-			d-cache-size = <0x8000>;
-			d-cache-sets = <128>;
-			d-cache-block-size = <64>;
-			d-cache-line-size = <64>;
-			next-level-cache = <&L2>;
-			CPU3_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				interrupt-controller;
-				compatible = "riscv,cpu-intc";
-			};
-		};
-	};
-	L2: l2-cache@e0500000 {
-		compatible = "cache";
-		cache-level = <2>;
-		cache-size = <0x80000>;
-		reg = <0x00000000 0xe0500000 0x00000000 0x00001000>;
-		andes,inst-prefetch = <3>;
-		andes,data-prefetch = <3>;
-		// The value format is <XRAMOCTL XRAMICTL>
-		andes,tag-ram-ctl = <0 0>;
-		andes,data-ram-ctl = <0 0>;
-	};
-	memory@0 {
-		reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
-		device_type = "memory";
-	};
-	soc {
-		#address-cells = <2>;
-		#size-cells = <2>;
-		compatible = "andestech,riscv-ae350-soc", "simple-bus";
-		ranges;
-		plic0: interrupt-controller@e4000000 {
-			compatible = "riscv,plic0";
-			reg = <0x00000000 0xe4000000 0x00000000 0x02000000>;
-			interrupts-extended = < &CPU0_intc 11 &CPU0_intc 9 &CPU1_intc 11 &CPU1_intc 9 &CPU2_intc 11 &CPU2_intc 9 &CPU3_intc 11 &CPU3_intc 9>;
-			interrupt-controller;
-			#address-cells = <2>;
-			#interrupt-cells = <2>;
-			riscv,ndev = <71>;
-		};
-		plic1: interrupt-controller@e6400000 {
-			compatible = "riscv,plic1";
-			reg = <0x00000000 0xe6400000 0x00000000 0x00400000>;
-			interrupts-extended = < &CPU0_intc 3 &CPU1_intc 3 &CPU2_intc 3 &CPU3_intc 3>;
-			interrupt-controller;
-			#address-cells = <2>;
-			#interrupt-cells = <2>;
-			riscv,ndev = <4>;
-		};
-		plmt0: plmt0@e6000000 {
-			compatible = "riscv,plmt0";
-			reg = <0x00000000 0xe6000000 0x00000000 0x00100000>;
-			interrupts-extended = < &CPU0_intc 7 &CPU1_intc 7 &CPU2_intc 7 &CPU3_intc 7>;
-		};
-		spiclk: virt_100mhz {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <100000000>;
-		};
-		timer0: timer@f0400000 {
-			compatible = "andestech,atcpit100";
-			reg = <0x00000000 0xf0400000 0x00000000 0x00001000>;
-			interrupts = <3 4>;
-			interrupt-parent = <&plic0>;
-			clock-frequency = <60000000>;
-		};
-		pwm: pwm@f0400000 {
-			compatible = "andestech,atcpit100-pwm";
-			reg = <0x00000000 0xf0400000 0x00000000 0x00001000>;
-			interrupts = <3 4>;
-			interrupt-parent = <&plic0>;
-			clock-frequency = <60000000>;
-			pwm-cells = <2>;
-		};
-		wdt: wdt@f0500000 {
-			compatible = "andestech,atcwdt200";
-			reg = <0x00000000 0xf0500000 0x00000000 0x00001000>;
-			interrupts = <3 4>;
-			interrupt-parent = <&plic0>;
-			clock-frequency = <15000000>;
-		};
-		serial0: serial@f0300000 {
-			compatible = "andestech,uart16550", "ns16550a";
-			reg = <0x00000000 0xf0300000 0x00000000 0x00001000>;
-			interrupts = <9 4>;
-			interrupt-parent = <&plic0>;
-			clock-frequency = <19660800>;
-			reg-shift = <2>;
-			reg-offset = <32>;
-			no-loopback-test = <1>;
-		};
-		rtc0: rtc@f0600000 {
-			compatible = "andestech,atcrtc100";
-			reg = <0x00000000 0xf0600000 0x00000000 0x00001000>;
-			interrupts = <1 4 2 4>;
-			interrupt-parent = <&plic0>;
-			wakeup-source;
-		};
-		gpio: gpio@f0700000 {
-			compatible = "andestech,atcgpio100";
-			reg = <0x00000000 0xf0700000 0x00000000 0x00001000>;
-			interrupts = <7 4>;
-			interrupt-parent = <&plic0>;
-			wakeup-source;
-		};
-		mac0: mac@e0100000 {
-			compatible = "andestech,atmac100";
-			reg = <0x00000000 0xe0100000 0x00000000 0x00001000>;
-			interrupts = <19 4>;
-			interrupt-parent = <&plic0>;
-			dma-coherent;
-		};
-		smu: smu@f0100000 {
-			compatible = "andestech,atcsmu";
-			reg = <0x00000000 0xf0100000 0x00000000 0x00001000>;
-		};
-		mmc0: mmc@f0e00000 {
-			compatible = "andestech,atfsdc010";
-			reg = <0x00000000 0xf0e00000 0x00000000 0x00001000>;
-			interrupts = <18 4>;
-			interrupt-parent = <&plic0>;
-			clock-freq-min-max = <400000 100000000>;
-			max-frequency = <100000000>;
-			fifo-depth = <16>;
-			cap-sd-highspeed;
-			dma-coherent;
-		};
-		dma0: dma@f0c00000 {
-			compatible = "andestech,atcdmac300";
-			reg = <0x00000000 0xf0c00000 0x00000000 0x00001000>;
-			interrupts = <10 4 64 4 65 4 66 4 67 4 68 4 69 4 70 4 71 4>;
-			interrupt-parent = <&plic0>;
-			dma-channels = <8>;
-		};
-		lcd0: lcd@e0200000 {
-			compatible = "andestech,atflcdc100";
-			reg = <0x00000000 0xe0200000 0x00000000 0x00001000>;
-			interrupts = <20 4>;
-			interrupt-parent = <&plic0>;
-			dma-coherent;
-		};
-		pmu: pmu {
-			compatible = "riscv,andes-pmu";
-			device_type = "pmu";
-		};
-		spi: spi@f0b00000 {
-			compatible = "andestech,atcspi200";
-			reg = <0x00000000 0xf0b00000 0x00000000 0x00001000>;
-			interrupts = <4 4>;
-			interrupt-parent = <&plic0>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			num-cs = <1>;
-			clocks = <&spiclk>;
-			flash@0 {
-				compatible = "jedec,spi-nor";
-				reg = <0x00000000>;
-				spi-max-frequency = <50000000>;
-				spi-cpol;
-				spi-cpha;
-			};
-		};
-	};
-};

board/andes/ae350/genimage_sdcard.cfg

@@ -1,26 +0,0 @@
-image boot.vfat {
-	vfat {
-		files = {
-			"u-boot-spl.bin",
-			"u-boot.itb",
-			"ae350.dtb",
-		}
-	}
-	size = 2M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		bootable = true
-		image = "rootfs.ext4"
-	}
-}

board/andes/ae350/patches/opensbi/0001-Disable-PIC-explicitly-for-assembling.patch

@@ -1,29 +0,0 @@
-From 3ccb71eeca42dbcd5e4d00ae1877a489ae82598d Mon Sep 17 00:00:00 2001
-From: Yu Chien Peter Lin <peterlin@andestech.com>
-Date: Wed, 29 Dec 2021 16:04:54 +0800
-Subject: [PATCH] Disable PIC explicitly for assembling
-
-This patch is necessary if the fw_dynamic load address
-is not equal to link address.
-However, they are equal currently, since we include an u-boot
-patch for preventing fw_dynamic relocation.
-
-Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
----
- Makefile | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/Makefile b/Makefile
-index d6f097d..441518d 100644
---- a/Makefile
-+++ b/Makefile
-@@ -225,6 +225,7 @@ ASFLAGS		+=	-mcmodel=$(PLATFORM_RISCV_CODE_MODEL)
- ASFLAGS		+=	$(GENFLAGS)
- ASFLAGS		+=	$(platform-asflags-y)
- ASFLAGS		+=	$(firmware-asflags-y)
-+ASFLAGS		+=	-fno-pic
-
- ARFLAGS		=	rcs
-
---
-2.25.1

board/andes/ae350/patches/opensbi/0002-Enable-cache-for-opensbi-jump-mode.patch

@@ -1,25 +0,0 @@
-From 325328f4204b40b1fcc8db3b46c7c8805710d21c Mon Sep 17 00:00:00 2001
-From: Yu Chien Peter Lin <peterlin@andestech.com>
-Date: Thu, 30 Dec 2021 08:47:34 +0800
-Subject: [PATCH] Enable cache for opensbi jump mode
-
-Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
----
- firmware/fw_base.S | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/firmware/fw_base.S b/firmware/fw_base.S
-index ab33e11..155d230 100644
---- a/firmware/fw_base.S
-+++ b/firmware/fw_base.S
-@@ -46,6 +46,8 @@
-	.globl _start
-	.globl _start_warm
- _start:
-+	li t0, 0x80003
-+	csrw  0x7ca, t0
-	/* Find preferred boot HART id */
-	MOV_3R	s0, a0, s1, a1, s2, a2
-	call	fw_boot_hart
---
-2.25.1

board/andes/ae350/patches/uboot/0001-Fix-mmc-no-partition-table-error.patch

@@ -1,27 +0,0 @@
-From ea4675215b53d16a72d29b8a6fc6a86cccf59cf0 Mon Sep 17 00:00:00 2001
-From: Yu Chien Peter Lin <peterlin@andestech.com>
-Date: Wed, 5 Jan 2022 11:00:59 +0800
-Subject: [PATCH] Fix mmc no partition table error
-
-Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
----
- drivers/mmc/ftsdc010_mci.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c
-index 570d54cf..3b1e0aa0 100644
---- a/drivers/mmc/ftsdc010_mci.c
-+++ b/drivers/mmc/ftsdc010_mci.c
-@@ -438,10 +438,6 @@ static int ftsdc010_mmc_probe(struct udevice *dev)
-		return ret;
- #endif
-
--	if (dev_read_bool(dev, "cap-mmc-highspeed") || \
--		  dev_read_bool(dev, "cap-sd-highspeed"))
--		chip->caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
--
-	ftsdc_setup_cfg(&plat->cfg, dev->name, chip->buswidth, chip->caps,
-			priv->minmax[1] , priv->minmax[0]);
-	chip->mmc = &plat->mmc;
---
-2.25.1

board/andes/ae350/patches/uboot/0002-Prevent-fw_dynamic-from-relocation.patch

@@ -1,27 +0,0 @@
-From 4c0c5378d032f2f95577585935624baf7b4decf3 Mon Sep 17 00:00:00 2001
-From: Yu Chien Peter Lin <peterlin@andestech.com>
-Date: Wed, 5 Jan 2022 11:02:26 +0800
-Subject: [PATCH] Prevent fw_dynamic from relocation
-
-This patch prevents OpenSBI relocation, load fw_dynamic to link address
-
-Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
----
- board/AndesTech/ax25-ae350/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig
-index e50f505a..385c4c11 100644
---- a/board/AndesTech/ax25-ae350/Kconfig
-+++ b/board/AndesTech/ax25-ae350/Kconfig
-@@ -25,7 +25,7 @@ config SPL_TEXT_BASE
-	default 0x800000
-
- config SPL_OPENSBI_LOAD_ADDR
--	default 0x01000000
-+	default 0x0
-
- config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
---
-2.25.1

board/andes/ae350/patches/uboot/0003-Fix-u-boot-proper-booting-issue.patch

@@ -1,26 +0,0 @@
-From 3d09501175ae6f5e3f6520b48b1358226a99ff16 Mon Sep 17 00:00:00 2001
-From: Yu Chien Peter Lin <peterlin@andestech.com>
-Date: Wed, 5 Jan 2022 18:17:39 +0800
-Subject: [PATCH] Fix u-boot proper booting issue
-
-Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
----
- arch/riscv/cpu/start.S | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
-index 76850ec9..2ccda4f5 100644
---- a/arch/riscv/cpu/start.S
-+++ b/arch/riscv/cpu/start.S
-@@ -139,7 +139,9 @@ call_harts_early_init:
-	 * accesses gd).
-	 */
-	mv	gp, s0
-+#if !CONFIG_IS_ENABLED(RISCV_SMODE)
-	bnez	tp, secondary_hart_loop
-+#endif
- #endif
-
-	jal	board_init_f_init_reserve
---
-2.25.1

board/andes/ae350/patches/uboot/0004-Enable-printing-OpenSBI-boot-logo.patch

@@ -1,25 +0,0 @@
-From 3847a959ac4c07facbd80104ca5fa6a91fad5f35 Mon Sep 17 00:00:00 2001
-From: Yu Chien Peter Lin <peterlin@andestech.com>
-Date: Thu, 6 Jan 2022 13:50:07 +0800
-Subject: [PATCH] Enable printing OpenSBI boot logo
-
-Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
----
- include/opensbi.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/include/opensbi.h b/include/opensbi.h
-index d812cc8c..91fb8fd9 100644
---- a/include/opensbi.h
-+++ b/include/opensbi.h
-@@ -20,7 +20,7 @@
-
- enum sbi_scratch_options {
-	/** Disable prints during boot */
--	SBI_SCRATCH_NO_BOOT_PRINTS = (1 << 0),
-+	SBI_SCRATCH_NO_BOOT_PRINTS = 0,
- };
-
- /** Representation dynamic info passed by previous booting stage */
---
-2.25.1

board/andes/ae350/post-build.sh

@@ -1,3 +0,0 @@
-#!/bin/sh
-cp $BINARIES_DIR/Image $TARGET_DIR/boot
-cp $BINARIES_DIR/ae350.dtb $TARGET_DIR/boot

board/andes/ae350/readme.txt

@@ -1,65 +0,0 @@
-Intro
-=====
-
-Andestech AE350 Platform
-
-The AE350 prototype demonstrates the AE350 platform on the FPGA.
-
-How to build it
-===============
-
-Configure Buildroot
--------------------
-
-  $ make andes_ae350_45_defconfig
-
-If you want to customize your configuration:
-
-  $ make menuconfig
-
-Build everything
-----------------
-Note: you will need to access to the network, since Buildroot will
-download the packages' sources.
-
-  $ make
-
-Result of the build
--------------------
-
-After building, you should obtain the following files:
-
-  output/images/
-  |-- ae350.dtb
-  |-- boot.vfat
-  |-- fw_dynamic.bin
-  |-- fw_dynamic.elf
-  |-- fw_jump.bin
-  |-- fw_jump.elf
-  |-- Image
-  |-- rootfs.ext2
-  |-- rootfs.ext4 -> rootfs.ext2
-  |-- sdcard.img
-  |-- u-boot-spl.bin
-  `-- u-boot.itb
-
-Copy the sdcard.img to a SD card with "dd":
-
-  $ sudo dd if=sdcard.img of=/dev/sdX bs=4096
-  $ sudo sync
-
-Your SD card partition should be:
-
-  Disk /dev/sdb: 14.48 GiB, 15552479232 bytes, 30375936 sectors
-  Disk model: Multi-Card
-  Units: sectors of 1 * 512 = 512 bytes
-  Sector size (logical/physical): 512 bytes / 512 bytes
-  I/O size (minimum/optimal): 512 bytes / 512 bytes
-  Disklabel type: dos
-  Disk identifier: 0x00000000
-
-  Device     Boot Start    End Sectors Size Id Type
-  /dev/sdb1           1   4096    4096   2M  c W95 FAT32 (LBA)
-  /dev/sdb2  *     4097 126976  122880  60M 83 Linux
-
-Insert SD card and reset the board, it should boot Linux from mmc.

board/andes/ae350/rootfs_overlay/boot/extlinux/extlinux.conf

@@ -1,4 +0,0 @@
-label linux
-   kernel /boot/Image
-   fdt /boot/ae350.dtb
-   append earlycon=sbi root=/dev/mmcblk0p2 rootwait

board/andes/ae350/uboot.config.fragment

@@ -1,5 +0,0 @@
-CONFIG_SPL_FS_FAT=y
-CONFIG_SPL_MMC=y
-# CONFIG_SPL_RAM_SUPPORT is not set
-# CONFIG_OF_BOARD is not set
-CONFIG_OF_SEPARATE=y

board/andes/ae3xx/ae3xx.fragment

@@ -0,0 +1 @@
+CONFIG_NDS32_BUILTIN_DTB="ae3xx"

board/andes/patches/linux/0001-nds32-Fix-boot-messages-garbled.patch

@@ -0,0 +1,28 @@
+From 90d52d180dcc5d1300dc352ca709eb6453894143 Mon Sep 17 00:00:00 2001
+From: Nylon Chen <nylon7@andestech.com>
+Date: Wed, 28 Nov 2018 16:26:46 +0800
+Subject: [PATCH] nds32: Fix boot messages garbled
+
+In order to display uart correctly we have to pass the correct setting of uart to kernel by bootarg.
+This patch will provide such settings to set the correct uart baud rate.
+
+Signed-off-by: Nylon Chen <nylon7@andestech.com>
+---
+ arch/nds32/boot/dts/ae3xx.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/nds32/boot/dts/ae3xx.dts b/arch/nds32/boot/dts/ae3xx.dts
+index bb39749a6673..aefe2090926a 100644
+--- a/arch/nds32/boot/dts/ae3xx.dts
++++ b/arch/nds32/boot/dts/ae3xx.dts
+@@ -6,6 +6,7 @@
+ 	interrupt-parent = <&intc>;
+ 
+ 	chosen {
++		bootargs = "memblock=debug earlycon console=ttyS0,38400n8 debug loglevel=7";
+ 		stdout-path = &serial0;
+ 	};
+ 
+-- 
+2.18.0
+

board/andes/readme.txt

@@ -0,0 +1,49 @@
+Intro
+=====
+
+Andestech(nds32) AE3XX Platform
+
+The AE3XX prototype demonstrates the AE3XX example platform on the FPGA. 
+It is composed of one Andestech(nds32) processor and AE3XX.
+
+How to build it
+===============
+
+Configure Buildroot
+-------------------
+
+The andes_ae3xx_defconfig configuration is a sample configuration with
+all that is required to bring the FPGA Development Board:
+
+  $ make andes_ae3xx_defconfig
+
+Build everything
+----------------
+Note: you will need to have access to the network, since Buildroot will
+download the packages' sources.
+
+  $ make
+
+Result of the build
+-------------------
+
+After building, you should obtain this tree:
+
+output/images/
+    +-- vmlinux
+    +-- rootfs.cpio
+    +-- rootfs.tar
+
+How to run it
+=============
+
+Run
+---
+
+  Setup the Console with the rate 38400/8-N-1.
+
+  $ cd output/images
+  $ ../host/bin/nds32le-linux-gdb vmlinux
+  $ target remote [your host]
+  $ lo
+  $ c 

board/arcturus/aarch64-ucls1012a/post-build.sh

@@ -1,4 +1,5 @@
 #!/bin/sh
 
 mkdir -p ${TARGET_DIR}/lib/firmware
+cp -f ${BUILD_DIR}/linux-custom/firmware/ppfe/* ${TARGET_DIR}/lib/firmware/
 cp -f ${BUILD_DIR}/linux-custom/br2-ucls1012a.its ${BINARIES_DIR}/

board/arcturus/aarch64-ucls1012a/readme.txt

@@ -24,13 +24,13 @@ After building, you should obtain this tree:
 
     output/images/
     +-- arc-ucls1012a.dtb
-    +-- Image.gz
+    +-- Image
     +-- part0-000000.itb
     +-- rootfs.cpio
     +-- rootfs.cpio.gz
     +-- rootfs.tar
     +-- u-boot.bin
-    +-- br2-ucls1012a.its
+    +-- ucls1012a.its
 
 Flashing
 --------

board/arcturus/aarch64-ucls1012a/rootfs_overlay/etc/init.d/S09modload

@@ -0,0 +1,14 @@
+#!/bin/sh
+#
+case "$1" in
+       start)
+                modprobe pfe
+                ;;
+        stop)
+                ;;
+        restart|reload)
+                ;;
+        *)
+                echo "Usage: $0 {start|stop|restart}"
+                exit 1
+esac

board/arm/foundation-v8/readme.txt

@@ -3,18 +3,17 @@ ARM software simulator of the AArch64 architecture.
 
 First, one has to download the AArch64 software simulator from:
 
-  https://silver.arm.com/download/download.tm?pv=4807186
+  https://silver.arm.com/download/download.tm?pv=2663527
 
 Then, use the arm_foundationv8_defconfig configuration to build your
 Buildroot system.
 
 Finally, boot your system with:
 
- ${LOCATION_OF_FOUNDATIONV8_SIMULATOR}/models/Linux64_GCC-6.4/Foundation_Platform \
+ ${LOCATION_OF_FOUNDATIONV8_SIMULATOR}/models/Linux64_GCC-4.7/Foundation_Platform \
     --image output/images/linux-system.axf \
     --block-device output/images/rootfs.ext2 \
-    --network=nat \
-    --cores 4
+    --network=nat
 
 You can get network access from within the simulated environment
 by requesting an IP address using DHCP (run the command 'udhcpc').

board/arm/juno/linux-juno-defconfig

@@ -0,0 +1,169 @@
+CONFIG_SMP=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_FHANDLE=y
+CONFIG_AUDIT=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_MEMCG=y
+CONFIG_MEMCG_SWAP=y
+CONFIG_MEMCG_KMEM=y
+CONFIG_CGROUP_HUGETLB=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_PROFILING=y
+CONFIG_JUMP_LABEL=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_ARCH_VEXPRESS=y
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_HOST_GENERIC=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_HOTPLUG_PCI_PCIE=y
+CONFIG_HOTPLUG_PCI=y
+CONFIG_NR_CPUS=6
+CONFIG_PREEMPT=y
+CONFIG_KSM=y
+CONFIG_TRANSPARENT_HUGEPAGE=y
+CONFIG_CMA=y
+CONFIG_CMDLINE="console=ttyAMA0"
+CONFIG_COMPAT=y
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
+CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
+CONFIG_ARM_DT_BL_CPUFREQ=y
+CONFIG_ARM_SCPI_CPUFREQ=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_BPF_JIT=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_XGENE=y
+CONFIG_PATA_PLATFORM=y
+CONFIG_PATA_OF_PLATFORM=y
+CONFIG_NETDEVICES=y
+CONFIG_TUN=y
+CONFIG_SKY2=y
+CONFIG_SMC91X=y
+CONFIG_SMSC911X=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_SERIO_AMBAKMI=y
+CONFIG_LEGACY_PTY_COUNT=16
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_XILINX_PS_UART=y
+CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_I2C_SLAVE=y
+CONFIG_SPI=y
+CONFIG_SPI_PL022=y
+CONFIG_PTP_1588_CLOCK=m
+CONFIG_GPIO_PL061=y
+CONFIG_GPIO_XGENE=y
+CONFIG_POWER_RESET_XGENE=y
+CONFIG_POWER_RESET_SYSCON=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_VEXPRESS=m
+CONFIG_DRM=y
+CONFIG_DRM_I2C_NXP_TDA998X=y
+CONFIG_DRM_ARM=y
+CONFIG_DRM_HDLCD=y
+CONFIG_DRM_VIRTUAL_HDLCD=y
+CONFIG_FB_ARMCLCD=y
+CONFIG_LOGO=y
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_ISP1760=y
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_USB_ULPI=y
+CONFIG_MMC=y
+CONFIG_MMC_ARMMMCI=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SPI=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_EFI=y
+CONFIG_RTC_DRV_PL030=y
+CONFIG_RTC_DRV_PL031=y
+CONFIG_DMADEVICES=y
+CONFIG_PL330_DMA=y
+CONFIG_COMMON_CLK_SCPI=y
+CONFIG_ARM_TIMER_SP804=y
+CONFIG_MAILBOX=y
+CONFIG_ARM_MHU=y
+CONFIG_PHY_XGENE=y
+CONFIG_ARM_SCPI_PROTOCOL=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_FANOTIFY=y
+CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
+CONFIG_QUOTA=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_CUSE=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_HUGETLBFS=y
+CONFIG_EFIVAR_FS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_SECURITY=y
+CONFIG_CRYPTO_ANSI_CPRNG=y
+CONFIG_ARM64_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM64_CE=y
+CONFIG_CRYPTO_SHA2_ARM64_CE=y
+CONFIG_CRYPTO_GHASH_ARM64_CE=y
+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SOC=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_SND_DESIGNWARE_I2S=y
+CONFIG_CMA=y
+CONFIG_CMA_SIZE_MBYTES=64

board/arm/juno/readme.txt

@@ -0,0 +1,134 @@
+ARM Juno r1/r0
+
+Intro
+=====
+
+These instructions apply to all models of the ARM Juno:
+  - Juno r0 (does not support PCIe)
+  - Juno r1 (supports PCIe)
+  - Juno r2 (Big Cluster with A72)
+
+Buildroot will generate the kernel image, device tree blob, bootloader binaries
+and a minimal root filesystem.
+
+How to build it
+===============
+
+Configure Buildroot
+-------------------
+
+Configuring Buildroot is pretty simple, just execute:
+
+  $ make arm_juno_defconfig
+
+Build the rootfs, kernel and DTB
+--------------------------------
+
+Note: you will need to have access to the network, since Buildroot will
+download the packages' sources.
+
+You may now build your rootfs with:
+
+  $ make
+
+(This may take a while)
+
+Result of the build
+-------------------
+
+After building, you should obtain this tree:
+
+    output/images/
+    +-- rootfs.tar
+    +-- juno.dtb (if Juno r0 is used)
+    +-- juno-r1.dtb (if Juno r1 is used)
+    +-- juno-r2.dtb (if Juno r2 is used)
+    +-- Image
+    +-- bl1.bin
+    +-- bl2.bin
+    +-- bl2u.bin
+    +-- bl31.bin
+    +-- fip.bin
+    +-- scp-fw.bin
+    +-- u-boot.bin
+
+Preparing your rootfs
+======================
+
+Format your pen drive as a ext3 filesystem by executing:
+
+   $ mkfs.ext3 /dev/<your device>
+
+Preparing your rootfs
+======================
+
+Format your pen drive as a ext3 filesystem by executing:
+
+   $ mkfs.ext3 /dev/<your device>
+
+Installing your rootfs
+======================
+
+After mounting the pen drive please execute the following:
+
+   $ sudo tar -xvf output/images/rootfs.tar -C <pen drive mount path>
+
+When completed make sure to unmount the device:
+
+   $ umount <pen drive mount path>
+
+Insert the pen drive in one of the ARM Juno' USB type A connectors.
+
+Configure *.dtb in the boot configuration for Juno r0
+=====================================================
+
+SITE1/HBI0262B/images.txt
+.....
+NOR3UPDATE: AUTO                 ;Image Update:NONE/AUTO/FORCE
+NOR3ADDRESS: 0x00C00000          ;Image Flash Address
+NOR3FILE: \SOFTWARE\juno.dtb     ;Image File Name
+NOR3NAME: board.dtb              ;Specify Image name to preserve file extension
+NOR3LOAD: 00000000               ;Image Load Address
+NOR3ENTRY: 00000000              ;Image Entry Point
+......
+
+Configure *.dtb in the boot configuration for Juno r1
+=====================================================
+
+SITE1/HBI0262C/images.txt
+......
+NOR3UPDATE: AUTO                 ;Image Update:NONE/AUTO/FORCE
+NOR3ADDRESS: 0x00C00000          ;Image Flash Address
+NOR3FILE: \SOFTWARE\juno-r1.dtb  ;Image File Name
+NOR3NAME: board.dtb              ;Specify target filename to preserve file extension
+NOR3LOAD: 00000000               ;Image Load Address
+NOR3ENTRY: 00000000              ;Image Entry Point
+......
+
+Configure *.dtb in the boot configuration for Juno r2
+=====================================================
+
+SITE1/HBI0262D/images.txt
+......
+NOR3UPDATE: AUTO                 ;Image Update:NONE/AUTO/FORCE
+NOR3ADDRESS: 0x02000000          ;Image Flash Address
+NOR3FILE: \SOFTWARE\juno-r2.dtb  ;Image File Name
+NOR3NAME: board.dtb              ;Specify target filename to preserve file extension
+NOR3LOAD: 00000000               ;Image Load Address
+NOR3ENTRY: 00000000              ;Image Entry Point
+......
+
+Installing kernel image and DTB
+===============================
+
+1. Connect to the ARM Juno UART0 and execute USB_ON in the terminal
+2. Connect a USB cable between your PC and ARM Juno USB type B connector
+   A mass storage device should appear in your desktop.
+3. Open the software/ folder
+4. Copy the 'Image' file to software/
+5. Copy the 'juno-r1.dtb' (r1), 'juno.dtb' (r0) or juno-r2.dtb (r2) file to software/
+6. Copy the bootloader binaries (bl1.bin and fip.bin) to software/
+7. Press the red button in the front pannel of ARM Juno
+
+At this time, the board will erase the Flash entry for each new item and
+replace it with the lastest ones.

board/arrow/avenger96/overlay/boot/extlinux/extlinux.conf

@@ -1,4 +0,0 @@
-label stm32mp157c-dk2-buildroot
-  kernel /boot/zImage
-  devicetree /boot/stm32mp157a-dhcor-avenger96.dtb
-  append root=/dev/mmcblk1p4 rootwait

board/arrow/avenger96/readme.txt

@@ -1,41 +0,0 @@
-Arrow Avenger96
-
-Intro
-=====
-
-This configuration supports the Arrow Avenger96 board:
-
-https://wiki.dh-electronics.com/index.php/Avenger96
-
-How to build
-============
-
- $ make avenger96_defconfig
- $ make
-
-How to write the microSD card
-=============================
-
-WARNING! This will destroy all the card content. Use with care!
-
-Once the build process is finished you will have an image called
-"sdcard.img" in the output/images/ directory.
-
-Copy the bootable "sdcard.img" onto an microSD card with "dd":
-
-  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
-
-Boot the board
-==============
-
- (1) Configure the boot switches for boot from microsd: 1-0-1
-
- (2) Insert the microSD card in the slot
-
- (3) Plug a serial adapter (beware: 1v8 levels!) to the low speed
-     expansion connector
-
- (4) Plug in power cable
-
- (5) The system will start, with the console on UART, but also visible
-     on the screen.

board/aspeed/ast2500-evb/genimage.cfg

@@ -1,40 +0,0 @@
-#
-# This config reproduces the OpenBMC flash layout defined in Linux :
-#
-#    arch/arm/boot/dts/openbmc-flash-layout.dtsi
-#
-# and included by aspeed-ast2500-evb.dts
-#
-flash nor-32M-256 {
-	pebsize = 4K
-	numpebs = 8K
-	minimum-io-unit-size = 256
-}
-
-image flash.img {
-	flash {
-	}
-	flashtype = "nor-32M-256"
-
-	partition uboot {
-		image = "u-boot.bin"
-		size = 384K
-	}
-
-	partition ubootenv {
-		/* TODO */
-		offset = 384K
-		size = 128K
-	}
-
-	partition fitimage {
-		image = "image.itb"
-		offset = 512K
-		size = 4352K
-	}
-
-	partition spare {
-		offset = 4864K
-		size = 27904K
-	}
-}

board/aspeed/ast2500-evb/linux.fragment

@@ -1,7 +0,0 @@
-CONFIG_KERNEL_XZ=y
-CONFIG_ARCH_MULTI_V7=n
-CONFIG_MACH_ASPEED_G6=n
-CONFIG_SMP=n
-CONFIG_EXT4_FS=n
-CONFIG_DEBUG_FS=n
-CONFIG_SUSPEND=n

board/aspeed/ast2500-evb/readme.txt

@@ -1,80 +0,0 @@
-Aspeed AST2500 EVB
-
-Introduction
-============
-
-The AST2500 EVB is an evaluation board for the AST2500 SoC, most
-commonly used as a Server Management Processor. It includes an 800MHz
-ARM11 processor with DDR3 or DDR4 SDRAM (up to 1GB), SPI flash memory
-devices for BMC and host firmwares and numerous controllers to drive
-the server board.
-
-  https://www.aspeedtech.com/server_ast2500/
-
-How to build it
-===============
-
-Configure buildroot:
-
-  $ make aspeed_ast2500evb_defconfig
-
-Compile everything and build the rootfs image:
-
-  $ make
-
-Result of the build
-===================
-
-After building, the output/images directory contains:
-
-  output/images/
-    ├── aspeed-ast2500-evb.dtb
-    ├── flash.img
-    ├── image.itb
-    ├── rootfs.cpio
-    ├── rootfs.cpio.xz
-    ├── rootfs.tar
-    ├── u-boot.bin
-    └── zImage
-
-Flashing the image
-==================
-
-To update the contents of the first flash device, copy flash.img :
-
-  $ flashcp flash.img /dev/mtd0
-
-or simply the boot loader:
-
-  $ flashcp u-boot.bin /dev/mtd1
-
-Preparing the board
-===================
-
- * Connect a serial line to the board
- * Power-up the board
-
-Booting the board
-=================
-
-The AST2500 EVB boots from the SPI flash device directly and loads a
-first bootloader (usually U-Boot). U-Boot will attempt to load a Linux
-kernel from the same flash device by default but other storage could
-be used.
-
- * from U-Boot
-
-   The FIT image image.itb can be used to boot the board from U-Boot
-   using tftp
-
- * with QEMU
-
-   $ qemu-system-arm -M ast2500-evb \
-	-drive file=output/images/flash.img,format=raw,if=mtd \
-	-nographic
-
-   $ qemu-system-arm -M ast2500-evb \
-	-kernel output/images/zImage \
-	-initrd output/images/rootfs.cpio \
-	-dtb output/images/aspeed-ast2500-evb.dtb \
-	-nographic

board/aspeed/ast2500-evb/uboot.fragment

@@ -1,3 +0,0 @@
-CONFIG_BOOTCOMMAND="bootm 20080000"
-CONFIG_FIT=y
-CONFIG_SHA256=y

board/aspeed/ast2600-evb/genimage.cfg

@@ -1,40 +0,0 @@
-#
-# This config reproduces the OpenBMC flash layout defined in Linux :
-#
-#    arch/arm/boot/dts/openbmc-flash-layout-64.dtsi
-#
-# and included by aspeed-ast2600-evb.dts
-#
-flash nor-64M-256 {
-	pebsize = 4K
-	numpebs = 16K
-	minimum-io-unit-size = 256
-}
-
-image flash.img {
-	flash {
-	}
-	flashtype = "nor-64M-256"
-
-	partition uboot {
-		image = "u-boot.bin"
-		size = 896K
-	}
-
-	partition ubootenv {
-		/* TODO */
-		offset = 896K
-		size = 128K
-	}
-
-	partition fitimage {
-		image = "image.itb"
-		offset = 1M
-		size = 9M
-	}
-
-	partition spare {
-		offset = 10M
-		size = 54M
-	}
-}

board/aspeed/ast2600-evb/readme.txt

@@ -1,80 +0,0 @@
-Aspeed AST2600 EVB
-
-Introduction
-============
-
-The AST2600 EVB is an evaluation board for the AST2600 SoC, most
-commonly used as a Server Management Processor. It includes a
-Dual-core ARM Cortex A7 processor with DDR4 SDRAM (up to 2GB), SPI
-flash memory devices for BMC and host firmwares and numerous
-controllers to drive the server board.
-
-  https://www.aspeedtech.com/server_ast2600/
-
-How to build it
-===============
-
-Configure buildroot:
-
-  $ make aspeed_ast2600evb_defconfig
-
-Compile everything and build the rootfs image:
-
-  $ make
-
-Result of the build
-===================
-
-After building, the output/images directory contains:
-
-  output/images/
-    ├── aspeed-ast2600-evb.dtb
-    ├── flash.img
-    ├── image.itb
-    ├── rootfs.cpio
-    ├── rootfs.cpio.xz
-    ├── rootfs.tar
-    ├── u-boot.bin
-    └── zImage
-
-Flashing the image
-==================
-
-To update the contents of the first flash device, copy flash.img :
-
-  $ flashcp flash.img /dev/mtd0
-
-or simply the boot loader:
-
-  $ flashcp u-boot.bin /dev/mtd1
-
-Preparing the board
-===================
-
- * Connect a serial line to the board
- * Power-up the board
-
-Booting the board
-=================
-
-The AST2600 EVB boots from the SPI flash device directly and loads a
-first bootloader (usually U-Boot). U-Boot will attempt to load a Linux
-kernel from the same flash device by default but other storage could
-be used.
-
- * from U-Boot
-
-   The FIT image image.itb can be used to boot the board from U-Boot
-   using tftp
-
- * with QEMU
-
-   $ qemu-system-arm -M ast2600-evb \
-	-drive file=output/images/flash.img,format=raw,if=mtd \
-	-nographic
-
-   $ qemu-system-arm -M ast2600-evb \
-	-kernel output/images/zImage \
-	-initrd output/images/rootfs.cpio \
-	-dtb output/images/aspeed-ast2600-evb.dtb \
-	-nographic

board/aspeed/common/image.its.template

@@ -1,56 +0,0 @@
-/dts-v1/;
-
-/ {
-	description = "Kernel and buildroot image";
-	#address-cells = <1>;
-
-	images {
-		kernel-1 {
-			description = "Linux kernel";
-			data = /incbin/("zImage");
-			type = "kernel";
-			arch = "arm";
-			os = "linux";
-			compression = "none";
-			load = <0x80001000>;
-			entry = <0x80001000>;
-			hash-1 {
-				algo = "sha256";
-			};
-		};
-		fdt-1 {
-			description = "Flattened Device Tree blob";
-			data = /incbin/("%BOARD_DTB%");
-			type = "flat_dt";
-			arch = "arm";
-			compression = "none";
-			hash-1 {
-				algo = "sha256";
-			};
-		};
-		ramdisk-1 {
-			description = "ramdisk";
-			data = /incbin/("rootfs.cpio.xz");
-			type = "ramdisk";
-			arch = "arm";
-			os = "linux";
-			compression = "none";
-			hash-1 {
-				algo = "sha256";
-			};
-		};
-	};
-
-	configurations {
-		default = "conf-1";
-		conf-1 {
-			description = "Boot Linux kernel with FDT blob, ramdisk";
-			kernel = "kernel-1";
-			fdt = "fdt-1";
-			ramdisk = "ramdisk-1";
-			hash-1 {
-				algo = "sha256";
-			};
-		};
-	};
-};

board/aspeed/common/post-image.sh

@@ -1,27 +0,0 @@
-#!/bin/bash
-
-BOARD_DIR="$(dirname $0)"
-mkimage=$HOST_DIR/bin/mkimage
-
-BOARD_DT=$(sed -n \
-           's/^BR2_LINUX_KERNEL_INTREE_DTS_NAME="\([a-z0-9\-]*\).*"$/\1/p' \
-           ${BR2_CONFIG})
-
-sed -e "s/%BOARD_DTB%/${BOARD_DT}.dtb/" \
-    $BOARD_DIR/image.its.template > $BINARIES_DIR/image.its
-
-(cd $BINARIES_DIR && $mkimage -f image.its image.itb)
-
-GENIMAGE_CFG="board/aspeed/${BOARD_DT#aspeed-*}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage \
-  --rootpath "${TARGET_DIR}" \
-  --tmppath "${GENIMAGE_TMP}" \
-  --inputpath "${BINARIES_DIR}" \
-  --outputpath "${BINARIES_DIR}" \
-  --config "${GENIMAGE_CFG}"
-
-rm -f $BINARIES_DIR/image.its

board/asus/tinker/patches/uboot/0001-include-configs-Increase-CONFIG_SYS_BOOTM_LEN-to-16M.patch

@@ -0,0 +1,35 @@
+From 8ee2b03039cccf64402a72dea2185d7fe1972729 Mon Sep 17 00:00:00 2001
+From: Shyam Saini <shyam.saini@amarulasolutions.com>
+Date: Mon, 15 Apr 2019 16:16:16 +0530
+Subject: [PATCH] include: configs: Increase CONFIG_SYS_BOOTM_LEN to 16MB
+
+The default value of CONFIG_SYS_BOOTM_LEN is 0x800000 i.e, 8MB which
+causes board reset because of larger uImage size.
+
+Error log snippet:
+   Booting using the fdt blob at 0x1f00000
+   Loading Kernel Image ... Image too large: increase CONFIG_SYS_BOOTM_LEN
+Must RESET board to recover
+resetting ...
+
+Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
+---
+ include/configs/rk3288_common.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
+index 72a54bc0ab..eab7cf4d86 100644
+--- a/include/configs/rk3288_common.h
++++ b/include/configs/rk3288_common.h
+@@ -9,6 +9,8 @@
+ #include <asm/arch/hardware.h>
+ #include "rockchip-common.h"
+ 
++#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* 16MB */
++
+ #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+ #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+ #define CONFIG_SYS_CBSIZE		1024
+-- 
+2.11.0
+

board/atmel/at91sam9x5ek_mmc/genimage.cfg

@@ -17,7 +17,6 @@ image boot.vfat {
 			image = "uboot-env.bin"
 		}
 	}
-
 	size = 16M
 }
 

board/atmel/readme.txt

@@ -21,12 +21,6 @@ This guide covers the following configurations:
  - atmel_sama5d2_xplained_mmc_dev_defconfig
  - microchip_sama5d27_wlsom1_ek_mmc_defconfig
  - microchip_sama5d27_wlsom1_ek_mmc_dev_defconfig
- - microchip_sam9x60ek_mmc_defconfig
- - microchip_sam9x60ek_mmc_dev_defconfig
- - microchip_sama5d2_icp_mmc_defconfig
- - microchip_sama5d2_icp_mmc_dev_defconfig
- - microchip_sama7g5ek_mmc_defconfig
- - microchip_sama7g5ek_mmc_dev_defconfig
 
 These configurations will use AT91Bootstrap, u-boot and a linux kernel from
 the git trees maintained by Atmel.

board/atmel/sama5d27_som1_ek_mmc/genimage.cfg

@@ -9,7 +9,6 @@ image boot.vfat {
 			"u-boot.bin"
 		}
 	}
-
 	size = 16M
 }
 

board/atmel/sama5d27_wlsom1_ek_mmc/genimage.cfg

@@ -9,7 +9,6 @@ image boot.vfat {
 			"u-boot.bin"
 		}
 	}
-
 	size = 16M
 }
 

board/atmel/sama5d2_xplained_mmc/genimage.cfg

@@ -9,7 +9,6 @@ image boot.vfat {
 			"u-boot.bin"
 		}
 	}
-
 	size = 16M
 }
 

board/atmel/sama5d3_xplained_mmc/genimage.cfg

@@ -9,7 +9,6 @@ image boot.vfat {
 			"u-boot.bin"
 		}
 	}
-
 	size = 16M
 }
 

board/atmel/sama5d4_xplained_mmc/genimage.cfg

@@ -9,7 +9,6 @@ image boot.vfat {
 			"u-boot.bin"
 		}
 	}
-
 	size = 16M
 }
 

board/bananapi/bananapi-m1/boot.cmd

@@ -0,0 +1,7 @@
+setenv bootargs console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rootwait
+
+mmc dev 0
+fatload mmc 0 $kernel_addr_r zImage
+fatload mmc 0 $fdt_addr_r sun7i-a20-bananapi.dtb
+
+bootz $kernel_addr_r - $fdt_addr_r

board/bananapi/bananapi-m1/genimage.cfg

@@ -0,0 +1,33 @@
+image boot.vfat {
+	vfat {
+		files = {
+			"zImage",
+			"sun7i-a20-bananapi.dtb",
+			"boot.scr"
+		}
+	}
+	size = 64M
+}
+
+image sdcard.img {
+	hdimage {
+	}
+
+	partition u-boot {
+		in-partition-table = "no"
+		image = "u-boot-sunxi-with-spl.bin"
+		offset = 8192
+		size = 1040384 # 1MB - 8192
+	}
+
+	partition boot {
+		partition-type = 0xC
+		bootable = "true"
+		image = "boot.vfat"
+	}
+
+	partition rootfs {
+		partition-type = 0x83
+		image = "rootfs.ext4"
+	}
+}

board/bananapi/bananapi-m1/readme.txt

@@ -0,0 +1,37 @@
+Intro
+=====
+
+This default configuration will allow you to start experimenting with the
+buildroot environment for the Bananapi M1. With the current configuration
+it will bring-up the board, and allow access through the serial console.
+
+Bananapi M1 link:
+http://www.banana-pi.org/m1.html
+
+Wiki link:
+https://openedev.amarulasolutions.com/display/ODWIKI/Bananapi+M1
+
+This configuration uses U-Boot mainline and kernel mainline.
+
+How to build
+============
+
+    $ make bananapi_m1_defconfig
+    $ make
+
+Note: you will need access to the internet to download the required
+sources.
+
+How to write the SD card
+========================
+
+Once the build process is finished you will have an image called "sdcard.img"
+in the output/images/ directory.
+
+Copy the bootable "sdcard.img" onto an SD card with "dd":
+
+  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
+  $ sudo sync
+
+Insert the micro SDcard in your Bananapi M1 and power it up. The console
+is on the serial line, 115200 8N1.

board/bananapi/bananapi-m2-ultra/genimage.cfg

@@ -6,7 +6,6 @@ image boot.vfat {
 			"boot.scr"
 		}
 	}
-
 	size = 64M
 }
 
@@ -17,8 +16,8 @@ image sdcard.img {
 	partition u-boot {
 		in-partition-table = "no"
 		image = "u-boot-sunxi-with-spl.bin"
-		offset = 8K
-		size = 1016K # 1MB - 8KB
+		offset = 8192
+		size = 1040384 # 1MB - 8192
 	}
 
 	partition boot {

board/bananapi/bananapi-m2-zero/genimage.cfg

@@ -6,7 +6,6 @@ image boot.vfat {
 			"boot.scr"
 		}
 	}
-
 	size = 64M
 }
 
@@ -17,8 +16,8 @@ image sdcard.img {
 	partition u-boot {
 		in-partition-table = "no"
 		image = "u-boot-sunxi-with-spl.bin"
-		offset = 8K
-		size = 1016K # 1MB - 8KB
+		offset = 8192
+		size = 1040384 # 1MB - 8192
 	}
 
 	partition boot {

board/bananapi/bananapi-m64/boot.cmd

@@ -0,0 +1,6 @@
+setenv bootargs console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rootwait
+
+fatload mmc 0 $kernel_addr_r Image
+fatload mmc 0 $fdt_addr_r sun50i-a64-bananapi-m64.dtb
+
+booti $kernel_addr_r - $fdt_addr_r

board/bananapi/bananapi-m64/genimage.cfg

@@ -0,0 +1,39 @@
+image boot.vfat {
+	vfat {
+		files = {
+			"Image",
+			"sun50i-a64-bananapi-m64.dtb",
+			"boot.scr"
+		}
+	}
+	size = 64M
+}
+
+image sdcard.img {
+	hdimage {
+	}
+
+	partition spl {
+		in-partition-table = "no"
+		image = "sunxi-spl.bin"
+		offset = 8192
+	}
+
+	partition u-boot {
+		in-partition-table = "no"
+		image = "u-boot.itb"
+		offset = 40K
+		size = 1M # 1MB - 40K
+	}
+
+	partition boot {
+		partition-type = 0xC
+		bootable = "true"
+		image = "boot.vfat"
+	}
+
+	partition rootfs {
+		partition-type = 0x83
+		image = "rootfs.ext4"
+	}
+}

board/bananapi/bananapi-m64/readme.txt

@@ -0,0 +1,37 @@
+Intro
+=====
+
+This default configuration will allow you to start experimenting with the
+buildroot environment for the Bananapi M64. With the current configuration
+it will bring-up the board, and allow access through the serial console.
+
+Bananapi M64 link:
+http://www.banana-pi.org/m64.html
+
+Wiki link:
+https://openedev.amarulasolutions.com/display/ODWIKI/Bananapi+M64
+
+This configuration uses U-Boot mainline and kernel mainline.
+
+How to build
+============
+
+    $ make bananapi_m64_defconfig
+    $ make
+
+Note: you will need access to the internet to download the required
+sources.
+
+How to write the SD card
+========================
+
+Once the build process is finished you will have an image called "sdcard.img"
+in the output/images/ directory.
+
+Copy the bootable "sdcard.img" onto an SD card with "dd":
+
+  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
+  $ sudo sync
+
+Insert the micro SDcard in your Bananapi M64 and power it up. The console
+is on the serial line, 115200 8N1.

board/beagleboardx15/genimage.cfg

@@ -5,7 +5,6 @@ image boot.vfat {
 			"u-boot.img"
 		}
 	}
-
 	size = 4M
 }
 
@@ -16,7 +15,7 @@ image sdcard.img {
 	partition u-boot {
 		partition-type = 0xC
 		bootable = "true"
-		image = "boot.vfat"
+                image = "boot.vfat"
 	}
 
 	partition rootfs {

board/beaglebone/genimage.cfg

@@ -10,10 +10,8 @@ image boot.vfat {
 			"am335x-bone.dtb",
 			"am335x-boneblack.dtb",
 			"am335x-bonegreen.dtb",
-			"am335x-boneblack-wireless.dtb",
 		}
 	}
-
 	size = 16M
 }
 
@@ -24,7 +22,7 @@ image sdcard.img {
 	partition u-boot {
 		partition-type = 0xC
 		bootable = "true"
-		image = "boot.vfat"
+                image = "boot.vfat"
 	}
 
 	partition rootfs {

board/beaglebone/genimage_linux41.cfg

@@ -0,0 +1,32 @@
+image boot.vfat {
+	vfat {
+		files = {
+			"MLO",
+			"u-boot.img",
+			"zImage",
+			"uEnv.txt",
+			"am335x-evm.dtb",
+			"am335x-evmsk.dtb",
+			"am335x-bone.dtb",
+			"am335x-boneblack.dtb",
+		}
+	}
+	size = 16M
+}
+
+image sdcard.img {
+	hdimage {
+	}
+
+	partition u-boot {
+		partition-type = 0xC
+		bootable = "true"
+                image = "boot.vfat"
+	}
+
+	partition rootfs {
+		partition-type = 0x83
+		image = "rootfs.ext4"
+		size = 512M
+	}
+}

board/beagleboneai/genimage.cfg

@@ -8,7 +8,6 @@ image boot.vfat {
 			"uEnv.txt"
 		}
 	}
-
 	size = 16M
 }
 

board/beagleboneai/patches/uboot/0001-am57xx_evm-fixes.patch

@@ -1,839 +0,0 @@
-From 702ea30b462ba06f4fbee3393f0e6c19531f1e5f Mon Sep 17 00:00:00 2001
-From: Robert Nelson <robertcnelson@gmail.com>
-Date: Fri, 25 Jun 2021 11:33:25 -0500
-Subject: [PATCH] am57xx_evm-fixes
-
-Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
-[Patch from https://github.com/beagleboard/u-boot/commit/702ea30b462ba06f4fbee3393f0e6c19531f1e5f]
-Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
----
- arch/arm/mach-omap2/omap5/hw_data.c |   1 +
- board/ti/am57xx/board.c             | 167 +++++++++++-
- configs/am57xx_evm_defconfig        |  15 +-
- include/configs/ti_armv7_common.h   | 407 ++++++++++++++++++++++++++++
- include/configs/ti_omap5_common.h   |   5 +
- include/environment/ti/boot.h       |  32 ++-
- include/environment/ti/mmc.h        |  49 +++-
- 7 files changed, 651 insertions(+), 25 deletions(-)
-
-diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c
-index fa4e27063c..d5192b1671 100644
---- a/arch/arm/mach-omap2/omap5/hw_data.c
-+++ b/arch/arm/mach-omap2/omap5/hw_data.c
-@@ -421,6 +421,7 @@ void enable_basic_clocks(void)
- 		(*prcm)->cm_l4per_uart1_clkctrl,
- 		(*prcm)->cm_l4per_uart3_clkctrl,
- 		(*prcm)->cm_l4per_i2c1_clkctrl,
-+		(*prcm)->cm_l4per_i2c4_clkctrl,
- #ifdef CONFIG_DRIVER_TI_CPSW
- 		(*prcm)->cm_gmac_gmac_clkctrl,
- #endif
-diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
-index 73063faee6..ad05c41f22 100644
---- a/board/ti/am57xx/board.c
-+++ b/board/ti/am57xx/board.c
-@@ -41,6 +41,7 @@
- #include <mmc.h>
- #include <dm/uclass.h>
- #include <hang.h>
-+#include <i2c.h>
- 
- #include "../common/board_detect.h"
- #include "mux_data.h"
-@@ -528,8 +529,10 @@ void do_board_detect(void)
- 
- 	rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
- 				  CONFIG_EEPROM_CHIP_ADDRESS);
--	if (rc)
-+	if (rc) {
- 		printf("ti_i2c_eeprom_init failed %d\n", rc);
-+		ti_i2c_eeprom_am_set("BBONE-AI", "A");
-+	};
- 
- #ifdef CONFIG_SUPPORT_EMMC_BOOT
- 	rc = board_bootmode_has_emmc();
-@@ -579,6 +582,164 @@ void do_board_detect(void)
- 			 "Board: %s REV %s\n", bname, board_ti_get_rev());
- }
- 
-+struct am335x_cape_eeprom_id {
-+	unsigned int header;
-+	char eeprom_rev[2];
-+	char board_name[32];
-+	char version[4];
-+	char manufacture[16];
-+	char part_number[16];
-+	char number_of_pins[2];
-+	char serial_number[12];
-+	char pin_usage[140];
-+	char vdd_3v3exp[ 2];
-+	char vdd_5v[ 2];
-+	char sys_5v[2];
-+	char dc_supplied[2];
-+};
-+
-+#define CAPE_EEPROM_BUS_NUM 3
-+#define CAPE_EEPROM_ADDR0	0x54
-+#define CAPE_EEPROM_ADDR1	0x55
-+#define CAPE_EEPROM_ADDR2	0x56
-+#define CAPE_EEPROM_ADDR3	0x57
-+
-+#define CAPE_EEPROM_ADDR_LEN 0x10
-+
-+static int probe_cape_eeprom(struct am335x_cape_eeprom_id *cape_header)
-+{
-+	int ret;
-+	struct udevice *dev;
-+	unsigned char addr;
-+	/* /lib/firmware/BB-CAPE-DISP-CT4-00A0.dtbo */
-+	/* 14 + 16 + 1 + 4 + 5 = 40 */
-+	char hash_cape_overlay[40];
-+	char cape_overlay[26];
-+	char process_cape_part_number[16];
-+	char process_cape_version[4];
-+	char end_part_number;
-+	char cape_overlay_pass_to_kernel[18];
-+
-+	strlcpy(cape_overlay_pass_to_kernel, "", 1);
-+
-+	for ( addr = CAPE_EEPROM_ADDR0; addr <= CAPE_EEPROM_ADDR3; addr++ ) {
-+		ret = i2c_get_chip_for_busnum(CAPE_EEPROM_BUS_NUM, addr, 1, &dev);
-+		if (ret) {
-+			printf("BeagleBone Cape EEPROM: no EEPROM at address: 0x%x\n", addr);
-+		} else {
-+			printf("BeagleBone Cape EEPROM: found EEPROM at address: 0x%x\n", addr);
-+
-+			ret = i2c_set_chip_offset_len(dev, 2);
-+			if (ret) {
-+				printf("BeagleBone Cape EEPROM: i2c_set_chip_offset_len failure\n");
-+			}
-+
-+			ret = dm_i2c_read(dev, 0, (uchar *)cape_header, sizeof(struct am335x_cape_eeprom_id));
-+			if (ret) {
-+				printf("BeagleBone Cape EEPROM: Cannot read eeprom params\n");
-+			}
-+
-+			if (cape_header->header == 0xEE3355AA) {
-+				strlcpy(hash_cape_overlay, "/lib/firmware/", 14 + 1);
-+				strlcpy(cape_overlay, "", 2);
-+				strlcpy(cape_overlay_pass_to_kernel, "", 2);
-+				strlcpy(process_cape_part_number, "...............", 16 + 1);
-+				strlcpy(process_cape_version, "...", 4 + 1);
-+
-+				strlcpy(process_cape_part_number, cape_header->part_number, 16 + 1);
-+				printf("BeagleBone Cape EEPROM: debug part_number field:[%s]\n", process_cape_part_number);
-+
-+				//FIXME: some capes end with '.'
-+				if ( process_cape_part_number[15] == 0x2E ) {
-+					puts("debug: fixup, extra . in eeprom field\n");
-+					process_cape_part_number[15] = 0x00;
-+					if ( process_cape_part_number[14] == 0x2E ) {
-+						process_cape_part_number[14] = 0x00;
-+					}
-+				}
-+
-+				//Find ending 0x00 or 0xFF
-+				puts("BeagleBone Cape EEPROM: debug part_number field HEX:[");
-+				end_part_number=16;
-+				for ( int i=0; i <= 16; i++ ) {
-+					if (( process_cape_part_number[i] == 0x00 ) || ( process_cape_part_number[i] == 0xFF )) {
-+						end_part_number=i;
-+						i=17;
-+					} else {
-+						printf("%x", process_cape_part_number[i]);
-+					}
-+				}
-+				puts("]\n");
-+
-+				strncat(cape_overlay_pass_to_kernel, process_cape_part_number, end_part_number);
-+				strncat(cape_overlay_pass_to_kernel, ",", 1);
-+				//printf("debug: %s\n", cape_overlay_pass_to_kernel);
-+
-+				strncat(hash_cape_overlay, process_cape_part_number, end_part_number);
-+				strncat(cape_overlay, process_cape_part_number, end_part_number);
-+				//printf("debug: %s %s\n", hash_cape_overlay, cape_overlay);
-+
-+				strncat(hash_cape_overlay, "-", 1);
-+				strncat(cape_overlay, "-", 1);
-+				//printf("debug: %s %s\n", hash_cape_overlay, cape_overlay);
-+
-+				strlcpy(process_cape_version, cape_header->version, 4 + 1);
-+				//printf("debug: version field:[%s]\n", process_cape_version);
-+
-+				//Find invalid 0xFF -> 0x30 BBAI FAN Cape...
-+				puts("BeagleBone Cape EEPROM: debug version field HEX:[");
-+				for ( int i=0; i <= 3; i++ ) {
-+					printf("%x", process_cape_version[i]);
-+					if ( process_cape_version[i] == 0xFF ) {
-+						process_cape_version[i] = 0x30;
-+					}
-+				}
-+				puts("]\n");
-+
-+				strncat(hash_cape_overlay, process_cape_version, 4);
-+				strncat(cape_overlay, process_cape_version, 4);
-+				//printf("debug: %s %s\n", hash_cape_overlay, cape_overlay);
-+
-+				strncat(hash_cape_overlay, ".dtbo", 5);
-+				strncat(cape_overlay, ".dtbo", 5);
-+				//printf("debug: %s %s\n", hash_cape_overlay, cape_overlay);
-+
-+				printf("BeagleBone Cape EEPROM: 0x%x %s\n", addr, cape_overlay);
-+
-+				switch(addr) {
-+					case CAPE_EEPROM_ADDR0:
-+						env_set("uboot_overlay_addr0", cape_overlay);
-+						env_set("uboot_detected_capes_addr0", cape_overlay_pass_to_kernel);
-+						break;
-+					case CAPE_EEPROM_ADDR1:
-+						env_set("uboot_overlay_addr1", cape_overlay);
-+						env_set("uboot_detected_capes_addr1", cape_overlay_pass_to_kernel);
-+						break;
-+					case CAPE_EEPROM_ADDR2:
-+						env_set("uboot_overlay_addr2", cape_overlay);
-+						env_set("uboot_detected_capes_addr2", cape_overlay_pass_to_kernel);
-+						break;
-+					case CAPE_EEPROM_ADDR3:
-+						env_set("uboot_overlay_addr3", cape_overlay);
-+						env_set("uboot_detected_capes_addr3", cape_overlay_pass_to_kernel);
-+						break;
-+				}
-+				env_set("uboot_detected_capes", "1");
-+			} else {
-+				printf("BeagleBone Cape EEPROM: EEPROM contents not valid (or blank) on address: 0x%x\n", addr);
-+			}
-+		}
-+	}
-+	return 0;
-+}
-+
-+void do_cape_detect(void)
-+{
-+	struct am335x_cape_eeprom_id cape_header;
-+
-+	probe_cape_eeprom(&cape_header);
-+}
-+
- static void setup_board_eeprom_env(void)
- {
- 	char *name = "beagle_x15";
-@@ -782,8 +943,10 @@ int board_late_init(void)
- 	/* Just probe the potentially supported cdce913 device */
- 	uclass_get_device(UCLASS_CLK, 0, &dev);
- 
--	if (board_is_bbai())
-+	if (board_is_bbai()) {
- 		env_set("console", "ttyS0,115200n8");
-+		do_cape_detect();
-+	}
- 
- #if !defined(CONFIG_SPL_BUILD)
- 	board_ti_set_ethaddr(2);
-diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
-index 4da4aaa1c7..ed5b8aec16 100644
---- a/configs/am57xx_evm_defconfig
-+++ b/configs/am57xx_evm_defconfig
-@@ -10,16 +10,20 @@ CONFIG_SPL_TEXT_BASE=0x40300000
- CONFIG_OMAP54XX=y
- CONFIG_TARGET_AM57XX_EVM=y
- CONFIG_SPL=y
--CONFIG_ENV_OFFSET_REDUND=0x280000
- CONFIG_SPL_SPI_FLASH_SUPPORT=y
- CONFIG_SPL_SPI_SUPPORT=y
- CONFIG_ARMV7_LPAE=y
--CONFIG_DEFAULT_DEVICE_TREE="am572x-idk"
-+CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15-revc"
- CONFIG_AHCI=y
- CONFIG_DISTRO_DEFAULTS=y
- CONFIG_SPL_LOAD_FIT=y
- # CONFIG_USE_SPL_FIT_GENERATOR is not set
- CONFIG_OF_BOARD_SETUP=y
-+CONFIG_BOOTDELAY=1
-+CONFIG_AUTOBOOT_KEYED=y
-+CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
-+CONFIG_AUTOBOOT_DELAY_STR="d"
-+CONFIG_AUTOBOOT_STOP_STR=" "
- CONFIG_USE_BOOTARGS=y
- CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=beagle_x15board"
- # CONFIG_USE_BOOTCOMMAND is not set
-@@ -48,13 +52,12 @@ CONFIG_BOOTP_DNS2=y
- CONFIG_CMD_AVB=y
- CONFIG_OF_CONTROL=y
- CONFIG_SPL_OF_CONTROL=y
--CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am5729-beagleboneai am572x-idk am571x-idk am574x-idk"
-+CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am5729-beagleboneai"
- CONFIG_ENV_OVERWRITE=y
--CONFIG_ENV_IS_IN_MMC=y
--CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-+# CONFIG_ENV_IS_IN_FAT is not set
- CONFIG_SYS_RELOC_GD_ENV_ADDR=y
--CONFIG_SYS_MMC_ENV_DEV=1
- CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-+# CONFIG_SPL_ENV_IS_NOWHERE is not set
- CONFIG_VERSION_VARIABLE=y
- CONFIG_BOOTP_SEND_HOSTNAME=y
- CONFIG_DM=y
-diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
-index f13e9e5264..eabd03e27d 100644
---- a/include/configs/ti_armv7_common.h
-+++ b/include/configs/ti_armv7_common.h
-@@ -92,6 +92,413 @@
- #define CONFIG_SYS_I2C
- #endif
- 
-+#define EEPROM_PROGRAMMING \
-+	"eeprom_dump=i2c dev 0; " \
-+		"i2c md 0x50 0x00.2 20; " \
-+		"\0" \
-+	"eeprom_blank=i2c dev 0; " \
-+		"i2c mw 0x50 0x00.2 ff; " \
-+		"i2c mw 0x50 0x01.2 ff; " \
-+		"i2c mw 0x50 0x02.2 ff; " \
-+		"i2c mw 0x50 0x03.2 ff; " \
-+		"i2c mw 0x50 0x04.2 ff; " \
-+		"i2c mw 0x50 0x05.2 ff; " \
-+		"i2c mw 0x50 0x06.2 ff; " \
-+		"i2c mw 0x50 0x07.2 ff; " \
-+		"i2c mw 0x50 0x08.2 ff; " \
-+		"i2c mw 0x50 0x09.2 ff; " \
-+		"i2c mw 0x50 0x0a.2 ff; " \
-+		"i2c mw 0x50 0x0b.2 ff; " \
-+		"i2c mw 0x50 0x0c.2 ff; " \
-+		"i2c mw 0x50 0x0d.2 ff; " \
-+		"i2c mw 0x50 0x0e.2 ff; " \
-+		"i2c mw 0x50 0x0f.2 ff; " \
-+		"i2c mw 0x50 0x10.2 ff; " \
-+		"i2c mw 0x50 0x11.2 ff; " \
-+		"i2c mw 0x50 0x12.2 ff; " \
-+		"i2c mw 0x50 0x13.2 ff; " \
-+		"i2c mw 0x50 0x14.2 ff; " \
-+		"i2c mw 0x50 0x15.2 ff; " \
-+		"i2c mw 0x50 0x16.2 ff; " \
-+		"i2c mw 0x50 0x17.2 ff; " \
-+		"i2c mw 0x50 0x18.2 ff; " \
-+		"i2c mw 0x50 0x19.2 ff; " \
-+		"i2c mw 0x50 0x1a.2 ff; " \
-+		"i2c mw 0x50 0x1b.2 ff; " \
-+		"i2c mw 0x50 0x1c.2 ff; " \
-+		"i2c mw 0x50 0x1d.2 ff; " \
-+		"i2c mw 0x50 0x1e.2 ff; " \
-+		"i2c mw 0x50 0x1f.2 ff; " \
-+		"i2c md 0x50 0x00.2 20; " \
-+		"\0" \
-+	"eeprom_x15_b1=i2c dev 0; " \
-+		"i2c mw 0x50 0x00.2 aa; " \
-+		"i2c mw 0x50 0x01.2 55; " \
-+		"i2c mw 0x50 0x02.2 33; " \
-+		"i2c mw 0x50 0x03.2 ee; " \
-+		"i2c mw 0x50 0x04.2 42; " \
-+		"i2c mw 0x50 0x05.2 42; " \
-+		"i2c mw 0x50 0x06.2 52; " \
-+		"i2c mw 0x50 0x07.2 44; " \
-+		"i2c mw 0x50 0x08.2 58; " \
-+		"i2c mw 0x50 0x09.2 31; " \
-+		"i2c mw 0x50 0x0a.2 35; " \
-+		"i2c mw 0x50 0x0b.2 5f; " \
-+		"i2c mw 0x50 0x0c.2 42; " \
-+		"i2c mw 0x50 0x0d.2 2e; " \
-+		"i2c mw 0x50 0x0e.2 31; " \
-+		"i2c mw 0x50 0x0f.2 30; " \
-+		"i2c mw 0x50 0x10.2 57; " \
-+		"i2c mw 0x50 0x11.2 57; " \
-+		"i2c mw 0x50 0x12.2 59; " \
-+		"i2c mw 0x50 0x13.2 59; " \
-+		"i2c mw 0x50 0x14.2 34; " \
-+		"i2c mw 0x50 0x15.2 50; " \
-+		"i2c mw 0x50 0x16.2 35; " \
-+		"i2c mw 0x50 0x17.2 35; " \
-+		"i2c mw 0x50 0x18.2 30; " \
-+		"i2c mw 0x50 0x19.2 30; " \
-+		"i2c mw 0x50 0x1a.2 30; " \
-+		"i2c mw 0x50 0x1b.2 30; " \
-+		"i2c mw 0x50 0x1c.2 ff; " \
-+		"i2c mw 0x50 0x1d.2 ff; " \
-+		"i2c mw 0x50 0x1e.2 ff; " \
-+		"i2c mw 0x50 0x1f.2 ff; " \
-+		"i2c md 0x50 0x00.2 20; " \
-+		"\0" \
-+	"eeprom_x15_c=i2c dev 0; " \
-+		"i2c mw 0x50 0x00.2 aa; " \
-+		"i2c mw 0x50 0x01.2 55; " \
-+		"i2c mw 0x50 0x02.2 33; " \
-+		"i2c mw 0x50 0x03.2 ee; " \
-+		"i2c mw 0x50 0x04.2 42; " \
-+		"i2c mw 0x50 0x05.2 42; " \
-+		"i2c mw 0x50 0x06.2 52; " \
-+		"i2c mw 0x50 0x07.2 44; " \
-+		"i2c mw 0x50 0x08.2 58; " \
-+		"i2c mw 0x50 0x09.2 31; " \
-+		"i2c mw 0x50 0x0a.2 35; " \
-+		"i2c mw 0x50 0x0b.2 5f; " \
-+		"i2c mw 0x50 0x0c.2 43; " \
-+		"i2c mw 0x50 0x0d.2 2e; " \
-+		"i2c mw 0x50 0x0e.2 30; " \
-+		"i2c mw 0x50 0x0f.2 30; " \
-+		"i2c mw 0x50 0x10.2 79; " \
-+		"i2c mw 0x50 0x11.2 79; " \
-+		"i2c mw 0x50 0x12.2 77; " \
-+		"i2c mw 0x50 0x13.2 77; " \
-+		"i2c mw 0x50 0x14.2 50; " \
-+		"i2c mw 0x50 0x15.2 58; " \
-+		"i2c mw 0x50 0x16.2 31; " \
-+		"i2c mw 0x50 0x17.2 35; " \
-+		"i2c mw 0x50 0x18.2 6e; " \
-+		"i2c mw 0x50 0x19.2 6e; " \
-+		"i2c mw 0x50 0x1a.2 6e; " \
-+		"i2c mw 0x50 0x1b.2 6e; " \
-+		"i2c mw 0x50 0x1c.2 ff; " \
-+		"i2c mw 0x50 0x1d.2 ff; " \
-+		"i2c mw 0x50 0x1e.2 ff; " \
-+		"i2c mw 0x50 0x1f.2 ff; " \
-+		"i2c md 0x50 0x00.2 20; " \
-+	"eeprom_bbai_a2=i2c dev 0; " \
-+		"i2c mw 0x50 0x00.2 aa; " \
-+		"i2c mw 0x50 0x01.2 55; " \
-+		"i2c mw 0x50 0x02.2 33; " \
-+		"i2c mw 0x50 0x03.2 ee; " \
-+		"i2c mw 0x50 0x04.2 42; " \
-+		"i2c mw 0x50 0x05.2 42; " \
-+		"i2c mw 0x50 0x06.2 4F; " \
-+		"i2c mw 0x50 0x07.2 4E; " \
-+		"i2c mw 0x50 0x08.2 45; " \
-+		"i2c mw 0x50 0x09.2 2D; " \
-+		"i2c mw 0x50 0x0a.2 41; " \
-+		"i2c mw 0x50 0x0b.2 49; " \
-+		"i2c mw 0x50 0x0c.2 30; " \
-+		"i2c mw 0x50 0x0d.2 30; " \
-+		"i2c mw 0x50 0x0e.2 41; " \
-+		"i2c mw 0x50 0x0f.2 32; " \
-+		"i2c mw 0x50 0x10.2 57; " \
-+		"i2c mw 0x50 0x11.2 57; " \
-+		"i2c mw 0x50 0x12.2 59; " \
-+		"i2c mw 0x50 0x13.2 59; " \
-+		"i2c mw 0x50 0x14.2 53; " \
-+		"i2c mw 0x50 0x15.2 42; " \
-+		"i2c mw 0x50 0x16.2 41; " \
-+		"i2c mw 0x50 0x17.2 49; " \
-+		"i2c mw 0x50 0x18.2 30; " \
-+		"i2c mw 0x50 0x19.2 30; " \
-+		"i2c mw 0x50 0x1a.2 30; " \
-+		"i2c mw 0x50 0x1b.2 30; " \
-+		"i2c mw 0x50 0x1c.2 30; " \
-+		"i2c mw 0x50 0x1d.2 30; " \
-+		"i2c mw 0x50 0x1e.2 ff; " \
-+		"i2c mw 0x50 0x1f.2 ff; " \
-+		"i2c md 0x50 0x00.2 20; " \
-+		"\0" \
-+
-+#define EEWIKI_MMC_BOOT \
-+	"mmc_boot=${devtype} dev ${mmcdev}; ${devtype} part; " \
-+		"if ${devtype} rescan; then " \
-+			"echo Scanning ${devtype} device ${mmcdev};" \
-+			"setenv bootpart ${mmcdev}:1; " \
-+			"echo Checking for: /uEnv.txt ...;" \
-+			"if test -e ${devtype} ${bootpart} /uEnv.txt; then " \
-+				"load ${devtype} ${bootpart} ${loadaddr} /uEnv.txt;" \
-+				"env import -t ${loadaddr} ${filesize};" \
-+				"echo Loaded environment from /uEnv.txt;" \
-+				"echo Checking if uenvcmd is set ...;" \
-+				"if test -n ${uenvcmd}; then " \
-+					"echo Running uenvcmd ...;" \
-+					"run uenvcmd;" \
-+				"fi;" \
-+			"fi; " \
-+			"echo Checking for: /boot/uEnv.txt ...;" \
-+			"for i in 1 2 3 4 5 6 7 ; do " \
-+				"setenv mmcpart ${i};" \
-+				"setenv bootpart ${mmcdev}:${mmcpart};" \
-+				"if test -e ${devtype} ${bootpart} /boot/uEnv.txt; then " \
-+					"load ${devtype} ${bootpart} ${loadaddr} /boot/uEnv.txt;" \
-+					"env import -t ${loadaddr} ${filesize};" \
-+					"echo Loaded environment from /boot/uEnv.txt;" \
-+					"if test -n ${dtb}; then " \
-+						"setenv fdtfile ${dtb};" \
-+						"echo debug: [dtb=${fdtfile}] ...;" \
-+					"fi;" \
-+					"echo Checking if uname_r is set in /boot/uEnv.txt ...;" \
-+					"if test -n ${uname_r}; then " \
-+						"echo debug: [uname_r=${uname_r}] ...;" \
-+						"setenv oldroot /dev/mmcblk${mmcdev}p${mmcpart};" \
-+						"run uname_boot;" \
-+					"fi;" \
-+				"fi;" \
-+			"done;" \
-+		"fi;\0" \
-+
-+#define EEWIKI_SCSI_BOOT \
-+	"scsi_boot=${devtype} reset ; " \
-+		"if ${devtype} dev ${mmcdev}; then " \
-+			"echo Scanning ${devtype} device ${mmcdev};" \
-+			"setenv bootpart ${mmcdev}:1; " \
-+			"echo Checking for: /uEnv.txt ...;" \
-+			"if test -e ${devtype} ${bootpart} /uEnv.txt; then " \
-+				"load ${devtype} ${bootpart} ${loadaddr} /uEnv.txt;" \
-+				"env import -t ${loadaddr} ${filesize};" \
-+				"echo Loaded environment from /uEnv.txt;" \
-+				"echo Checking if uenvcmd is set ...;" \
-+				"if test -n ${uenvcmd}; then " \
-+					"echo Running uenvcmd ...;" \
-+					"run uenvcmd;" \
-+				"fi;" \
-+			"fi; " \
-+			"echo Checking for: /boot/uEnv.txt ...;" \
-+			"for i in 1 2 3 4 ; do " \
-+				"setenv mmcpart ${i};" \
-+				"setenv bootpart ${mmcdev}:${mmcpart};" \
-+				"if test -e ${devtype} ${bootpart} /boot/uEnv.txt; then " \
-+					"load ${devtype} ${bootpart} ${loadaddr} /boot/uEnv.txt;" \
-+					"env import -t ${loadaddr} ${filesize};" \
-+					"echo Loaded environment from /boot/uEnv.txt;" \
-+					"if test -n ${dtb}; then " \
-+						"setenv fdtfile ${dtb};" \
-+						"echo debug: [dtb=${fdtfile}] ...;" \
-+					"fi;" \
-+					"echo Checking if uname_r is set in /boot/uEnv.txt ...;" \
-+					"if test -n ${uname_r}; then " \
-+						"echo debug: [uname_r=${uname_r}] ...;" \
-+						"setenv oldroot /dev/sda${mmcpart};" \
-+						"run uname_boot;" \
-+					"fi;" \
-+				"fi;" \
-+			"done;" \
-+		"fi;\0" \
-+
-+#define EEWIKI_USB_BOOT \
-+	"usb_boot=${devtype} reset ; " \
-+		"if ${devtype} dev ${mmcdev}; then " \
-+			"echo Scanning ${devtype} device ${mmcdev};" \
-+			"setenv bootpart ${mmcdev}:1; " \
-+			"echo Checking for: /uEnv.txt ...;" \
-+			"if test -e ${devtype} ${bootpart} /uEnv.txt; then " \
-+				"load ${devtype} ${bootpart} ${loadaddr} /uEnv.txt;" \
-+				"env import -t ${loadaddr} ${filesize};" \
-+				"echo Loaded environment from /uEnv.txt;" \
-+				"echo Checking if uenvcmd is set in /uEnv.txt ...;" \
-+				"if test -n ${uenvcmd}; then " \
-+					"echo Running uenvcmd ...;" \
-+					"run uenvcmd;" \
-+				"fi;" \
-+			"fi; " \
-+			"echo Checking for: /boot/uEnv.txt ...;" \
-+			"for i in 1 2 3 4 ; do " \
-+				"setenv mmcpart ${i};" \
-+				"setenv bootpart ${mmcdev}:${mmcpart};" \
-+				"if test -e ${devtype} ${bootpart} /boot/uEnv.txt; then " \
-+					"load ${devtype} ${bootpart} ${loadaddr} /boot/uEnv.txt;" \
-+					"env import -t ${loadaddr} ${filesize};" \
-+					"echo Loaded environment from /boot/uEnv.txt;" \
-+					"if test -n ${dtb}; then " \
-+						"setenv fdtfile ${dtb};" \
-+						"echo debug: [dtb=${fdtfile}] ...;" \
-+					"fi;" \
-+					"echo Checking if uname_r is set in /boot/uEnv.txt ...;" \
-+					"if test -n ${uname_r}; then " \
-+						"echo debug: [uname_r=${uname_r}] ...;" \
-+						"setenv oldroot /dev/sda${mmcpart};" \
-+						"run uname_boot;" \
-+					"fi;" \
-+				"fi;" \
-+			"done;" \
-+		"fi;\0" \
-+
-+#define EEWIKI_UNAME_BOOT \
-+	"uname_boot="\
-+		"setenv bootdir /boot; " \
-+		"setenv bootfile vmlinuz-${uname_r}; " \
-+		"if test -e ${devtype} ${bootpart} ${bootdir}/${bootfile}; then " \
-+			"echo loading ${bootdir}/${bootfile} ...; "\
-+			"run loadimage;" \
-+			"setenv fdtdir /boot/dtbs/${uname_r}; " \
-+			"if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \
-+				"run loadfdt;" \
-+			"else " \
-+				"setenv fdtdir /usr/lib/linux-image-${uname_r}; " \
-+				"if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \
-+					"run loadfdt;" \
-+				"else " \
-+					"setenv fdtdir /lib/firmware/${uname_r}/device-tree; " \
-+					"if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \
-+						"run loadfdt;" \
-+					"else " \
-+						"setenv fdtdir /boot/dtb-${uname_r}; " \
-+						"if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \
-+							"run loadfdt;" \
-+						"else " \
-+							"setenv fdtdir /boot/dtbs; " \
-+							"if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \
-+								"run loadfdt;" \
-+							"else " \
-+								"setenv fdtdir /boot/dtb; " \
-+								"if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \
-+									"run loadfdt;" \
-+								"else " \
-+									"setenv fdtdir /boot; " \
-+									"if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \
-+										"run loadfdt;" \
-+									"else " \
-+										"echo; echo unable to find ${fdtfile} ...; echo booting legacy ...;"\
-+										"run args_mmc;" \
-+										"echo debug: [${bootargs}] ... ;" \
-+										"echo debug: [bootz ${loadaddr}] ... ;" \
-+										"bootz ${loadaddr}; " \
-+									"fi;" \
-+								"fi;" \
-+							"fi;" \
-+						"fi;" \
-+					"fi;" \
-+				"fi;" \
-+			"fi; " \
-+			"if test -n ${enable_uboot_overlays}; then " \
-+				"setenv fdt_buffer 0x60000;" \
-+				"if test -n ${uboot_fdt_buffer}; then " \
-+					"setenv fdt_buffer ${uboot_fdt_buffer};" \
-+				"fi;" \
-+				"echo uboot_overlays: [fdt_buffer=${fdt_buffer}] ... ;" \
-+				"if test -n ${uboot_overlay_addr0}; then " \
-+					"if test -n ${disable_uboot_overlay_addr0}; then " \
-+						"echo uboot_overlays: uboot loading of [${uboot_overlay_addr0}] disabled by /boot/uEnv.txt [disable_uboot_overlay_addr0=1]...;" \
-+					"else " \
-+						"setenv uboot_overlay ${uboot_overlay_addr0}; " \
-+						"run virtualloadoverlay;" \
-+					"fi;" \
-+				"fi;" \
-+				"if test -n ${uboot_overlay_addr1}; then " \
-+					"if test -n ${disable_uboot_overlay_addr1}; then " \
-+						"echo uboot_overlays: uboot loading of [${uboot_overlay_addr1}] disabled by /boot/uEnv.txt [disable_uboot_overlay_addr1=1]...;" \
-+					"else " \
-+						"setenv uboot_overlay ${uboot_overlay_addr1}; " \
-+						"run virtualloadoverlay;" \
-+					"fi;" \
-+				"fi;" \
-+				"if test -n ${uboot_overlay_addr2}; then " \
-+					"if test -n ${disable_uboot_overlay_addr2}; then " \
-+						"echo uboot_overlays: uboot loading of [${uboot_overlay_addr2}] disabled by /boot/uEnv.txt [disable_uboot_overlay_addr2=1]...;" \
-+					"else " \
-+						"setenv uboot_overlay ${uboot_overlay_addr2}; " \
-+						"run virtualloadoverlay;" \
-+					"fi;" \
-+				"fi;" \
-+				"if test -n ${uboot_overlay_addr3}; then " \
-+					"if test -n ${disable_uboot_overlay_addr3}; then " \
-+						"echo uboot_overlays: uboot loading of [${uboot_overlay_addr3}] disabled by /boot/uEnv.txt [disable_uboot_overlay_addr3=1]...;" \
-+					"else " \
-+						"setenv uboot_overlay ${uboot_overlay_addr3}; " \
-+						"run virtualloadoverlay;" \
-+					"fi;" \
-+				"fi;" \
-+				"if test -n ${uboot_overlay_addr4}; then " \
-+					"setenv uboot_overlay ${uboot_overlay_addr4}; " \
-+					"run virtualloadoverlay;" \
-+				"fi;" \
-+				"if test -n ${uboot_overlay_addr5}; then " \
-+					"setenv uboot_overlay ${uboot_overlay_addr5}; " \
-+					"run virtualloadoverlay;" \
-+				"fi;" \
-+				"if test -n ${uboot_overlay_addr6}; then " \
-+					"setenv uboot_overlay ${uboot_overlay_addr6}; " \
-+					"run virtualloadoverlay;" \
-+				"fi;" \
-+				"if test -n ${uboot_overlay_addr7}; then " \
-+					"setenv uboot_overlay ${uboot_overlay_addr7}; " \
-+					"run virtualloadoverlay;" \
-+				"fi;" \
-+				"if test -n ${uboot_overlay_pru}; then " \
-+					"setenv uboot_overlay ${uboot_overlay_pru}; " \
-+					"run virtualloadoverlay;" \
-+				"fi;" \
-+			"else " \
-+				"echo uboot_overlays: add [enable_uboot_overlays=1] to /boot/uEnv.txt to enable...;" \
-+			"fi;" \
-+			"setenv rdfile initrd.img-${uname_r}; " \
-+			"if test -e ${devtype} ${bootpart} ${bootdir}/${rdfile}; then " \
-+				"echo loading ${bootdir}/${rdfile} ...; "\
-+				"run loadrd;" \
-+				"if test -n ${netinstall_enable}; then " \
-+					"run args_netinstall; run message;" \
-+					"echo debug: [${bootargs}] ... ;" \
-+					"echo debug: [bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}] ... ;" \
-+					"bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}; " \
-+				"fi;" \
-+				"if test -n ${uenv_root}; then " \
-+					"run args_uenv_root;" \
-+					"echo debug: [${bootargs}] ... ;" \
-+					"echo debug: [bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}] ... ;" \
-+					"bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}; " \
-+				"fi;" \
-+				"if test -n ${uuid}; then " \
-+					"run args_mmc_uuid;" \
-+					"echo debug: [${bootargs}] ... ;" \
-+					"echo debug: [bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}] ... ;" \
-+					"bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}; " \
-+				"else " \
-+					"run args_mmc_old;" \
-+					"echo debug: [${bootargs}] ... ;" \
-+					"echo debug: [bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}] ... ;" \
-+					"bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}; " \
-+				"fi;" \
-+			"else " \
-+				"if test -n ${uenv_root}; then " \
-+					"run args_uenv_root;" \
-+					"echo debug: [${bootargs}] ... ;" \
-+					"echo debug: [bootz ${loadaddr} - ${fdtaddr}] ... ;" \
-+					"bootz ${loadaddr} - ${fdtaddr}; " \
-+				"fi;" \
-+				"run args_mmc_old;" \
-+				"echo debug: [${bootargs}] ... ;" \
-+				"echo debug: [bootz ${loadaddr} - ${fdtaddr}] ... ;" \
-+				"bootz ${loadaddr} - ${fdtaddr}; " \
-+			"fi;" \
-+		"fi;\0" \
-+
- /*
-  * The following are general good-enough settings for U-Boot.  We set a
-  * large malloc pool as we generally have a lot of DDR, and we opt for
-diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h
-index de0a6af2fd..0cd2ccea03 100644
---- a/include/configs/ti_omap5_common.h
-+++ b/include/configs/ti_omap5_common.h
-@@ -64,6 +64,11 @@
- 	DEFAULT_FIT_TI_ARGS \
- 	DEFAULT_COMMON_BOOT_TI_ARGS \
- 	DEFAULT_FDT_TI_ARGS \
-+	EEWIKI_USB_BOOT \
-+	EEWIKI_SCSI_BOOT \
-+	EEWIKI_MMC_BOOT \
-+	EEWIKI_UNAME_BOOT \
-+	EEPROM_PROGRAMMING \
- 	DFUARGS \
- 	NETARGS \
- 	NANDARGS \
-diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h
-index a9d8f28d46..1480b6e3df 100644
---- a/include/environment/ti/boot.h
-+++ b/include/environment/ti/boot.h
-@@ -132,6 +132,7 @@
- 	"bootpart=0:2\0" \
- 	"bootdir=/boot\0" \
- 	"bootfile=zImage\0" \
-+	"board_eeprom_header=undefined\0" \
- 	"usbtty=cdc_acm\0" \
- 	"vram=16M\0" \
- 	AVB_VERIFY_CMD \
-@@ -183,7 +184,14 @@
- 		"else " \
- 			"echo $apart partition not found; " \
- 			"exit; " \
--		"fi;\0"
-+		"fi;\0 " \
-+	"read_board_eeprom=" \
-+		"if test $board_eeprom_header = beagle_x15_revb1_blank; then " \
-+			"run eeprom_dump; run eeprom_x15_b1; reset; fi; " \
-+		"if test $board_eeprom_header = beagle_x15_revc_blank; then " \
-+			"run eeprom_dump; run eeprom_x15_c; reset; fi; " \
-+		"if test $board_eeprom_header = bbai_a2_blank; then " \
-+			"run eeprom_dump; run eeprom_bbai_a2; reset; fi;  \0 "
- 
- #ifdef CONFIG_OMAP54XX
- 
-@@ -223,19 +231,17 @@
- 			"echo WARNING: Could not determine device tree to use; fi; \0"
- 
- #define CONFIG_BOOTCOMMAND \
--	"if test ${dofastboot} -eq 1; then " \
--		"echo Boot fastboot requested, resetting dofastboot ...;" \
--		"setenv dofastboot 0; saveenv;" \
--		FASTBOOT_CMD \
--	"fi;" \
--	"if test ${boot_fit} -eq 1; then "	\
--		"run update_to_fit;"	\
--	"fi;"	\
-+	"run read_board_eeprom; " \
- 	"run findfdt; " \
--	"run envboot; " \
--	"run mmcboot;" \
--	"run emmc_linux_boot; " \
--	"run emmc_android_boot; " \
-+	"setenv mmcdev 0; " \
-+	"setenv devtype usb; " \
-+	"echo usb_boot is currently disabled;" \
-+	"setenv devtype scsi; " \
-+	"echo scsi_boot is currently disabled;" \
-+	"setenv devtype mmc; " \
-+	"run mmc_boot;" \
-+	"setenv mmcdev 1; " \
-+	"run mmc_boot;" \
- 	""
- 
- #endif /* CONFIG_OMAP54XX */
-diff --git a/include/environment/ti/mmc.h b/include/environment/ti/mmc.h
-index b86c8dc7a4..0ec09f279a 100644
---- a/include/environment/ti/mmc.h
-+++ b/include/environment/ti/mmc.h
-@@ -11,11 +11,31 @@
- #define DEFAULT_MMC_TI_ARGS \
- 	"mmcdev=0\0" \
- 	"mmcrootfstype=ext4 rootwait\0" \
--	"finduuid=part uuid mmc ${bootpart} uuid\0" \
-+	"finduuid=part uuid ${devtype} ${bootpart} uuid\0" \
- 	"args_mmc=run finduuid;setenv bootargs console=${console} " \
- 		"${optargs} " \
--		"root=PARTUUID=${uuid} rw " \
--		"rootfstype=${mmcrootfstype}\0" \
-+		"root=PARTUUID=${uuid} ro " \
-+		"rootfstype=${mmcrootfstype} " \
-+		"${cmdline}\0" \
-+	"args_mmc_old=setenv bootargs console=${console} " \
-+		"${optargs} " \
-+		"root=${oldroot} ro " \
-+		"rootfstype=${mmcrootfstype} " \
-+		"${cmdline}\0" \
-+	"args_mmc_uuid=setenv bootargs console=${console} " \
-+		"${optargs} " \
-+		"root=UUID=${uuid} ro " \
-+		"rootfstype=${mmcrootfstype} " \
-+		"${cmdline}\0" \
-+	"args_uenv_root=setenv bootargs console=${console} " \
-+		"${optargs} " \
-+		"root=${uenv_root} ro " \
-+		"rootfstype=${mmcrootfstype} " \
-+		"${musb} ${cmdline}\0" \
-+	"args_netinstall=setenv bootargs ${netinstall_bootargs} " \
-+		"${optargs} " \
-+		"root=/dev/ram rw " \
-+		"${cmdline}\0" \
- 	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
- 	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
- 		"source ${loadaddr}\0" \
-@@ -24,7 +44,28 @@
- 		"env import -t ${loadaddr} ${filesize}\0" \
- 	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}\0" \
- 	"loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
--	"loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
-+	"loadrd=load ${devtype} ${bootpart} ${rdaddr} ${bootdir}/${rdfile}; setenv rdsize ${filesize}\0" \
-+	"loadfdt=echo loading ${fdtdir}/${fdtfile} ...; load ${devtype} ${bootpart} ${fdtaddr} ${fdtdir}/${fdtfile}\0" \
-+	"loadoverlay=echo uboot_overlays: loading ${actual_uboot_overlay} ...; " \
-+		"load ${devtype} ${bootpart} ${rdaddr} ${actual_uboot_overlay}; " \
-+		"fdt addr ${fdtaddr}; fdt resize ${fdt_buffer}; " \
-+		"fdt apply ${rdaddr}; fdt resize ${fdt_buffer};\0" \
-+	"virtualloadoverlay=if test -e ${devtype} ${bootpart} ${fdtdir}/overlays/${uboot_overlay}; then " \
-+				"setenv actual_uboot_overlay ${fdtdir}/overlays/${uboot_overlay}; " \
-+				"run loadoverlay;" \
-+			"else " \
-+				"if test -e ${devtype} ${bootpart} /lib/firmware/${uboot_overlay}; then " \
-+					"setenv actual_uboot_overlay /lib/firmware/${uboot_overlay}; " \
-+					"run loadoverlay;" \
-+				"else " \
-+					"if test -e ${devtype} ${bootpart} ${uboot_overlay}; then " \
-+						"setenv actual_uboot_overlay ${uboot_overlay}; " \
-+						"run loadoverlay;" \
-+					"else " \
-+						"echo uboot_overlays: unable to find [${devtype} ${bootpart} ${uboot_overlay}]...;" \
-+					"fi;" \
-+				"fi;" \
-+			"fi;\0" \
- 	"envboot=mmc dev ${mmcdev}; " \
- 		"if mmc rescan; then " \
- 			"echo SD/MMC found on device ${mmcdev};" \
--- 
-2.20.1
-