mirror of
https://github.com/openRuyi-Project/gcc.git
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xtensa: Rework 'setmemsi' insn pattern
In order to reject voodoo estimation logic with lots of magic numbers, this patch revises the code to measure the costs of the three memset methods based on the actual emission size of the insn sequence corresponding to each method and choose the smallest one. gcc/ChangeLog: * config/xtensa/xtensa-protos.h (xtensa_expand_block_set_unrolled_loop, xtensa_expand_block_set_small_loop): Remove. (xtensa_expand_block_set): New prototype. * config/xtensa/xtensa.cc (xtensa_expand_block_set_libcall): New subfunction. (xtensa_expand_block_set_unrolled_loop, xtensa_expand_block_set_small_loop): Rewrite as subfunctions. (xtensa_expand_block_set): New function that calls the above subfunctions. * config/xtensa/xtensa.md (memsetsi): Change to invoke only xtensa_expand_block_set().
This commit is contained in:
Takayuki 'January June' Suwa
committed by
Max Filippov
Max Filippov
parent
9b867c8281
commit
78648c09a0
@@ -42,8 +42,7 @@ extern void xtensa_expand_conditional_branch (rtx *, machine_mode);
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extern int xtensa_expand_conditional_move (rtx *, int);
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extern int xtensa_expand_scc (rtx *, machine_mode);
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extern int xtensa_expand_block_move (rtx *);
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extern int xtensa_expand_block_set_unrolled_loop (rtx *);
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extern int xtensa_expand_block_set_small_loop (rtx *);
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extern int xtensa_expand_block_set (rtx *);
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extern void xtensa_split_operand_pair (rtx *, machine_mode);
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extern int xtensa_constantsynth (rtx, HOST_WIDE_INT);
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extern int xtensa_emit_move_sequence (rtx *, machine_mode);
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+171
-150
@@ -57,6 +57,7 @@ along with GCC; see the file COPYING3. If not see
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#include "rtl-iter.h"
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#include "insn-attr.h"
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#include "tree-pass.h"
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#include "print-rtl.h"
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/* This file should be included last. */
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#include "target-def.h"
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@@ -1530,77 +1531,61 @@ xtensa_expand_block_move (rtx *operands)
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}
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/* Try to expand a block set operation to a sequence of RTL move
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instructions. If not optimizing, or if the block size is not a
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constant, or if the block is too large, or if the value to
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initialize the block with is not a constant, the expansion
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fails and GCC falls back to calling memset().
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/* Worker function for xtensa_expand_block_set().
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operands[0] is the destination
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operands[1] is the length
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operands[2] is the initialization value
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operands[3] is the alignment */
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Expand into an insn sequence that calls the "memset" function. */
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static int
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xtensa_sizeof_MOVI (HOST_WIDE_INT imm)
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static rtx_insn *
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xtensa_expand_block_set_libcall (rtx dst_mem,
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HOST_WIDE_INT value,
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HOST_WIDE_INT bytes)
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{
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return (TARGET_DENSITY && IN_RANGE (imm, -32, 95)) ? 2 : 3;
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rtx reg;
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rtx_insn *seq;
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start_sequence ();
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reg = XEXP (dst_mem, 0);
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if (! REG_P (reg))
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reg = XEXP (replace_equiv_address (dst_mem,
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force_reg (Pmode, reg)), 0);
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emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memset"),
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LCT_NORMAL, VOIDmode,
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reg, SImode,
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GEN_INT (value), SImode,
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GEN_INT (bytes), SImode);
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seq = get_insns ();
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end_sequence ();
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return seq;
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}
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int
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xtensa_expand_block_set_unrolled_loop (rtx *operands)
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/* Worker function for xtensa_expand_block_set().
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Expand into an insn sequence of one constant load followed by multiple
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memory stores. Returns NULL if the conditions for expansion are not
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met. */
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static rtx_insn *
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xtensa_expand_block_set_unrolled_loop (rtx dst_mem,
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HOST_WIDE_INT value,
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HOST_WIDE_INT bytes,
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HOST_WIDE_INT align)
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{
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rtx dst_mem = operands[0];
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HOST_WIDE_INT bytes, value, align;
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int expand_len, funccall_len;
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rtx x, reg;
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rtx reg;
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int offset;
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rtx_insn *seq;
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if (!CONST_INT_P (operands[1]) || !CONST_INT_P (operands[2]))
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return 0;
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if (bytes > 64)
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return NULL;
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bytes = INTVAL (operands[1]);
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if (bytes <= 0)
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return 0;
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value = (int8_t)INTVAL (operands[2]);
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align = INTVAL (operands[3]);
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if (align > MOVE_MAX)
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align = MOVE_MAX;
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start_sequence ();
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/* Insn expansion: holding the init value.
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Either MOV(.N) or L32R w/litpool. */
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if (align == 1)
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expand_len = xtensa_sizeof_MOVI (value);
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else if (value == 0 || value == -1)
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expand_len = TARGET_DENSITY ? 2 : 3;
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else
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expand_len = 3 + 4;
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/* Insn expansion: a series of aligned memory stores.
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Consist of S8I, S16I or S32I(.N). */
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expand_len += (bytes / align) * (TARGET_DENSITY
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&& align == 4 ? 2 : 3);
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/* Insn expansion: the remainder, sub-aligned memory stores.
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A combination of S8I and S16I as needed. */
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expand_len += ((bytes % align + 1) / 2) * 3;
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/* Function call: preparing two arguments. */
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funccall_len = xtensa_sizeof_MOVI (value);
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funccall_len += xtensa_sizeof_MOVI (bytes);
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/* Function call: calling memset(). */
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funccall_len += TARGET_LONGCALLS ? (3 + 4 + 3) : 3;
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/* Apply expansion bonus (2x) if optimizing for speed. */
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if (optimize > 1 && !optimize_size)
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funccall_len *= 2;
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/* Decide whether to expand or not, based on the sum of the length
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of instructions. */
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if (expand_len > funccall_len)
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return 0;
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x = XEXP (dst_mem, 0);
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if (!REG_P (x))
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dst_mem = replace_equiv_address (dst_mem, force_reg (Pmode, x));
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reg = XEXP (dst_mem, 0);
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if (! REG_P (reg))
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dst_mem = replace_equiv_address (dst_mem,
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force_reg (Pmode, reg));
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switch (align)
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{
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case 1:
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@@ -1621,45 +1606,43 @@ xtensa_expand_block_set_unrolled_loop (rtx *operands)
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{
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int unit_size = MIN (bytes, align);
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machine_mode unit_mode = (unit_size >= 4 ? SImode :
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(unit_size >= 2 ? HImode :
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QImode));
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(unit_size >= 2 ? HImode : QImode));
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unit_size = GET_MODE_SIZE (unit_mode);
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emit_move_insn (adjust_address (dst_mem, unit_mode, offset),
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unit_mode == SImode ? reg
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: convert_to_mode (unit_mode, reg, true));
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(unit_mode == SImode) ? reg
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: convert_to_mode (unit_mode, reg, true));
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offset += unit_size;
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bytes -= unit_size;
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}
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while (bytes > 0);
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return 1;
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seq = get_insns ();
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end_sequence ();
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return seq;
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}
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int
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xtensa_expand_block_set_small_loop (rtx *operands)
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/* Worker function for xtensa_expand_block_set(),
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Expand into an insn sequence of a small loop that fill the memory
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range. Returns NULL if the conditions for expansion are not met. */
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static rtx_insn *
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xtensa_expand_block_set_small_loop (rtx dst_mem,
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HOST_WIDE_INT value,
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HOST_WIDE_INT bytes,
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HOST_WIDE_INT align)
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{
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HOST_WIDE_INT bytes, value, align, count;
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int expand_len, funccall_len;
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rtx x, dst, end, reg;
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HOST_WIDE_INT count;
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rtx reg, dst, end;
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machine_mode unit_mode;
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rtx_code_label *label;
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if (!CONST_INT_P (operands[1]) || !CONST_INT_P (operands[2]))
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return 0;
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bytes = INTVAL (operands[1]);
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if (bytes <= 0)
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return 0;
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value = (int8_t)INTVAL (operands[2]);
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align = INTVAL (operands[3]);
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if (align > MOVE_MAX)
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align = MOVE_MAX;
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rtx_insn *seq;
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/* Totally-aligned block only. */
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if (bytes % align != 0)
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return 0;
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return NULL;
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count = bytes / align;
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/* If the Loop Option (zero-overhead looping) is configured and active,
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@@ -1671,77 +1654,28 @@ xtensa_expand_block_set_small_loop (rtx *operands)
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instruction. */
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if (align == 4
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&& ! (bytes <= 127 || xtensa_simm8x256 (bytes)))
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return 0;
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return NULL;
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/* If no 4-byte aligned, loop count should be treated as the
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constraint. */
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if (align != 4
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&& count > ((optimize > 1 && !optimize_size) ? 8 : 15))
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return 0;
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return NULL;
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}
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/* Insn expansion: holding the init value.
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Either MOV(.N) or L32R w/litpool. */
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if (align == 1)
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expand_len = xtensa_sizeof_MOVI (value);
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else if (value == 0 || value == -1)
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expand_len = TARGET_DENSITY ? 2 : 3;
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start_sequence ();
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reg = XEXP (dst_mem, 0);
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if (REG_P (reg))
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emit_move_insn (dst = gen_reg_rtx (SImode), reg);
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else
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expand_len = 3 + 4;
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if (TARGET_LOOPS && optimize) /* zero-overhead looping */
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{
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/* Insn translation: Either MOV(.N) or L32R w/litpool for the
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loop count. */
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expand_len += xtensa_simm12b (count) ? xtensa_sizeof_MOVI (count)
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: 3 + 4;
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/* Insn translation: LOOP, the zero-overhead looping setup
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instruction. */
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expand_len += 3;
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/* Insn expansion: the loop body instructions.
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For store, one of S8I, S16I or S32I(.N).
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For advance, ADDI(.N). */
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expand_len += (TARGET_DENSITY && align == 4 ? 2 : 3)
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+ (TARGET_DENSITY ? 2 : 3);
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}
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else /* NO zero-overhead looping */
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{
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/* Insn expansion: Either ADDI(.N) or ADDMI for the end address. */
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expand_len += bytes > 127 ? 3
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: (TARGET_DENSITY && bytes <= 15) ? 2 : 3;
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/* Insn expansion: the loop body and branch instruction.
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For store, one of S8I, S16I or S32I(.N).
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For advance, ADDI(.N).
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For branch, BNE. */
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expand_len += (TARGET_DENSITY && align == 4 ? 2 : 3)
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+ (TARGET_DENSITY ? 2 : 3) + 3;
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}
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/* Function call: preparing two arguments. */
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funccall_len = xtensa_sizeof_MOVI (value);
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funccall_len += xtensa_sizeof_MOVI (bytes);
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/* Function call: calling memset(). */
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funccall_len += TARGET_LONGCALLS ? (3 + 4 + 3) : 3;
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/* Apply expansion bonus (2x) if optimizing for speed. */
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if (optimize > 1 && !optimize_size)
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funccall_len *= 2;
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/* Decide whether to expand or not, based on the sum of the length
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of instructions. */
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if (expand_len > funccall_len)
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return 0;
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x = XEXP (operands[0], 0);
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if (!REG_P (x))
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x = XEXP (replace_equiv_address (operands[0], force_reg (Pmode, x)), 0);
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dst = gen_reg_rtx (SImode);
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emit_move_insn (dst, x);
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end = gen_reg_rtx (SImode);
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if (TARGET_LOOPS && optimize)
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x = force_reg (SImode, operands[1] /* the length */);
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else
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x = operands[1];
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emit_insn (gen_addsi3 (end, dst, x));
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dst = XEXP (replace_equiv_address (dst_mem,
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force_reg (Pmode, reg)), 0);
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emit_insn (gen_addsi3 (end = gen_reg_rtx (SImode),
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dst,
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(TARGET_LOOPS && optimize)
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? force_reg (SImode, GEN_INT (bytes))
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: GEN_INT (bytes)));
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switch (align)
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{
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case 1:
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@@ -1760,12 +1694,99 @@ xtensa_expand_block_set_small_loop (rtx *operands)
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}
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reg = force_reg (unit_mode, GEN_INT (value));
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label = gen_label_rtx ();
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emit_label (label);
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emit_label (label = gen_label_rtx ());
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emit_move_insn (gen_rtx_MEM (unit_mode, dst), reg);
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emit_insn (gen_addsi3 (dst, dst, GEN_INT (align)));
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emit_cmp_and_jump_insns (dst, end, NE, const0_rtx, SImode, true, label);
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seq = get_insns ();
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end_sequence ();
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return seq;
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}
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/* Try to expand a block set operation to a sequence of RTL move
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instructions. If not optimizing, or if the block size is not a
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constant, or if the block is too large, or if the value to
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initialize the block with is not a constant, the expansion
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fails and GCC falls back to calling memset().
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operands[0] is the destination
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operands[1] is the length
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operands[2] is the initialization value
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operands[3] is the alignment */
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int
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xtensa_expand_block_set (rtx *operands)
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{
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rtx dst_mem = operands[0];
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HOST_WIDE_INT bytes, value, align;
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rtx_insn *seq[3];
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int min_cost, min_index, i, n, cost;
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rtx_insn *insn;
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if (! CONST_INT_P (operands[1])
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|| ! CONST_INT_P (operands[2])
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|| (bytes = INTVAL (operands[1])) <= 0)
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return 0;
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value = (int8_t)INTVAL (operands[2]);
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align = INTVAL (operands[3]);
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if (align > MOVE_MAX)
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align = MOVE_MAX;
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/* Try to generate three equivalent insn sequences but method and
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size. */
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seq[0] = xtensa_expand_block_set_libcall (dst_mem, value, bytes);
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seq[1] = xtensa_expand_block_set_unrolled_loop (dst_mem, value,
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bytes, align);
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seq[2] = xtensa_expand_block_set_small_loop (dst_mem, value,
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bytes, align);
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/* Find the sequence that has minimum size-basis insn costs. */
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if (dump_file)
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fprintf (dump_file, "xtensa_expand_block_set:\n");
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min_cost = INT_MAX, min_index = 0;
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for (i = 0; i < 3; ++i)
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if ((insn = seq[i]))
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{
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if (dump_file)
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fprintf (dump_file, " method %d...\n", i);
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for (n = 0, cost = 0; insn; insn = NEXT_INSN (insn))
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{
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if (active_insn_p (insn))
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++n, cost += xtensa_insn_cost (insn, false);
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if (dump_file)
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dump_insn_slim (dump_file, insn);
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}
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/* Apply expansion bonus if -O2 or -O3 by discounting the cost
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other than libcall. */
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if (i > 0)
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{
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if (optimize == 2 && !optimize_size)
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cost = (cost + 1) / 2;
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else if (optimize >= 3)
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cost = (cost + 2) / 4;
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}
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if (dump_file)
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fprintf (dump_file, "\t%d active insns, %d cost.\n", n, cost);
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if (cost < min_cost)
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min_cost = cost, min_index = i;
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}
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if (dump_file)
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fprintf (dump_file, " choose method %d.\n", min_index);
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/* Fall back if libcall is minimum. */
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if (min_index == 0)
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return 0;
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emit_insn (seq[min_index]);
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return 1;
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}
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@@ -1547,9 +1547,7 @@
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(match_operand:SI 3 "const_int_operand")]
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"!optimize_debug && optimize"
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{
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if (xtensa_expand_block_set_unrolled_loop (operands))
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DONE;
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if (xtensa_expand_block_set_small_loop (operands))
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if (xtensa_expand_block_set (operands))
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DONE;
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FAIL;
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})
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