We can still override these settings via mach/memory.h, but let's provide
sensible defaults so that SPARSEMEM is available in the multiplatform
kernels.
Two platforms currently use SECTION_SIZE_BITS < 28, but are expected to
work with 28 (albeit slightly less efficiently if not all banks are
populated):
- mach-rpc: uses 26 bits. Based on mach/hardware.h it looks like this
platform puts RAM at 0x1000_0000 - 0x1fff_ffff, and I/O below
0x1000_0000.
- mach-sa1100: uses 27 bits. mach/memory.h indicates that RAM occupies
the entire range of 0xc000_0000 - 0xdfff_ffff.
But Arnd says in that rpc and sa1100 will never have to use the
default since they cannot be part of a multiplatform kernel, and that
is unlikely to change.
Several platforms need MAX_PHYSMEM_BITS >= 36 so we'll pick that as the
minimum. Anything higher and we'll fail the SECTIONS_WIDTH + NODES_WIDTH +
ZONES_WIDTH test in <linux/mm.h>.
Some analysis from Russell King at
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-October/298957.html:
I think this is fine in as far as it goes - this means we end up with
256 entries in the mem_section array which means it occupies one page,
which I think is acceptable overhead.
The other thing to be aware of here is the obvious:
#if (MAX_ORDER - 1 + PAGE_SHIFT) > SECTION_SIZE_BITS
#error Allocator MAX_ORDER exceeds SECTION_SIZE
#endif
Which means that with 28 bits of section, that's a maximum allocator
order of 16. We appear to allow FORCE_MAX_ZONEORDER to be set up to
64 in the case of shmobile, which doesn't seem like a sensible upper
limit - and certainly isn't when sparsemem is enabled.
Given this, I think that FORCE_MAX_ZONEORDER's help, and the
dependencies probably could do with some improvement to make the
issues more transparent.
[gregory.0xf0: added notes from Arnd and Russell]
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On chips strapped for BE, we'll need to use ioread32be/iowrite32be instead of
ioread32/iowrite32.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
If the device node has a "big-endian" property and 32-bit registers, tell
the serial driver to use UPIO_MEM32BE instead of UPIO_MEM32.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Rob Herring <robh@kernel.org>
These apply to newly converted drivers, like serial8250/libahci/...
The examples were adapted from the regmap bindings document.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Rob Herring <robh@kernel.org>
SoC peripherals can come in several different flavors:
- little-endian: registers always need to be accessed in LE mode (so the
kernel should perform a swap if the CPU is running BE)
- big-endian: registers always need to be accessed in BE mode (so the
kernel should perform a swap if the CPU is running LE)
- native-endian: the bus will automatically swap accesses, so the kernel
should never swap
Introduce a function that checks an OF device node to see whether it
contains a "big-endian" or "native-endian" property. For the former case,
always return true. For the latter case, return true iff the kernel was
built for BE (implying that the BE MMIO accessors do not perform a swap).
Otherwise return false, assuming LE registers.
LE registers are assumed by default because most existing drivers (libahci,
serial8250, usb) always use readl/writel in the absence of instructions
to the contrary, so that will be our fallback.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Rob Herring <robh@kernel.org>
BCM3384/BCM63xx can use the common drivers/irqchip/irq-bcm7120-l2.c for
this purpose; BCM7xxx will use drivers/irqchip/irq-bcm7038-l1.c. We no
longer need this code under arch/mips.
[ralf@linux-mips.org: Fix conflicts.]
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: jaedon.shin@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8853/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This platform is configured primarily through device tree, and we can
reuse the same code to support a bunch of other chips. Change the name
to reflect this.
[ralf@linux-mips.org: Fix conflicts with other patches.]
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: jaedon.shin@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The register bit fields are a little different, so add an entry and a
compatible string to accommodate them.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Some of the older chips used different bits to arm and trigger the reset.
Add the infrastructure needed to specify this through the "compatible"
string.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Now that the driver doesn't use any ARM-specific headers, it is safe
to build on MIPS or with COMPILE_TEST.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Commit 2ae83bf938 ("[CIFS] Fix setting time before epoch (negative
time values)") changed "u64 t" to "s64 t", which makes do_div() complain
about a pointer signedness mismatch:
CC fs/cifs/netmisc.o
In file included from ./arch/mips/include/asm/div64.h:12:0,
from include/linux/kernel.h:124,
from include/linux/list.h:8,
from include/linux/wait.h:6,
from include/linux/net.h:23,
from fs/cifs/netmisc.c:25:
fs/cifs/netmisc.c: In function ‘cifs_NTtimeToUnix’:
include/asm-generic/div64.h:43:28: warning: comparison of distinct pointer types lacks a cast [enabled by default]
(void)(((typeof((n)) *)0) == ((uint64_t *)0)); \
^
fs/cifs/netmisc.c:941:22: note: in expansion of macro ‘do_div’
ts.tv_nsec = (long)do_div(t, 10000000) * 100;
Introduce a temporary "u64 abs_t" variable to fix this.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Steve French <steve.french@primarydata.com>
Update link to point to Steve's current tree on git.samba.org. Remove
link to the old patchwork instance which shows no new patches since 2010.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Steve French <smfrench@gmail.com>
This will select the appropriate register layout based on the DT
"compatible" string.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
There are at least 4 incompatible variations of this hardware block,
so let's use the ARB_* constants as a table index instead of hardcoding
specific register offsets. Also, allow for the possibility of adding
old devices that are missing some of the registers.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
These will be used to abstract out chip-to-chip differences.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
BCM7xxx ARM and MIPS platforms share a similar hardware block for
reporting GISB errors, so they both benefit from the use of this driver.
Conditionally compile the ARM-specific bus error handler so that the
GISB error IRQ handler works on other architectures.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Since most drivers interpret UPIO_MEM32 to mean "little-endian" and use
readl/writel to access the registers, add a parallel UPIO_MEM32BE to
request the use of big-endian MMIO accessors (ioread32be/iowrite32be).
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
__earlycon_of_table_sentinel.compatible is a char[128], not a pointer, so
it will never be NULL. Checking it against NULL causes the match loop to
run past the end of the array, and eventually match a bogus entry, under
the following conditions:
- Kernel command line specifies "earlycon" with no parameters
- DT has a stdout-path pointing to a UART node
- The UART driver doesn't use OF_EARLYCON_DECLARE (or maybe the console
driver is compiled out)
Fix this by checking to see if match->compatible is a non-empty string.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: <stable@vger.kernel.org> # 3.16+
Signed-off-by: Rob Herring <robh@kernel.org>
This function can only return true or false; using a bool makes it more
obvious to the reader.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
This function passes back a value from __of_device_is_compatible(), which
returns a score in the range 0..11, not a bool.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
This effectively converts the __raw_ accessors to the non-__raw_
equivalents. To handle BE, we pass IRQ_GC_BE_IO, similar to what was
done in irq-bcm7120-l2.c.
Since irq_reg_writel now takes an irq_chip_generic argument, writel must
be used for the initial hardware reset in the probe function. But that
operation never needs endian swapping, so it's probably not a big deal.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/1415342669-30640-15-git-send-email-cernekee@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
On BE MIPS systems this needs to use the new IRQ_GC_BE_IO gc_flag. In
all other cases it will use the standard readl/writel accessors.
The initial irq_fwd_mask setup runs before "gc" is initialized, so it
is unchanged for now. This could potentially be a problem on an ARM
system that boots in LE mode but runs a BE kernel, but currently none
of the supported ARM platforms are ever expected to run BE.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/1415342669-30640-14-git-send-email-cernekee@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Most implementations of the bcm7120-l2 controller only have a single
32-bit enable word + 32-bit status word. But some instances have added
more enable/status pairs in order to support 64+ IRQs (which are all
ORed into one parent IRQ input). Make the following changes to allow
the driver to support this:
- Extend DT bindings so that multiple words can be specified for the
reg property, various masks, etc.
- Add loops to the probe/handle functions to deal with each word
separately
- Allocate 1 generic-chip for every 32 IRQs, so we can still use the
clr/set helper functions
- Update the documentation
This uses one domain per bcm7120-l2 DT node. If the DT node defines
multiple enable/status pairs (i.e. >=64 IRQs) then the driver will
create a single IRQ domain with 2+ generic chips. Multiple generic chips
are required because the generic-chip code can only handle one
enable/status register pair per instance.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/1415342669-30640-12-git-send-email-cernekee@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This check may be prone to race conditions, e.g.
1) Some external event (e.g. GPIO level) causes an IRQ to become pending
2) Peripheral asserts the L2 IRQ
3) CPU takes an interrupt
4) The event from #1 goes away
5) bcm7120_l2_intc_irq_handle() reads back a 0 status
Unlike the hardware supported by brcmstb-l2, the bcm7120-l2 controller
does not latch the IRQ status. Bits can change if the inputs to the
controller change. Also, do_bad_IRQ() is an ARM-specific macro.
So let's just nuke it.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/1415342669-30640-7-git-send-email-cernekee@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Pass in the irq_chip_generic struct so we can use different readl/writel
settings for each irqchip driver, when appropriate. Compute
(gc->reg_base + reg_offset) in the helper function because this is pretty
much what all callers want to do anyway.
Compile-tested using the following configurations:
at91_dt_defconfig (CONFIG_ATMEL_AIC_IRQ=y)
sama5_defconfig (CONFIG_ATMEL_AIC5_IRQ=y)
sunxi_defconfig (CONFIG_ARCH_SUNXI=y)
tb10x (ARC) is untested.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/1415342669-30640-3-git-send-email-cernekee@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
We don't really need to perform the ioremap "on demand" so it's simpler
just to do it from the probe function. This also lets us eliminate the
UART_REG_SIZE constant and rely on the resource information passed in
from the DT or platform code.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This enables early console output if there is a chosen/stdout-path
property referencing a UART node with the "brcm,bcm6345-uart" compatible
string. The bootloader sets up the pinmux and baud/parity/etc.
Tested on bcm3384 (MIPS, DT).
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This squashes a checkpatch warning on my new bcm3384 dts submission.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Remove incorrect "bcm963xx_uart" module name; add a list of known users;
tweak grammar/indentation/capitalization.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The original non-DT bcm63xx clk code ignores the struct device argument
and looks up a global clock name. DT platforms, by contrast, often just
use a phandle to reference a clock node with no "clock-output-names"
property. Modify the UART driver to support both schemes.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This device was originally supported on bcm63xx only, but it shows up on
a wide variety of MIPS and ARM chipsets spanning multiple product lines.
Now that the driver has eliminated dependencies on bcm63xx-specific
header files, we can build it on any non-bcm63xx kernel.
Compile-tested on x86, both statically and as a module. Tested for
functionality on bcm3384 (a new MIPS platform under active development).
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This puts all of the platform_data checks in the same place, and removes
the need for a custom drv->reset() callback.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The bcm63xx and bcm3384 platforms need to set OHCI_QUIRK_FRAME_NO, but
they are non-PPC platforms and don't enable CONFIG_PPC_MPC52xx.
Therefore this patch changes the code that uses OHCI_QUIRK_FRAME_NO,
making it not depend on CONFIG_PPC_MPC52xx.
Also, rephrase the comments describing OHCI_QUIRK_FRAME_NO and the
related PSW endian swap.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This involves two changes to the BSP code:
1) register_smp_ops() for BMIPS SMP
2) The CPU1 boot vector on some of the BCM63xx platforms conflicts with
the special interrupt vector (IV). Move it to 0x8000_0380 at boot time,
to resolve the conflict.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
[jogo@openwrt.org: moved SMP ops registration into ifdef guard,
changed ifdef guards to if (IS_ENABLED())]
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/5489/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS software IRQs 0 and 1 are used for interprocessor signaling (IPI)
on BMIPS SMP. Make the board support code aware of them.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
[jogo@openwrt.org: move sw irqs behind timer irq]
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/5354/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This fixes the following warning:
drivers/spi/spi-bcm63xx.c: In function 'bcm63xx_spi_setup':
drivers/spi/spi-bcm63xx.c:157:6: warning: unused variable 'ret'
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Now that alps_identify() explicitly issues an EC report using
alps_rpt_cmd(), we no longer need to look at the magic numbers returned
by alps_enter_command_mode().
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Separate out the common trackstick probe/setup sequences, then call them
from each of the v3 init functions.
Credits: Emmanual Thome furnished the information on the trackstick init
and how it affected the report format.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Tested-by: Dave Turvene <dturvene@dahetral.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Rushmore touchpads are found on Dell E6230/E6430/E6530. They use the V3
protocol with slightly tweaked init sequences and report formats.
The E7 report is 73 03 0a, and the EC report is 88 08 1d
Credits: Emmanuel Thome reported the MT bitmap changes.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Tested-by: Dave Turvene <dturvene@dahetral.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
A number of different ALPS touchpad protocols can reuse
alps_process_touchpad_packet_v3() with small tweaks to the bitfield
decoding. Create a new priv->decode_fields() callback that handles the
per-model differences.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Tested-by: Dave Turvene <dturvene@dahetral.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Pinnacle class devices should return "88 07 xx" or "88 08 xx" when
entering command mode. If either the first byte or the second byte is
invalid, return an error.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Tested-by: Dave Turvene <dturvene@dahetral.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
The official ALPS driver uses the EC report, not the E7 report, to detect
these devices. Also, they check for a range of values; the original
table-based code only checked for two specific ones.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Tested-by: Dave Turvene <dturvene@dahetral.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
This allows alps_identify() to override these settings based on the
device characteristics, if it is ever necessary.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Tested-by: Dave Turvene <dturvene@dahetral.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
In anticipation of adding more ALPS protocols and more per-device quirks,
use function pointers instead of switch statements to call functions that
differ from one device to the next.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Tested-by: Dave Turvene <dturvene@dahetral.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
If the E6 report test passes, get the E7 and EC reports right away and
then try to match an entry in the table.
Pass in the alps_data struct, so that the detection code will be able to
set operating parameters based on information found during detection.
Change the version (psmouse->model) to report the protocol version only,
in preparation for supporting models that do not show up in the ID table.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Tested-by: Dave Turvene <dturvene@dahetral.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Several ALPS driver init sequences repeat a command three times, then
issue PSMOUSE_CMD_GETINFO to read the result. Move this into a helper
function to simplify the code.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Tested-by: Dave Turvene <dturvene@dahetral.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
This will minimize the number of forward declarations needed when
alps_get_model() starts assigning function pointers.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Tested-by: Dave Turvene <dturvene@dahetral.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Not every type of ALPS touchpad is well-suited to table-based detection.
Start moving the various alps_model_data attributes into the alps_data
struct so that we don't need a unique table entry for every possible
permutation of protocol version, flags, byte0/mask0, etc.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Tested-by: Dave Turvene <dturvene@dahetral.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
This driver supports the RocketPort EXPRESS and RocketPort INFINITY
families of PCI/PCIe multiport serial adapters. These adapters use a
"RocketPort 2" ASIC that is not compatible with the original RocketPort
driver (CONFIG_ROCKETPORT).
Tested with the RocketPort EXPRESS Octa DB9 and Quad DB9. Also added an
old RocketPort 8J PCI card to the same system to verify that rocket.c and
rp2.c coexist peacefully.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Matching PCI_ANY_ID causes conflicts with RocketPort 2 adapters, which
are supported by a different driver.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Kevin Cernekee