Commit Graph
19179 Commits
Author SHA1 Message Date
Marek Szyprowski 1e1c735a6b ARM: dts: exynos: Add port map to Exynos5250 AHCI node
Exynos AHCI (SATA) controller has only one port for SATA device. According
to AHCI driver bindings (ata/ahci-platform.txt), if the bootloader doesn't
program the PORTS_IMPL register to proper value, the available port map has
to be provided by 'ports-implemented' device tree property. This fixes
SATA operation on Exynos5250-based boards since Linux v4.5.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-08-07 19:43:38 +02:00
Krzysztof Kozlowski f19b4fe783 ARM: dts: exynos: Use space after '=' in exynos4412-itop-scp-core
Replace tab with space after assignment operator.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-08-07 18:56:09 +02:00
Martin Blumenstingl dee51cd0d2 ARM: dts: meson8b: mxq: add the VDDEE regulator
The VDDEE regulator is basically a copy of the VCCK regulator. VDDEE
supplies for example the Mali GPU and is controlled by PWM_D instead of
PWM_C.

Add the VDDEE PWM regulator and make it the supply of the Mali GPU.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-05 14:38:07 -07:00
Martin Blumenstingl 8bdf38be71 ARM: dts: meson8b: odroidc1: add the VDDEE regulator
The VDDEE regulator is basically a copy of the VCCK regulator. VDDEE
supplies for example the Mali GPU and is controlled by PWM_D instead of
PWM_C.

Add the VDDEE PWM regulator and make it the supply of the Mali GPU.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-05 14:38:07 -07:00
Martin Blumenstingl 087a1d8b4e ARM: dts: meson8b: ec100: add the VDDEE regulator
The VDDEE regulator is basically a copy of the VCCK regulator. VDDEE
supplies for example the Mali GPU and is controlled by PWM_D instead of
PWM_C.

Add the VDDEE PWM regulator and make it the supply of the Mali GPU.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-05 14:38:07 -07:00
Martin Blumenstingl ea241bdfa0 ARM: dts: meson8b: add the PWM_D output pin
The PWM_D output is used for the VDDEE PWM regulator which supplies for
example the Mali GPU on the EC-100 and Odroid-C1 boards. Add the output
pin the VDDEE regulators can be added.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-05 14:38:06 -07:00
Jerome Brunet 4f0303d439 ARM: dts: meson8b: add ethernet fifo sizes
If unspecified in DT, the fifo sizes are not automatically detected by
the dwmac1000 dma driver and the reported fifo sizes default to 0.
Because of this, flow control will be turned off on the device.

Add the fifo sizes provided by the datasheet in the SoC in DT so
flow control may be enabled if necessary.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-05 14:38:06 -07:00
Marek Vasut d81765d693 ARM: dts: imx53: Update LCD panel node on M53Menlo
Update the panel node with latest version of the panel used on the system.
Add missing pincontrol phandle to the panel node.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03 18:00:40 +02:00
Lukasz Majewski a5580eb394 ARM: dts: vf610-bk4: Fix qspi node description
Before this change the device tree description of qspi node for
second memory on BK4 board was wrong (applicable to old, removed
fsl-quadspi.c driver).

As a result this memory was not recognized correctly when used
with the new spi-fsl-qspi.c driver.

From the dt-bindings:

"Required SPI slave node properties:
  - reg: There are two buses (A and B) with two chip selects each.
This encodes to which bus and CS the flash is connected:
<0>: Bus A, CS 0
<1>: Bus A, CS 1
<2>: Bus B, CS 0
<3>: Bus B, CS 1"

According to above with new driver the second SPI-NOR memory shall
have reg=<2> as it is connected to Bus B, CS 0.

Fixes: a67d2c52a8 ("ARM: dts: Add support for Liebherr's BK4 device (vf610 based)")
Suggested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03 17:53:24 +02:00
Martin Kaiser 2c1a3f4dc4 ARM: dts: imx25-pdk: native-mode is part of display-timings
Move the native-mode property inside the display-timings node.

According to
Documentation/devicetree/bindings/display/panel/display-timing.txt.
native-mode is a property of the display-timings node.

If it's located outside of display-timings, the native-mode setting is
ignored and the first display timing is used (which is a problem only if
someone adds another display timing).

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03 17:08:35 +02:00
Krzysztof Kozlowski 2a44db1303 ARM: dts: imx: Cleanup style around assignment operator
Use a space before and after assignment operator to have consistent
style.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03 16:49:56 +02:00
Fabio Estevam 13f138d3fc ARM: dts: imx6qdl-nit6xlite: Remove invalid properties
The "vqmmc-1-8-v" and "ocr-limit" properties are not documented
anywhere, so just remove them.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03 14:47:31 +02:00
Ezequiel Garcia 8ad2d1dcce ARM: dts: imx6qdl-wandboard: Add OV5645 camera support
imx6qdl-wandboard can be connected to a OV5645 camera via
MIPI CSI port. Add support for it.

PAD_GPIO_6 has been originally used for the Ethernet FEC
ERR006687 workaround, but it needs to be used to provide the
camera sensor clock, so adjust it accordingly.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03 10:25:03 +02:00
Matthias Kaehlcke 6f79fcc6c9 ARM: dts: rockchip: Add pin names for rk3288-veyron fievel
This is like commit 0ca87bd5ba ("ARM: dts: rockchip: Add pin names
for rk3288-veyron-jerry") and other similar commits, but for the
veyron fievel board (and tiger, which includes the fievel .dtsi).

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-08-03 00:33:59 +02:00
Matthias Kaehlcke 94562040da ARM: dts: rockchip: A few fixes for veyron-{fievel,tiger}
Fix/improve a few things for veyron fievel/tiger:

- move 'vccsys' regulator from tiger to fievel, both boards
  have it (and tiger includes the fievel .dtsi)
- move 'ext_gmac' node below regulators
- fix GPIO ids of vcc5_host1 and vcc5_host2 regulators
- remove reset configuration from 'gmac' node, this is already done
  in rk3288.dtsi
- fixed style issues of some multi-line comments
- switch 'vcc18_lcdt', 'vdd10_lcd' and 'vcc33_ccd' regulators off
  during suspend
- no pull-up on the Bluetooth wake-up pin, there is an external
  pull-up. The signal is active low, add the 'bt_host_wake_l'
  pinctrl config
- move BC 1.2 pins up in the pinctrl config to keep 'wake only' pins
  separate
- add BC 1.2 pins to sleep config

Fixes: 0067692b66 ("ARM: dts: rockchip: add veyron-fievel board")
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-08-03 00:33:45 +02:00
Alexandre Torgue 49490d5174 ARM: dts: stm32: remove useless pinctrl entries in stm32mp157-pinctrl
This patch removes "ngpios" and "gpio-ranges" information from
stm32mp157-pinctrl.dtsi file as it is now filled in stm32mp157 pinctrl
package files.

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Yannick Fertré 98414811d7 ARM: dts: stm32: add phy-dsi-supply property on stm32mp157c-ev1
The dsi physical layer is powered by the 1v8 power controller supply.

Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Olivier Moysan 08b9092ff3 ARM: dts: stm32: add audio codec support on stm32mp157a-dk1 board
Add support of Cirrus cs42l51 audio codec on stm32mp157a-dk1 board.
Configuration overview:
- SAI2A is the CPU interface used for the codec audio playback
- SAI2B is the CPU interface used for the codec audio record
- SAI2A is configured as a clock provider for the audio codec
- SAI2A&B are configured as slave of the audio codec
- SAI2A&B share the same interface of the audio codec

Note:
In master mode, cs42l51 audio codec provides a bitclock
at 64 x FS, regardless of data width. This means that
slot width is always 32 bits.
Set slot width to 32 bits and slot number to 2
in SAI2A&B endpoint nodes, to match this constraint.
dai-tdm-slot-num and dai-tdm-slot-width properties are used here,
assuming that i2s is a special case of tdm, where slot number is 2.

Signed-off-by: Olivier Moysan <olivier.moysan@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Fabrice Gasnier 92edf0a285 ARM: dts: stm32: add syscfg to ADC on stm32mp157c
On stm32mp157c, the ADC inputs are multiplexed with analog switches which
have reduced performances when their supply is below 2.7V (vdda by
default).
Add syscfg registers that can be used on stm32mp157c, to get full ADC
analog performances.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Fabrice Gasnier 4f0f89dd90 ARM: dts: stm32: add pwm cells to stm32f746
STM32 Timers support generic 3 cells PWM to encode PWM number, period and
polarity.

Fixes: 9bd7b77af8 ("ARM: dts: stm32: add Timers driver for stm32f746
MCU")

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Fabrice Gasnier 2894597378 ARM: dts: stm32: add pwm cells to stm32f429
STM32 Timers support generic 3 cells PWM to encode PWM number, period and
polarity.

Fixes: c0e14fc712 ("ARM: dts: stm32: add Timers driver for stm32f429
MCU")

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Fabrice Gasnier eb5f46e549 ARM: dts: stm32: add pwm cells to stm32mp157c
STM32 Timers support generic 3 cells PWM to encode PWM number, period and
polarity.

Fixes: 61fc211c48 ("ARM: dts: stm32: add timers support to stm32mp157c")

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Erwan Le Ray 1f9510c2ff ARM: dts: stm32: fix -Wall W=1 compilation in stm32mp157 pinctrl for mcan
Fix compilations warnings detected by -Wall W=1 compilation option:
- node has a unit name, but no reg property

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Fabrice Gasnier e7c3a5beb3 ARM: dts: stm32: add booster for ADC analog switches on stm32mp157c
Booster for ADC analog input switches can be used when Vdda is below 2.7V
to get maximum ADC analog performances.
Add booster for ADC analog switches on stm32mp157c.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Fabien Dessenne ae5dda2d1d ARM: dts: stm32: enable m4 coprocessor support on STM32MP157a-dk1
Enable m4 coprocessor for STM32MP157a-dk1 board.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Fabien Dessenne c39ca797ff ARM: dts: stm32: declare copro reserved memories on STM32MP157a-dk1
Declare reserved memories shared by the processors for STM32MP157a-dk1

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Fabien Dessenne f2d0ea33d2 ARM: dts: stm32: enable m4 coprocessor support on STM32MP157c-ed1
Enable m4 coprocessor for STM32MP157c-ed1 board.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Fabien Dessenne 037dc38a25 ARM: dts: stm32: declare copro reserved memories on STM32MP157c-ed1
Declare reserved memories shared by the processors for STM32MP157c-ed1
board.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Fabien Dessenne c19335e2af ARM: dts: stm32: add m4 remoteproc support on STM32MP157c
Declare the M4 remote processor in a sub-node of the mlahb simple bus.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Fabrice Gasnier 493e84c5dc ARM: dts: stm32: add missing vdda-supply to adc on stm32h743i-eval
Add missing vdda-supply required by STM32 ADC.

Fixes: 090992a9ca ("ARM: dts: stm32: enable ADC on stm32h743i-eval
board")

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Fabrice Gasnier 1425d00aff ARM: dts: stm32: add missing vdda-supply to adc on stm32429i-eval
Add missing vdda-supply required by STM32 ADC.

Fixes: 7465d81191 ("ARM: dts: stm32: enable ADC on stm32f429i-eval
board")

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Fabrice Gasnier bb06b54721 ARM: dts: stm32: remove fixed regulator unit address on stm32429i-eval
vref fixed regulator shouldn't have unit address and reg properties.
Rename the label and phandle to "vref" according to the schematics.
Also remove it from simple-bus.

Fixes: 7465d81191 ("ARM: dts: stm32: enable ADC on stm32f429i-eval
board")

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02 16:17:43 +02:00
Vijay Khemka 4c349c7daf ARM: dts: aspeed: tiogapass: Add Riser card
Added i2c mux for riser card and multiple ava card and its sensor
components for Facebook tiogapass platform

Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-02 15:53:52 +09:30
Vijay Khemka 46a9f947b3 ARM: dts: aspeed: tiogapass: Move battery sensor
Moved adc7 hwmon battery sensor to correct label to be read
by single applications for all adc sensors.

Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-02 15:52:10 +09:30
Tao Ren fdc0417be5 ARM: dts: aspeed: Add Facebook Wedge100 BMC
Add initial version of device tree for Facebook Wedge100 AST2400 BMC
platform.

Signed-off-by: Tao Ren <taoren@fb.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-02 13:45:17 +09:30
Tao Ren 5cb98b41ab ARM: dts: aspeed: Add Facebook Wedge40 BMC
Add initial version of device tree for Facebook Wedge40 AST2400 BMC
platform.

Signed-off-by: Tao Ren <taoren@fb.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-02 13:44:03 +09:30
Geert Uytterhoeven 7ff1154d45 ARM: dts: vexpress: Add missing newline at end of file
"git diff" says:

    \ No newline at end of file

after modifying the file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-07-31 16:36:05 +01:00
Sudeep Holla 8d65f58021 ARM: dts: vexpress: add missing SPDX GPL-2.0 license identifier
Commit b24413180f ("License cleanup: add SPDX GPL-2.0 license
identifier to files with no license") seem to have missed this
one file.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-07-31 16:36:05 +01:00
Matt Spinler 51b0c5c244 ARM: dts: aspeed: swift: Fix FSI GPIOs
Change the FSI clock and data GPIOs to match what the hardware turned
out to use.

Fixes: 8e8fd0cbd7 ("ARM: dts: aspeed: Add Swift BMC machine")
Signed-off-by: Matt Spinler <spinler@us.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Adriana Kobylak <anoo@us.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-07-31 12:28:34 +09:30
Dinh Nguyen d8c1ccac44 ARM: dts: socfpga: add missing reset-names for dma
The dma dts node was missing the reset-names = "dma". The reset driver
needs this line to get the reset property.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-07-30 09:09:31 -05:00
Marek Vasut 2dbaa6a6dc ARM: dts: socfpga: Adjust GMAC1 clock and TXD lines skew on VINING FPGA
Adjust GMAC1 clock lines skew to maximum (+960 ps) and TXD lines skew
to minimum (-420 ps), to improve signal integrity.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-07-30 09:05:45 -05:00
Marek Vasut 325ec920ee ARM: dts: socfpga: Fix up button mapping on VINING FPGA
Add missing buttons and signals to the VINING FPGA device tree,
so they are presented to the userspace via gpio-keys evdev.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-07-30 09:05:39 -05:00
Masahiro Yamada c1459a9d7e ARM: dts: socfpga: update to new Denali NAND binding
With commit d8e8fd0ebf ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.

Update DT for it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-07-30 09:05:14 -05:00
Dinh Nguyen 5adfd87d9b ARM: dts: socfpga: add reset properties for DMA
Add both the reset and reset-ocp properties for the DMA node on Arria10.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-07-30 09:04:13 -05:00
Dinh Nguyen 41763c2b50 ARM: dts: socfpga: add the QSPI OCP reset property on arria10
The QSPI module needs the OCP reset bit deasserted as well.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-07-30 09:03:49 -05:00
Marek Szyprowski 314de2f6b5 ARM: dts: exynos: Use standard arrays of generic PHYs for EHCI/OHCI devices
Move USB PHYs to a standard arrays for Exynos EHCI/OHCI devices. This
resolves the conflict between Exynos EHCI/OHCI sub-nodes and generic USB
device bindings. Once the Exynos EHCI/OHCI sub-nodes are removed, the
boards can finally provide sub-nodes for the USB devices using generic USB
device bindings.

Suggested-by: Måns Rullgård <mans@mansr.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20190726081453.9456-4-m.szyprowski@samsung.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-07-30 13:00:37 +02:00
Krzysztof Kozlowski a5021c4597 ARM: dts: rockchip: Cleanup style around assignment operator
Use a space before and after assignment operator to have consistent
style.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-07-27 17:36:42 +02:00
Linus Walleij e8547e12d5 ARM: dts: gemini: Mount root from mtdblock3
The third mtdblock device named "Application" is where we
want to mount our root filesystem.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-26 13:42:57 +02:00
Linus Walleij b5a923f8c7 ARM: dts: gemini: Switch to redboot partition parsing
This switches the kernel to parse the Redboot partitions
in the SL93512r and the NAS4220B properly using the
right compatible string instead of using hard-coded
partitions.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-26 13:42:57 +02:00
Linus Walleij 47ef78b099 ARM: dts: gemini: Fix up confused pin settings
The SL93512r board has its pin muxing set up for the wrong
ASIC: SL3516 instead of SL3512 that it is using. Fix it
up and reference the right GPIO for the WPS button.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-26 13:42:57 +02:00