Commit 800974ac ("ARM: dts: Add board dts file for ODROID-X") includes a node
to describe the board level properties for mshc controller. But the mshc
controller node was not added in the Exynos4x12 dtsi file which resulted
in the following warning when compiling the dtb files.
Warning (reg_format): "reg" property in /mshc@12550000/slot@0 has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /mshc@12550000/slot@0
Warning (avoid_default_addr_size): Relying on default #size-cells value for /mshc@12550000/slot@0
Fix this by adding the mshc controller node for Exynos4x12 SoCs.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Tested-by: Dongjin Kim <tobetter@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
From Sekhar Nori:
v3.10 DT updates for DaVinci
This set of patches adds support for PWMs and SPI
controller present on DA850 and for SPI flash present on
DA850 EVM.
* tag 'davinci-for-v3.10/dt-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: da850-evm: add SPI flash support
ARM: davinci: da850: override SPI DT node device name
ARM: davinci: da850: add SPI1 DT node
spi/davinci: add DT binding documentation
spi/davinci: no wildcards in DT compatible property
ARM: davinci: da850: add EHRPWM & ECAP DT node
ARM: davinci: da850: override mmc DT node device name
ARM: davinci: da850: add mmc DT entries
mmc: davinci_mmc: add DT support
ARM: davinci: da850: add tps6507x regulator DT data
ARM: regulator: add tps6507x device tree data
ARM: davinci: remove test for undefined Kconfig macro
ARM: davinci: mmc: derive version information from device name
ARM: davinci: da850: add ECAP & EHRPWM clock nodes
ARM: davinci: clk framework support for enable/disable functionality
Signed-off-by: Olof Johansson <olof@lixom.net>
From Jason Cooper:
mvebu dt for v3.10 round 4
- mvebu LPAE 64bit dts file changes
* tag 'dt-3.10-4' of git://git.infradead.org/users/jcooper/linux: (52 commits)
ARM: dts: mvebu: Convert mvebu device tree files to 64 bits
ARM: dts: mvebu: introduce internal-regs node
ARM: dts: mvebu: Convert all the mvebu files to use the range property
ARM: dts: mvebu: move all peripherals inside soc
ARM: dts: mvebu: fix cpus section indentation
arm: mvebu: PCIe Device Tree informations for Armada XP GP
arm: mvebu: PCIe Device Tree informations for Armada 370 DB
arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox
arm: mvebu: PCIe Device Tree informations for Armada XP DB
arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4
arm: mvebu: add PCIe Device Tree informations for Armada XP
arm: mvebu: add PCIe Device Tree informations for Armada 370
ARM: mvebu: Align the internal registers virtual base to support LPAE
ARM: mvebu: Limit the DMA zone when LPAE is selected
arm: plat-orion: remove addr-map code
arm: mach-mv78xx0: convert to use the mvebu-mbus driver
arm: mach-orion5x: convert to use mvebu-mbus driver
arm: mach-dove: convert to use mvebu-mbus driver
arm: mach-kirkwood: convert to use mvebu-mbus driver
arm: mach-mvebu: convert to use mvebu-mbus driver
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Enable m25p64 SPI flash support on da850-EVM. Also
add partition information of SPI flash.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Populate OF_DEV_AUXDATA with desired device name expected by spi-davinci
driver. Without this clk_get of spi-davinci DT driver fails.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Follow DT naming convention for compatible property of the blob.
Use first chip name that introduced the specific version of the
device.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
In order to be able to use more than 4GB of RAM when the LPAE is
activated, the dts must be converted in 64 bits.
Only Armada XP is LPAE capable, but as it shares a common dtsi file
with Armada 370, then the common file include the skeleton64. Thanks
to the use of the overload capability of the device tree format,
armada-370 include the 32 bit skeleton and all the armada 370 based
dts can remain the same.
This was heavily based on the work of Lior Amsalem.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Introduce a 'internal-regs' subnode, under which all devices are
moved. This is not really needed for now, but will be for the
mvebu-mbus driver. This generates a lot of code movement since it's
indenting by one more tab all the devices. So it was a good
opportunity to fix all the bad indentation.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This conversion will allow to keep 32 bits addresses for the internal
registers whereas the memory of the system will be 64 bits.
Later it will also ease the move of the mvebu-mbus driver to the
device tree support.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
reorganize the .dts and .dtsi files so that all devices are under the
soc { } node (currently some devices such as the interrupt controller,
the L2 cache and a few others are outside).
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Pulling in mvebu branches which contain changes to armada*.dts? files for LPAE
conversion.
mvebu soc changes for v3.10
- use the mvebu-mbus driver
- prep for LPAE support
Depends:
- mvebu/cleanup (tags/cleanup_for_v3.10)
- mvebu/drivers (tags/drivers_for_v3.10)
pulling in mvebu branches which changes armada*.dts? files for LPAE changes
mvebu fixes for v3.9 round 3
- Kirkwood
- a couple of small fixes for the Iomega ix2-200 board (ether and led)
- mvebu
- allow GPIO button to work on Mirabox when running SMP
The Marvell Armada XP GP board has 3 physical full-size PCIe slots, so
we enable the corresponding PCIe interfaces in the Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Marvell evaluation board (DB) for the Armada 370 SoC has 2
physical full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Globalscale Mirabox platform uses one PCIe interface for an
available mini-PCIe slot, and the other PCIe interface for an internal
USB 3.0 controller. We add the necessary Device Tree informations to
enable those two interfaces.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Marvell evaluation board (DB) for the Armada XP SoC has 6
physicals full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The PlatHome OpenBlocks AX3-4 has an internal mini-PCIe slot that can
be used to plug mini-PCIe devices. We therefore enable the PCIe
interface that corresponds to this slot.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada XP SoCs have multiple PCIe interfaces. The MV78230 has 2
PCIe units (one 4x or quad 1x, the other 1x only), the MV78260 has 3
PCIe units (two 4x or quad 1x and one 4x/1x), the MV78460 has 4 PCIe
units (two 4x or quad 1x and two 4x/1x). We therefore add the
necessary Device Tree informations to make those PCIe interfaces
usable.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada 370 SoC has two 1x PCIe 2.0 interfaces, so we add the
necessary Device Tree informations to make these interfaces availabel.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In order to be able to support the LPAE, the internal registers
virtual base must be aligned to 2MB. In LPAE section size is 2MB, in
earlyprintk we map the internal registers and it must be section
aligned.
Signed-off-by: Lior Amsalem <alior@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
When LPAE is activated on Armada XP, all registers and IOs are still
32bit, the 40bit extension is on the CPU to DRAM path (windows) only.
That means that all the DMA transfer are restricted to the low 32 bits
address space. This is limitation is achieved by selecting ZONE_DMA.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that all Marvell EBU platforms have been converted to use the
mvebu-mbus driver, we can remove the common plat-orion/addr-map.c code
that isn't compiled anymore.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit convers the mach-mv78xx0 sub-architecture to use the
mvebu-mbus driver. We simply have to call mvebu_mbus_init() in the
->init_early() function, and modify the PCIe code so that it uses the
new functions provided by mvebu-mbus to create the needed PCIe
windows.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit migrates the mach-orion5x platforms to use the mvebu-mbus
driver and therefore removes the Orion5x-specific addr-map code.
The dove_init_early() function now initializes the mvebu-mbus driver
by calling mvebu_mbus_init().
We also convert a number of orion5x_setup_xyz_win() calls to the
appropriate mvebu_mbus_add_window() calls, as each board was doing its
own setup for the NOR window or other devices. Ultimately, those
devices will be probed from the DT.
The common address decoding windows are now registered in the
orion5x_setup_wins() function. It is worth noting that the four PCIe
address decoding windows will ultimately no longer have to be
registered here: it will be done automatically by the PCIe driver once
Dove has been migrated to use the upcoming mvebu PCIe driver.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit migrates the mach-dove platforms to use the mvebu-mbus
driver and therefore removes the Dove-specific addr-map code.
The dove_init_early() function now initializes the mvebu-mbus driver
by calling mvebu_mbus_init().
The address decoding windows are now registered in the
dove_setup_cpu_wins() function. It is worth noting that the four PCIe
address decoding windows will ultimately no longer have to be
registered here: it will be done automatically by the PCIe driver once
Dove has been migrated to use the upcoming mvebu PCIe driver.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit migrates the mach-kirkwood platforms to use the mvebu-mbus
driver and therefore removes the Kirkwood-specific addr-map code.
The kirkwood_init_early() function is now responsible for initializing
the mvebu-mbus driver by calling mvebu_mbus_init().
The address decoding windows are now registered in the
kirkwood_setup_wins() function. It is worth noting that the four PCIe
address decoding windows will ultimately no longer have to be
registered here: it will be done automatically by the PCIe driver once
Kirkwood has been migrated to use the upcoming mvebu PCIe driver.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The changes needed to migrate the mach-mvebu (Armada 370 and Armada
XP) to the mvebu-mbus driver are fairly minimal, since not many
devices currently supported on those SoCs use address decoding
windows. The only one being the BootROM window, used to bring up
secondary CPUs.
However, this BootROM window needed for SMP brings an important
requirement: the mvebu-mbus driver must be initialized at the
->early_init() time, otherwise the BootROM window cannot be setup
early enough to be ready before the secondary CPUs are started.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add da850 EHRPWM & ECAP DT node along with pin-mux details.
Also adds OF_DEV_AUXDATA for EHRPWM & ECAP driver to use EHRPWM & ECAP
clock.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
update device tree for exynos4 and exynos5
* tag 'dt-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (125 commits)
ARM: dts: add PDMA0 changes for exynos5440
ARM: dts: Add cpufreq controller node for Exynos5440 SoC
ARM: dts: Fix gmac clock ids due to changes in Exynos5440
ARM: dts: add device tree file for SD5v1 board
ARM: dts: update bootargs to boot from sda2 for exynos5440-ssdk5440
ARM: dts: add PMU support in exynos5440
ARM: dts: Add node for GMAC for exynos5440
ARM: dts: list the interrupts generated by pin-controller on Exynos5440
ARM: dts: Add FIMD DT binding Documentation
ARM: dts: Add FIMD node and display timing node to exynos4412-origen.dts
ARM: dts: Add FIMD node to exynos4
ARM: dts: Add SYSREG block node for S5P/Exynos4 SoC series
ARM: dts: Add display timing node to exynos5250-smdk5250.dts
ARM: dts: Add FIMD node to exynos5
ARM: dts: Add virtual GIC DT bindings for exynos5440
ARM: dts: Document usb clocks in samsung,exynos4210-ehci/ohci bindings
ARM: dts: add usb 2.0 clock references to exynos5250 device tree
ARM: dts: Add architected timer nodes for exynos5250
ARM: dts: Declare the gic as a15 compatible for exynos5250
ARM: dts: Add HDMI HPD and regulator node for Arndale board
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch selects the devbus driver as part of the mvebu default
config, along with the required options to detect and support
CFI flash memories.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Plat'home Openblocks AX3 has a 128 MiB NOR flash device connected
to the Device Bus. This commit adds the device tree node to support this device.
The SoC supports a flexible and dynamic decoding window allocation scheme;
but since this feature is still not implemented we need to specify the window
base address in the device tree node itself.
This base address has been selected in a completely arbitrary fashion.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada XP Development Board DB-MV784MP-GP has a NOR flash device
connected to the Device Bus. This commit adds the device tree node
to support this device.
This SoC supports a flexible and dynamic decoding window allocation
scheme; but since this feature is still not implemented we need
to specify the window base address in the device tree node itself.
This base address has been selected in a completely arbitrary fashion.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Armada 370 and Armada XP SoC have a Device Bus controller to
handle NOR, NAND, SRAM and FPGA devices.
This patch adds the device tree node to enable the controller.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The target and attributes for the PCIe address decoding windows were
not correct on Kirkwood for the second PCIe interface.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
From Tony Lindgren:
Device tree updates for omaps via Benoit Cousson <b-cousson@ti.com>.
Note that the branch has dependencies to two other branches:
- omap-devel-b-for-3.10 from Paul to get the AM33xx missing
hwmod and thus avoid a regression with Santosh's hwmod
cleanup including in this DT series [1]. It avoids breaking
bisect if this series is merged before Paul's fixes.
- omap-for-v3.10/usb branch to avoid nasty merge conflict in
omap3.dtsi and omap4.dtsi due to the DTS patches contained
in the USB branch because of a screw up by the unnamed person
typing this signed tag based on Benoit's comments.
[1] https://patchwork.kernel.org/patch/2366291/
* tag 'omap-for-v3.10/dt-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (69 commits)
ARM/dts: OMAP3: fix pinctrl-single configuration
ARM: dts: Add OMAP3430 SDP NOR flash memory binding
ARM: dts: Add NOR flash bindings for OMAP2420 H4
ARM: dts: Update OMAP3430 SDP NAND and ONENAND properties
ARM: dts: OMAP2+: Identify GPIO banks that are always powered
ARM: OMAP2+: Populate DMTIMER errata when using device-tree
ARM: dts: OMAP2+: Update DMTIMER compatibility property
ARM: OMAP: Add function to request timer by node
ARM: OMAP: Force dmtimer restore if context loss is not detectable
ARM: OMAP: Simplify dmtimer context-loss handling
ARM: dts: AM33XX: Corrects typo in interrupt field in SPI node
ARM: dts: OMAP4460: Add CPU OPP table
ARM: dts: omap4-panda: move generic sections to panda-common
ARM: dts: OMAP443x: Add CPU OPP table
ARM: dts: OMAP3: use twl4030 vdd1 regulator for CPU
ARM: dts: OMAP36xx: Add CPU OPP table
ARM: dts: OMAP34xx/35xx: Add CPU OPP table
Documentation: dt: gpio-omap: Move interrupt-controller from #interrupt-cells description
ARM: OMAP2+: hwmod: Don't call _init_mpu_rt_base if no sysc
ARM: OMAP2+: hwmod: extract module address space from DT blob
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Merging in dependencies for the omap/dt branch.
* omap/fixes-non-critical:
ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass
ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0
ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag
ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk
ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry
ARM: OMAP: fix typo "CONFIG_SMC91x_MODULE"
ARM: OMAP5: clock: No Freqsel on OMAP5 devices too
ARM: OMAP5: Make errata i688 workaround available
ARM: OMAP5: Update SAR memory layout for WakeupGen
ARM: OMAP5: Update SAR RAM base address
ARM: OMAP5: Reuse prm read_inst/write_inst
ARM: OMAP5: prm: Allow prm init to succeed
ARM: OMAP5: timer: Update the clocksource name as per clock data
ARM: OMAP5: Update SOC id detection code for ES2
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch fix the regression introduced by the commit 3202bf0157
"arm: mvebu: Improve the SMP support of the interrupt controller":
GPIO IRQ were no longer delivered to the CPUs.
To be delivered to a CPU an interrupt must be enabled at CPU level and
at interrupt source level. Before the offending patch, all the
interrupts were enabled at source level during map() function. Mask()
and unmask() was done by handling the per-CPU part. It was fine when
running in UP with only one CPU.
The offending patch added support for SMP, in this case mask() and
unmask() was done by handling the interrupt source level part. The
per-CPU level part was handled by the affinity API to select the CPU
which will receive the interrupt. (Due to some hardware limitation
only one CPU at a time can received a given interrupt).
For "normal" interrupt __setup_irq() was called when an irq was
registered. irq_set_affinity() is called from this function, which
enabled the interrupt on one of the CPUs. Whereas for GPIO IRQ which
were chained interrupts, the irq_set_affinity() was never called and
none of the CPUs was selected to receive the interrupt.
With this patch all the interrupt are enable on the current CPU during
map() function. Enabling the interrupts on a CPU doesn't depend
anymore on irq_set_affinity() and then the chained irq are not anymore
a special case. However the CPU which will receive the irq can still
be modify later using irq_set_affinity().
Tested with Mirabox (A370) and Openblocks AX3 (AXP), rootfs mounted
over NFS, compiled with CONFIG_SMP=y/N.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reported-by: Ryan Press <ryan@presslab.us>
Investigated-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Ryan Press <ryan@presslab.us>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: device tree changes
This branch contains the majority of the device tree changes for Tegra.
Highlights include:
* Many changes for Tegra114, and the Dalmore board, to enable pinctrl,
SDHCI/MMC, PWM, DMA, I2C, KBC, SPI, battery, regulators.
* Adding or enabling suspend wakeup sources on many boards, and adding
suspend timing parameters, to support the system suspend patches.
* Adding clocks to the audio-related nodes, so that in 3.11, the audio
driver can pull these clocks from device tree rather than hard-coding
clock names.
* Some small DT fixes/cleanup.
This branch is based on the previous clk pull request.
* tag 'tegra-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (25 commits)
clk: tegra: Fix cdev1 and cdev2 IDs
ARM: dts: tegra: add the PM configurations of PMC
ARM: tegra: add non-removable and keep-power-in-suspend property for MMC
ARM: tegra: whistler: add wakeup source for KBC
ARM: tegra: add power gpio keys to DT
ARM: tegra: keep power on to SD slot on Dalmore
ARM: tegra: add clocks property to AC'97 sound nodes
ARM: tegra: add clocks property to sound nodes
ARM: tegra: dalmore: add fixed regulator node
ARM: tegra: dalmore: add TPS65090 node
ARM: tegra: dalmore: add cpu regulator node
ARM: tegra: Add sbs-battery node to Dalmore
ARM: tegra: add DT binding for i2c-tegra
ARM: tegra: add SPI nodes to Tegra114 DT
ARM: tegra: add KBC nodes to Tegra114 DT
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114
ARM: tegra: add I2C nodes to Tegra114 DT
ARM: tegra: add APB DMA nodes to Tegra114 DT
ARM: tegra: add PWM nodes to Tegra114 DT
ARM: tegra: fix the status of PWM DT nodes
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Shawn Guo <shawn.guo@linaro.org>:
The mxs device tree changes for 3.10:
* Move enet_out clk into device tree and have fec driver handle it.
* Convert mxsfb driver to generic display timings bindings, and remove
the mxsfb auxdata from platform code.
* Add generic DMA device tree binding for mxs-dma, and convert the most
of client device drivers to it.
* Change mxsfb driver to use regulator for controlling power of panel.
* A few device tree source updates
* tag 'mxs-dt-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (23 commits)
video: mxsfb: Introduce regulator support
ARM: dts: cfa10036: Add touchscreen support to the CFA-10049
ARM: dts: imx23-olinuxino: mark sdcard cd as broken
serial: mxs-auart: move to use generic DMA helper
mtd: gpmi: move to use generic DMA helper
i2c: i2c-mxs: move to use generic DMA helper
spi: mxs-spi: move to use generic DMA helper
mmc: mxs-mmc: move to use generic DMA helper
dma: mxs-dma: move to generic device tree binding
dma: mxs-dma: use devm_* managed functions
ARM: dts: add generic DMA device tree binding for mxs-dma
pinctrl: pinctrl-mxs: document the missing pull-ups
ARM: cfa10036: add one wire bitbanging to the cfa10049
video: mxsfb: remove mxsfb_platform_data
ARM: mxs: move display timing configurations into device tree
video: mxsfb: get display timings from device tree
video: mxsfb: remove dotclk_delay from platform_data
video: mxsfb: remove fb_phys/fb_size from platform_data
video: mxsfb: use devm_* managed functions
ARM: mxs: remove unneeded enet_out clk initialization
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix 'function-mask' referring to TRM (Omap 36xx) Section 13.4.4:
"Pad Functional Multiplexing and Configuration".
- Fix 'omap3_pmx_wkup' referring to TRM Table 13-6:
"Wkup Control Module Pad Configuration Register Fields".
Note that these fixes are not critical currently as we
are not yet using the missing range of pinmux registers
at this point.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
[tony@atomide.com: updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Thomas Abraham