This patch adds a missing hwmod entry for the HDQ/1-Wire module present
in the AM3505/17 CPUs.
This restores 1-Wire support to our AM3505 boards. We think it probably
stopped working with commit 96b1b29d37
ARM: OMAP2+: HDQ1W: use omap_device
Signed-off-by: Raphael Assenat <raph@8d.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On our AM3505 based board, dpi.c complains that there is no VDDS_DSI
regulator and the framebuffer cannot be enabled. However, this check
does not seem to apply to AM3505/17 chips.
This patch adds new features list for AM35xxx, which is the same as for
OMAP3 except the VDDS_DSI is removed.
Signed-off-by: Raphael Assenat <raph@8d.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This patch adds support for maxim ds1825 based 1-wire temperature sensors.
Signed-off-by: Raphael Assenat <raph@8d.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add missing definitions for the AM3505/3517 UART4 such
as DMAs, INTs and base address.
Signed-of-by: Raphael Assenat <raph@8d.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch replaces the hardcoded 255 seconds limit for a real limit based on
oscr_freq.
Also, the 'firmware_version' field is changed to '1' to allow the user
space application to easily detect that this driver supports a higher
maximum timeout.
Signed-off-by: Raphael Assenat <raph@8D.com>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
When gpio_direction_output() is called, led_dat->active_low is used
as default value. This means that the led will always be off by
default. cdev.brightness should really have been set to LED_OFF
unconditionally to reflect this behavior.
Signed-off-by: Raphael Assenat <raph@8d.com>
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
This contains the following changes:
* Overlay surface alpha is configured separately from the overlay. This
prevents display glitches (configure and fill the overlay first, set
alpha to a visible value next)
* Added an ioctl for configuring transparency of the Overlay and graphics
planes. Blend mode, colorkey mode and global alpha mode are supported.
* Added an ioctl for setting the plane order. The overlay plance can be placed
over or
under the graphics plane.
* Added an ioctl for setting and reading chip registers, with mask.
* Updated copyright for 2007
[adaplas]
* Coding style changes
Signed-off-by: Raphael Assenat <raph@8d.com>
Signed-off-by: Antonino Daplas <adaplas@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This patch adds support for GPIO connected leds via the new GPIO framework.
Information about leds (gpio, polarity, name, default trigger) is passed
to the driver via platform_data.
Signed-off-by: Raphael Assenat <raph@8d.com>
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Here's a patch which adds my device to the list.
This patch enables the broken suspend quirk for the PCI OHCI controller
present in the IT8152F/G RISC-to-PCI Companion Chip.
Signed-off-by: Raphael Assenat <raph@8d.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch adds a way to create and use the video plane (YUV overlay) and
scaling video scaling features of the chip.
The overlay is configured, resized and modified using a device specific
ioctl.
Also included in this patch:
- If no platform data was passed, print an error and exit instead of crashing.
- Added a write_reg(_dly) macro. This improves readability when
manipulating chip registers. (no more udelay() after each write).
- Comments about some issues.
Signed-off-by: Raphael Assenat <raph@8d.com>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Acked-by: James Simmons <jsimmons@infradead.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This patch fixes debugfs for mbxfb and adds some missing registers.
The way registers were read was out of sync with the rest of the driver (direct
access instead of using readl())
sdram controller registers are now accessible in the sdram/ subdirectory and
some other registers are grouped in the misc/ subdirectory.
Signed-off-by: Raphael Assenat <raph@8d.com>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Acked-by: James Simmons <jsimmons@infradead.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This patch fixes a bug where we obtain a smaller resolution than requested.
(eg: in 640x480, only 639x479 usable pixels).
This was due to 1 being substracted from the xres and yres vars two times:
first in mbxfb.c and then in the macros from reg_bits.h.
This patch removes the minus ones from the mbxfb.c file. Tested and works.
Signed-off-by: Raphael Assenat <raph@8d.com>
Signed-off-by: Antonino Daplas <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This is a workaround for what I think is a bug in the 2700G chip.
The PLL output frequency is adustable using 3 values (M, N and P. See code
for formula). The N value range is documented to be 1 to 7 but when it is set
to 1, the output frequency is lower than it should be (divided by 2), giving
unexpected results such as no sync on a CRT display.
This patch prevents N=1 when searching for the best value for the requested
pixclock.
Signed-off-by: Raphael Assenat <raph@8d.com>
Signed-off-by: Antonino Daplas <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Raphael Assenat