Commit Graph
32 Commits
Author SHA1 Message Date
Ma Ling 269833bd5a x86/asm: Clean up copy_page_*() comments and code
Modern CPUs use fast-string instruction to accelerate copy
performance, by combining data into 128 bit chunks.

Modify comments and coding style to match it.

Signed-off-by: Ma Ling <ling.ma@intel.com>
Cc: iant@google.com
Link: http://lkml.kernel.org/r/1350503565-19167-1-git-send-email-ling.ma@intel.com
[ Cleaned up the clean up. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2012-10-24 12:42:47 +02:00
Ma Ling 3b4b682bec x86, mem: Optimize memmove for small size and unaligned cases
movs instruction will combine data to accelerate moving data,
however we need to concern two cases about it.

1. movs instruction need long lantency to startup,
   so here we use general mov instruction to copy data.
2. movs instruction is not good for unaligned case,
   even if src offset is 0x10, dest offset is 0x0,
   we avoid and handle the case by general mov instruction.

Signed-off-by: Ma Ling <ling.ma@intel.com>
LKML-Reference: <1284664360-6138-1-git-send-email-ling.ma@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-09-24 18:57:11 -07:00
Ma Ling 59daa706fb x86, mem: Optimize memcpy by avoiding memory false dependece
All read operations after allocation stage can run speculatively,
all write operation will run in program order, and if addresses are
different read may run before older write operation, otherwise wait
until write commit. However CPU don't check each address bit,
so read could fail to recognize different address even they
are in different page.For example if rsi is 0xf004, rdi is 0xe008,
in following operation there will generate big performance latency.
1. movq (%rsi),	%rax
2. movq %rax,	(%rdi)
3. movq 8(%rsi), %rax
4. movq %rax,	8(%rdi)

If %rsi and rdi were in really the same meory page, there are TRUE
read-after-write dependence because instruction 2 write 0x008 and
instruction 3 read 0x00c, the two address are overlap partially.
Actually there are in different page and no any issues,
but without checking each address bit CPU could think they are
in the same page, and instruction 3 have to wait for instruction 2
to write data into cache from write buffer, then load data from cache,
the cost time read spent is equal to mfence instruction. We may avoid it by
tuning operation sequence as follow.

1. movq 8(%rsi), %rax
2. movq %rax,	8(%rdi)
3. movq (%rsi),	%rax
4. movq %rax,	(%rdi)

Instruction 3 read 0x004, instruction 2 write address 0x010, no any
dependence.  At last on Core2 we gain 1.83x speedup compared with
original instruction sequence.  In this patch we first handle small
size(less 20bytes), then jump to different copy mode. Based on our
micro-benchmark small bytes from 1 to 127 bytes, we got up to 2X
improvement, and up to 1.5X improvement for 1024 bytes on Corei7.  (We
use our micro-benchmark, and will do further test according to your
requirment)

Signed-off-by: Ma Ling <ling.ma@intel.com>
LKML-Reference: <1277753065-18610-1-git-send-email-ling.ma@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-08-23 14:56:41 -07:00
Ma, Ling fdf4289679 x86, mem: Don't implement forward memmove() as memcpy()
memmove() allow source and destination address to be overlap, but
there is no such limitation for memcpy().  Therefore, explicitly
implement memmove() in both the forwards and backward directions, to
give us the ability to optimize memcpy().

Signed-off-by: Ma Ling <ling.ma@intel.com>
LKML-Reference: <C10D3FB0CD45994C8A51FEC1227CE22F0E483AD86A@shsmsx502.ccr.corp.intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-08-23 14:14:27 -07:00
Ma Ling 213c2e6431 drm/i915: select TV format according to connector type
For integrated TV there are 3 connector types: S-VIDEO, Composite and
Component(YprPb). Those tv formats whose component flag is true should
be assigned to Component connector, others are for S-VIDEO and Composite.
The patch intends to find appropriate tv format for each connector.
In such case it will return the correct modeline to user space. Otherwise
it will return the incorrect modeline when S-video/composite is connected.

Signed-off-by: Ma Ling <ling.ma@intel.com>
reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-04 13:05:10 -07:00
Ma Ling f8aed700c6 drm/i915: Set crtc/clone mask in different output devices
Based on Bspec each encoder has different sharing pipe property,
i.e. Integrated or SDVO TV both will occupy one pipe exclusively,
and sdvo-non-tv and crt are allowed to share one. The patch moves
sharing judgment into differnet output functions, and sets the right
clone bit.

This fixes both HDMI outputs choosing the same pipe.

https://bugs.freedesktop.org/show_bug.cgi?id=22247

Signed-off-by: Ma Ling <ling.ma@intel.com>
Reviewed-by : Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-08-24 17:01:33 -07:00
Ma Ling 27185ae1b7 drm/i915: Always use SDVO_B detect bit for SDVO output detection.
After the following commit is shipped, the SDVO C detection will depend on
the SDVO_C/DP detion bit.
commit 13520b051e
Author: Kristian Høgsberg <krh@redhat.com>
Date:   Fri Mar 13 15:42:14 2009 -0400

    drm/i915: Read the right SDVO register when detecting SVDO/HDMI.

According to the spec we should continue to detect the SDVO_B/C based on
the SDVO_B detection bit.  The new detection bit on G4X platform is for
the HDMI_C detection rather than SDVO_C detection.

https://bugs.freedesktop.org/show_bug.cgi?id=20639

Signed-off-by: Ma Ling <ling.ma@intel.com>
Acked-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-08-24 16:58:44 -07:00
ling.ma@intel.com 0c2e39525b drm/i915: Add support for dual-channel LVDS on 8xx.
This corresponds to a fix to UMS back in 2007.  Fixes fd.o bug #20115.

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-30 10:05:17 -07:00
ling.ma@intel.com 2b8d33f714 drm/i915: Return disconnected for SDVO DVI when there's no digital EDID.
The patch fixed a bug on MP965-D.  When VGA is connected to a DVI-I connector,
it incorrectly shows sdvo dvi as connected.

Signed-off-by: Ma Ling <ling.ma@intel.com>
[anholt: hand-resolved against previous commit and fixed up commit message]
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-30 10:05:12 -07:00
ling.ma@intel.com fb7a46f3cc drm/i915: Choose real sdvo output according to result from detection
Baed on Eric's idea in order to handle multiple sdvo encoders
we implement another approach to dynamically chose real one
encoder after detection, which is contrasted with patch -
drm/i915:Construct all possible sdvo outputs for sdvo encoder.

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-29 15:40:04 -07:00
ling.ma@intel.com bcae2ca81c drm/i915: Set preferred mode for integrated TV according to TV format
In order to get best possible quality image we chose 640x480 for
NTSC, PAL and 480p, 1280x720 for 720p, 1920x1080 for 1080i/p
TV format respectively.

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-29 15:19:17 -07:00
ling.ma@intel.com 2ded9e2747 drm/i915: hdmi detection according by reading edid
According to investigations from windows team ,hw team,
and our test results on all 4x platofrms available
(gm45, g45b, q45, g45a, g45c, g41a, and g41), we find
currently Hot plug live status and Hot plug interrupt
detection are not reliable, sometime the results from
the two approaches are contradicts. So we chose edid
detection for hdmi output.

Signed-off-by: Ma Ling <ling.ma@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-22 19:02:23 -07:00
ling.ma@intel.com febc7694a5 drm/i915: Disable VGA output when doing DRM_MODE_DPMS_OFF.
Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-07 11:49:01 -07:00
ling.ma@intel.com 8e4d36b993 drm/i915: crt fetch EDID by DVI-I converter on G4x platform
Usually crt mainly get modes via GPIOA ports.
However on G4X platform we need to probe possible
ports for DVI-I, which could be wired to GPIOD,
then fetch our desired EDID, i.e on DG45ID platform
we successfully fetch EDID by GPIOD port.

It fixed freedesktop.org bug #21084

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-07 11:04:22 -07:00
ling.ma@intel.com 12682a9711 drm/i915: enable sdvo lvds scaling function.
Currently we implemented basic sdvo lvds function,
But except for sdvo lvds fixed mode, we can not switch
to other modes, otherwise display get black. The patch
handle three operations to enable sdvo lvds. At first
duplicate sdvo fixed mode for adjustment, then according
to fixed mode line valid all modes, at last adjust input
mode to fit our requirement.

Acked by Li Peng <peng.li@linux.intel.com>
Signed-off-by: Ma Ling <ling.ma@intel.com>
Reviewed-by: Ian Romanick <idr@freedesktop.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-01 11:44:45 -07:00
ling.ma@intel.com 6ff4fd0567 drm/i915: Set SSC frequency for 8xx chips correctly
All 8xx class chips have the 66/48 split, not just 855.

Signed-off-by: Ma Ling <ling.ma@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-01 11:20:44 -07:00
ling.ma@intel.com 8ed9a5bc9c drm/i915: set TV detection mode when tv is already connected
We used load_detect_temp flag to determine whether to set tv to the test
mode. However if the TV already has a mode set, we still need to set the
test mode to determine connection.  This results in blinking, but there is
no other reliable way to determine TV connection.

freedesktop.org bug #22035

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-06-22 20:27:47 -07:00
Ma Ling cb66c692d1 drm/i915: Set correct TV detection voltage level override values
We detect TV connect status by setting DAC voltage level override
values as 0.7 voltage for DAC_A/B/C. The corresponding 2-bits shold be 0x2,
In order correctly to set last bit as 0, at first we must clean it.

It fixed freedesktop.org bug #21204

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-06-05 12:53:26 +00:00
Ma Ling e4a5d54f92 drm/i915: Add support for VGA load detection (pre-945).
Two approaches for VGA detections: hot plug detection for 945G onwards
and load pipe detection for Pre-945G.  Load pipe detection will get one free
pipe, set border color as red and blue, then check CRT status by
swf register.  This is a sync-up with the 2D driver.

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-05-26 10:34:47 -07:00
Ma Ling 619ac3b75a drm/i915: Use an I2C algo to do the flip to SDVO DDC bus.
Previously, we would set the control bus switch before calls were made
to request EDID information over DDC.  But recently the DDC code started
doing multiple I2C transfers to get the EDID extensions as well.  This
tripped up SDVO, because the control bus switch is only in effect until
the next STOP after a START.  By doing our own algo, we can wrap each i2c
transaction on the DDC I2C bus with the control bus switch it requires.

freedesktop.org bug #21042

Signed-off-by: Ma Ling <ling.ma@intel.com>
[anholt: Hand application for conflict, fixed error path]
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-05-22 13:21:31 -07:00
Ma Ling 7086c87fb1 drm/i915: Return SDVO LVDS VBT mode if no EDID modes are detected.
Some new SDVO LVDS hardware doesn't have DDC available, and this should
fix the display on it.

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-05-22 12:56:02 -07:00
Ma Ling 8863170628 drm/i915: Fetch SDVO LVDS mode lines from VBT, then reserve them
Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-05-22 12:54:22 -07:00
Ma Ling 9d2949a4cd drm/i915: Set HDMI hot plug interrupt enable for only the output in question.
We detect HDMI output connection status by writing to HOT Plug Interrupt
Detect Enable bit in PORT_HOTPLUG_EN.  The behavior will generate a specified
interrupt, which is caught by audio driver, but during one detection driver
set all Detect Enable bits of HDMIB, HDMIC HDMID, and generate wrong
interrupt signals for current output, according to the signals audio driver
misunderstand device status. The patch intends to handle corresponding
output precisely.

It fixed freedesktop.org bug #21371

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-05-14 16:00:31 -07:00
Ma Ling c9ed4486bd drm/i915: Include 965GME pci ID in IS_I965GM(dev) to match UMS.
It fixed bug #21659

Signed-off-by: Ma Ling <ling.ma@intel.com>
[anholt: hand-applied because git-am is too picky]
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-05-14 16:00:30 -07:00
Ma Ling e92597cfff drm/i915: Use the GM45 VGA hotplug workaround on G45 as well.
Although spec say CRT_HOTPLUG_ACTIVATION_PERIOD_64 is only useful for
mobile platform, it is also required to detect vga on G4x desktops correctly.
Tested on G45/G43/Q45 platforms with no regressions.

It fixed freedesktop.org bug #21120 and part of bug #21210

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-05-14 16:00:29 -07:00
Ma Ling 77d26dc9b9 drm: clean dirty memory after device release
In current code we register/unregister connector object by
drm_sysfs_connector_add/remove function.

However under some cases, we need to dynamically register or unregister device
multiple times, so we have to go through register -> unregister ->register
routine.

Because after device_unregister function our memory is dirty, we need to do
clean operation in order to re-register the device, otherwise the system
will crash.  The patch intends to clean device after device release.

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-04-20 10:03:46 +10:00
Ma Ling 9dff6af860 drm/i915: sync hdmi detection by hdmi identifier with 2D
Currently we detect HDMI monitor by hardware detection, but if an HDMI-DVI
adapter is used to connect a DVI monitor, hardware detection will incorrectly
take monitor as HDMI. HDMI spec says any device containing IEEE registration
identifier will be treated as HDMI device.  The patch intends to detect HDMI
monitor by drm_detect_hdmi_monitor function which follows that rule.

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-04-08 10:18:17 -07:00
Ma Ling 6b731a65c8 drm/i915: avoid hanging on to a stale pointer to raw_edid.
drm_get_edid will store edid into raw_edid, so when freeing edid memory,
at the same time clean raw_edid pointer.

Signed-off-by: Ma Ling <ling.ma@intel.com>
[anholt: Note that raw_edid is not currently used anywhere]
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-04-01 11:59:19 -07:00
Ma Ling f23c20c83d drm: detect hdmi monitor by hdmi identifier (v3)
Sometime we need to communicate with HDMI monitor by sending audio or video
info frame, so we have to know monitor type. However if user utilize HDMI-DVI adapter to connect DVI monitor, hardware detection will incorrectly show the monitor is HDMI. HDMI spec tell us that any device containing IEEE registration Identifier will be treated as HDMI device.  The patch intends to detect HDMI monitor by this rule.

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-03-29 18:31:49 +10:00
Ma Ling 167f3a04d7 drm: read EDID extensions from monitor
Usually drm read basic EDID, that is enough for us, but since igital display
were introduced i.e. HDMI monitor, sometime we need to interact with monitor by
EDID extension information,

EDID extensions include audio/video data block, speaker allocation and vendor specific data blocks.

This patch intends to read EDID extensions from digital monitor for users.

Signed-off-by: Ma Ling <ling.ma@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-03-29 18:31:41 +10:00
Ma Ling d490609321 drm/i915: Use a different PLL timing search function on G4X.
This improves the PLL timings according to the suggestion of the hardware
engineers.  This results in some outputs being able to sync that weren't
able to before.

This is part of fixing fd.o bug #17508.

Signed-off-by: Ma Ling <ling.ma@intel.com>
[anholt: cleaned up a couple of redundant comments]
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-03-27 14:45:12 -07:00
Ma Ling 044c7c415a drm/i915: Use documented PLL timing limits for G4X platform
The values come from the internal reference spreadsheet on PLL
timing limits for the G4X chipsets.

Part of fixing fd.o bug #17508

Signed-off-by: Ma Ling <ling.ma@intel.com>
[anholt: Cleaned up some whitespace]
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-03-27 14:45:11 -07:00