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drm/amdgpu: rename register headers to dcn_2_0_1

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They were named with the incorrect dcn version.

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Sun peng Li <sunpeng.li@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Leo Li
2024-12-10 10:37:34 -05:00
committed by Alex Deucher
parent 859a661eb4
commit ecc5278ce0
5 changed files with 10 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
+2 -2
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@@ -34,8 +34,8 @@
#include "dm_services.h"
#include "cyan_skillfish_ip_offset.h"
#include "dcn/dcn_2_0_3_offset.h"
#include "dcn/dcn_2_0_3_sh_mask.h"
#include "dcn/dcn_2_0_1_offset.h"
#include "dcn/dcn_2_0_1_sh_mask.h"
#include "clk/clk_11_0_1_offset.h"
#include "clk/clk_11_0_1_sh_mask.h"
drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
+2 -2
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@@ -30,8 +30,8 @@
#include "../dce110/irq_service_dce110.h"
#include "irq_service_dcn201.h"
#include "dcn/dcn_2_0_3_offset.h"
#include "dcn/dcn_2_0_3_sh_mask.h"
#include "dcn/dcn_2_0_1_offset.h"
#include "dcn/dcn_2_0_1_sh_mask.h"
#include "cyan_skillfish_ip_offset.h"
#include "soc15_hw_ip.h"
drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
+2 -2
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@@ -59,8 +59,8 @@
#include "cyan_skillfish_ip_offset.h"
#include "dcn/dcn_2_0_3_offset.h"
#include "dcn/dcn_2_0_3_sh_mask.h"
#include "dcn/dcn_2_0_1_offset.h"
#include "dcn/dcn_2_0_1_sh_mask.h"
#include "dpcs/dpcs_2_0_3_offset.h"
#include "dpcs/dpcs_2_0_3_sh_mask.h"
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_3_offset.h → drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_1_offset.h
+2 -2
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@@ -19,8 +19,8 @@
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _dcn_2_0_3_OFFSET_HEADER
#define _dcn_2_0_3_OFFSET_HEADER
#ifndef _dcn_2_0_1_OFFSET_HEADER
#define _dcn_2_0_1_OFFSET_HEADER
// addressBlock: dce_dc_dccg_dccg_dispdec
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_3_sh_mask.h → drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_1_sh_mask.h
+2 -2
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@@ -18,8 +18,8 @@
* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _dcn_2_0_3_SH_MASK_HEADER
#define _dcn_2_0_3_SH_MASK_HEADER
#ifndef _dcn_2_0_1_SH_MASK_HEADER
#define _dcn_2_0_1_SH_MASK_HEADER
// addressBlock: dce_dc_dccg_dccg_dispdec