Merge tag 'qcom-dts-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm dts updates for v5.13 This adds Bluetooth support on the Samsung Galaxy S5, corrects the mount matrix for the IMU on Nexus 5 and corrects the fuel gauge irq trigger for the two devices. * tag 'qcom-dts-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: msm8974-klte: Add bluetooth support ARM: dts: qcom: msm8974: add blsp2_uart8 ARM: dts: qcom: msm8974-samsung-klte: correct fuel gauge interrupt trigger level ARM: dts: qcom: msm8974-lge-nexus5: correct fuel gauge interrupt trigger level ARM: dts: qcom: msm8974-hammerhead: add mount matrix for IMU Link: https://lore.kernel.org/r/20210409162359.776076-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@@ -529,6 +529,10 @@
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pinctrl-names = "default";
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pinctrl-0 = <&mpu6515_pin>;
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mount-matrix = "0", "-1", "0",
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"-1", "0", "0",
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"0", "0", "1";
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i2c-gate {
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#address-cells = <1>;
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#size-cells = <0>;
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@@ -575,7 +579,7 @@
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maxim,rcomp = /bits/ 8 <0x4d>;
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interrupt-parent = <&msmgpio>;
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interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
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interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&fuelgauge_pin>;
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@@ -322,6 +322,27 @@
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status = "okay";
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};
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/* blsp2_uart8 */
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serial@f995e000 {
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status = "okay";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&blsp2_uart8_pins_active>;
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pinctrl-1 = <&blsp2_uart8_pins_sleep>;
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bluetooth {
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compatible = "brcm,bcm43540-bt";
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max-speed = <3000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&bt_pins>;
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device-wakeup-gpios = <&msmgpio 91 GPIO_ACTIVE_HIGH>;
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shutdown-gpios = <&gpio_expander 9 GPIO_ACTIVE_HIGH>;
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interrupt-parent = <&msmgpio>;
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interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "host-wakeup";
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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input-name = "gpio-keys";
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@@ -356,6 +377,35 @@
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};
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pinctrl@fd510000 {
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blsp2_uart8_pins_active: blsp2-uart8-pins-active {
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pins = "gpio45", "gpio46", "gpio47", "gpio48";
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function = "blsp_uart8";
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drive-strength = <8>;
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bias-disable;
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};
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blsp2_uart8_pins_sleep: blsp2-uart8-pins-sleep {
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pins = "gpio45", "gpio46", "gpio47", "gpio48";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-down;
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};
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bt_pins: bt-pins {
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hostwake {
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pins = "gpio75";
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function = "gpio";
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drive-strength = <16>;
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input-enable;
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};
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devwake {
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pins = "gpio91";
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function = "gpio";
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drive-strength = <2>;
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};
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};
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sdhc1_pin_a: sdhc1-pin-active {
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clk {
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pins = "sdc1_clk";
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@@ -717,7 +767,7 @@
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maxim,rcomp = /bits/ 8 <0x56>;
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interrupt-parent = <&pma8084_gpios>;
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interrupts = <21 IRQ_TYPE_EDGE_FALLING>;
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interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&fuelgauge_pin>;
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@@ -715,6 +715,15 @@
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status = "disabled";
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};
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blsp2_uart8: serial@f995e000 {
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compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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reg = <0xf995e000 0x1000>;
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interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
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clock-names = "core", "iface";
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status = "disabled";
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};
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blsp2_uart10: serial@f9960000 {
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compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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reg = <0xf9960000 0x1000>;
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