Merge branch 'net-stmmac-socfpga-1000basex-support-and-cleanups'
Maxime Chevallier says: ==================== net: stmmac: socfpga: 1000BaseX support and cleanups This small series sorts-out 1000BaseX support and does a bit of cleanup for the Lynx conversion. Patch 1 makes sure that we set the right phy_mode when working in 1000BaseX mode, so that the internal GMII is configured correctly. Patch 2 removes a check for phy_device upon calling fix_mac_speed(). As the SGMII adapter may be chained to a Lynx PCS, checking for a phy_device to be attached to the netdev before enabling the SGMII adapter doesn't make sense, as we won't have a downstream PHY when using 1000BaseX. Patch 3 cleans an unused field from the PCS conversion. v1: https://lore.kernel.org/20250422094701.49798-1-maxime.chevallier@bootlin.com v2: https://lore.kernel.org/20250423104646.189648-1-maxime.chevallier@bootlin.com ==================== Link: https://patch.msgid.link/20250424071223.221239-1-maxime.chevallier@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@@ -59,17 +59,15 @@ struct socfpga_dwmac {
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void __iomem *sgmii_adapter_base;
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bool f2h_ptp_ref_clk;
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const struct socfpga_dwmac_ops *ops;
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struct mdio_device *pcs_mdiodev;
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};
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static void socfpga_dwmac_fix_mac_speed(void *priv, int speed, unsigned int mode)
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static void socfpga_dwmac_fix_mac_speed(void *bsp_priv, int speed,
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unsigned int mode)
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{
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struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)priv;
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struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)bsp_priv;
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struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dwmac->dev));
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void __iomem *splitter_base = dwmac->splitter_base;
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void __iomem *sgmii_adapter_base = dwmac->sgmii_adapter_base;
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struct device *dev = dwmac->dev;
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struct net_device *ndev = dev_get_drvdata(dev);
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struct phy_device *phy_dev = ndev->phydev;
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u32 val;
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if (sgmii_adapter_base)
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@@ -96,7 +94,9 @@ static void socfpga_dwmac_fix_mac_speed(void *priv, int speed, unsigned int mode
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writel(val, splitter_base + EMAC_SPLITTER_CTRL_REG);
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}
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if (phy_dev && sgmii_adapter_base)
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if ((priv->plat->phy_interface == PHY_INTERFACE_MODE_SGMII ||
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priv->plat->phy_interface == PHY_INTERFACE_MODE_1000BASEX) &&
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sgmii_adapter_base)
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writew(SGMII_ADAPTER_ENABLE,
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sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG);
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}
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@@ -256,6 +256,7 @@ static int socfpga_set_phy_mode_common(int phymode, u32 *val)
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case PHY_INTERFACE_MODE_MII:
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case PHY_INTERFACE_MODE_GMII:
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_1000BASEX:
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*val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII;
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break;
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case PHY_INTERFACE_MODE_RMII:
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