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arm64: dts: qcom: sm6115: change labels to lower-case

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DTS coding style expects labels to be lowercase.  No functional impact.
Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-7-0505bc7d2c56@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Krzysztof Kozlowski
2024-10-22 19:14:34 -05:00
committed by Bjorn Andersson
parent 1683a3c760
commit dfe312b825
2 changed files with 84 additions and 84 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm64/boot/dts/qcom/sm4250.dtsi
+8 -8
View File
@@ -5,34 +5,34 @@
#include "sm6115.dtsi"
&CPU0 {
&cpu0 {
compatible = "qcom,kryo240";
};
&CPU1 {
&cpu1 {
compatible = "qcom,kryo240";
};
&CPU2 {
&cpu2 {
compatible = "qcom,kryo240";
};
&CPU3 {
&cpu3 {
compatible = "qcom,kryo240";
};
&CPU4 {
&cpu4 {
compatible = "qcom,kryo240";
};
&CPU5 {
&cpu5 {
compatible = "qcom,kryo240";
};
&CPU6 {
&cpu6 {
compatible = "qcom,kryo240";
};
&CPU7 {
&cpu7 {
compatible = "qcom,kryo240";
};
arch/arm64/boot/dts/qcom/sm6115.dtsi
+76 -76
View File
@@ -40,7 +40,7 @@
#address-cells = <2>;
#size-cells = <0>;
CPU0: cpu@0 {
cpu0: cpu@0 {
device_type = "cpu";
compatible = "qcom,kryo260";
reg = <0x0 0x0>;
@@ -48,18 +48,18 @@
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
enable-method = "psci";
next-level-cache = <&L2_0>;
next-level-cache = <&l2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
power-domains = <&CPU_PD0>;
power-domains = <&cpu_pd0>;
power-domain-names = "psci";
L2_0: l2-cache {
l2_0: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};
CPU1: cpu@1 {
cpu1: cpu@1 {
device_type = "cpu";
compatible = "qcom,kryo260";
reg = <0x0 0x1>;
@@ -67,13 +67,13 @@
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
enable-method = "psci";
next-level-cache = <&L2_0>;
next-level-cache = <&l2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
power-domains = <&CPU_PD1>;
power-domains = <&cpu_pd1>;
power-domain-names = "psci";
};
CPU2: cpu@2 {
cpu2: cpu@2 {
device_type = "cpu";
compatible = "qcom,kryo260";
reg = <0x0 0x2>;
@@ -81,13 +81,13 @@
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
enable-method = "psci";
next-level-cache = <&L2_0>;
next-level-cache = <&l2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
power-domains = <&CPU_PD2>;
power-domains = <&cpu_pd2>;
power-domain-names = "psci";
};
CPU3: cpu@3 {
cpu3: cpu@3 {
device_type = "cpu";
compatible = "qcom,kryo260";
reg = <0x0 0x3>;
@@ -95,13 +95,13 @@
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
enable-method = "psci";
next-level-cache = <&L2_0>;
next-level-cache = <&l2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
power-domains = <&CPU_PD3>;
power-domains = <&cpu_pd3>;
power-domain-names = "psci";
};
CPU4: cpu@100 {
cpu4: cpu@100 {
device_type = "cpu";
compatible = "qcom,kryo260";
reg = <0x0 0x100>;
@@ -109,18 +109,18 @@
enable-method = "psci";
capacity-dmips-mhz = <1638>;
dynamic-power-coefficient = <282>;
next-level-cache = <&L2_1>;
next-level-cache = <&l2_1>;
qcom,freq-domain = <&cpufreq_hw 1>;
power-domains = <&CPU_PD4>;
power-domains = <&cpu_pd4>;
power-domain-names = "psci";
L2_1: l2-cache {
l2_1: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};
CPU5: cpu@101 {
cpu5: cpu@101 {
device_type = "cpu";
compatible = "qcom,kryo260";
reg = <0x0 0x101>;
@@ -128,13 +128,13 @@
capacity-dmips-mhz = <1638>;
dynamic-power-coefficient = <282>;
enable-method = "psci";
next-level-cache = <&L2_1>;
next-level-cache = <&l2_1>;
qcom,freq-domain = <&cpufreq_hw 1>;
power-domains = <&CPU_PD5>;
power-domains = <&cpu_pd5>;
power-domain-names = "psci";
};
CPU6: cpu@102 {
cpu6: cpu@102 {
device_type = "cpu";
compatible = "qcom,kryo260";
reg = <0x0 0x102>;
@@ -142,13 +142,13 @@
capacity-dmips-mhz = <1638>;
dynamic-power-coefficient = <282>;
enable-method = "psci";
next-level-cache = <&L2_1>;
next-level-cache = <&l2_1>;
qcom,freq-domain = <&cpufreq_hw 1>;
power-domains = <&CPU_PD6>;
power-domains = <&cpu_pd6>;
power-domain-names = "psci";
};
CPU7: cpu@103 {
cpu7: cpu@103 {
device_type = "cpu";
compatible = "qcom,kryo260";
reg = <0x0 0x103>;
@@ -156,46 +156,46 @@
capacity-dmips-mhz = <1638>;
dynamic-power-coefficient = <282>;
enable-method = "psci";
next-level-cache = <&L2_1>;
next-level-cache = <&l2_1>;
qcom,freq-domain = <&cpufreq_hw 1>;
power-domains = <&CPU_PD7>;
power-domains = <&cpu_pd7>;
power-domain-names = "psci";
};
cpu-map {
cluster0 {
core0 {
cpu = <&CPU0>;
cpu = <&cpu0>;
};
core1 {
cpu = <&CPU1>;
cpu = <&cpu1>;
};
core2 {
cpu = <&CPU2>;
cpu = <&cpu2>;
};
core3 {
cpu = <&CPU3>;
cpu = <&cpu3>;
};
};
cluster1 {
core0 {
cpu = <&CPU4>;
cpu = <&cpu4>;
};
core1 {
cpu = <&CPU5>;
cpu = <&cpu5>;
};
core2 {
cpu = <&CPU6>;
cpu = <&cpu6>;
};
core3 {
cpu = <&CPU7>;
cpu = <&cpu7>;
};
};
};
@@ -203,7 +203,7 @@
idle-states {
entry-method = "psci";
LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
little_cpu_sleep_0: cpu-sleep-0-0 {
compatible = "arm,idle-state";
idle-state-name = "silver-rail-power-collapse";
arm,psci-suspend-param = <0x40000003>;
@@ -213,7 +213,7 @@
local-timer-stop;
};
BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
big_cpu_sleep_0: cpu-sleep-1-0 {
compatible = "arm,idle-state";
idle-state-name = "gold-rail-power-collapse";
arm,psci-suspend-param = <0x40000003>;
@@ -225,7 +225,7 @@
};
domain-idle-states {
CLUSTER_0_SLEEP_0: cluster-sleep-0-0 {
cluster_0_sleep_0: cluster-sleep-0-0 {
/* GDHS */
compatible = "domain-idle-state";
arm,psci-suspend-param = <0x40000022>;
@@ -234,7 +234,7 @@
min-residency-us = <782>;
};
CLUSTER_0_SLEEP_1: cluster-sleep-0-1 {
cluster_0_sleep_1: cluster-sleep-0-1 {
/* Power Collapse */
compatible = "domain-idle-state";
arm,psci-suspend-param = <0x41000044>;
@@ -243,7 +243,7 @@
min-residency-us = <7376>;
};
CLUSTER_1_SLEEP_0: cluster-sleep-1-0 {
cluster_1_sleep_0: cluster-sleep-1-0 {
/* GDHS */
compatible = "domain-idle-state";
arm,psci-suspend-param = <0x40000042>;
@@ -252,7 +252,7 @@
min-residency-us = <660>;
};
CLUSTER_1_SLEEP_1: cluster-sleep-1-1 {
cluster_1_sleep_1: cluster-sleep-1-1 {
/* Power Collapse */
compatible = "domain-idle-state";
arm,psci-suspend-param = <0x41000044>;
@@ -306,62 +306,62 @@
compatible = "arm,psci-1.0";
method = "smc";
CPU_PD0: power-domain-cpu0 {
cpu_pd0: power-domain-cpu0 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_0_PD>;
domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
power-domains = <&cluster_0_pd>;
domain-idle-states = <&little_cpu_sleep_0>;
};
CPU_PD1: power-domain-cpu1 {
cpu_pd1: power-domain-cpu1 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_0_PD>;
domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
power-domains = <&cluster_0_pd>;
domain-idle-states = <&little_cpu_sleep_0>;
};
CPU_PD2: power-domain-cpu2 {
cpu_pd2: power-domain-cpu2 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_0_PD>;
domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
power-domains = <&cluster_0_pd>;
domain-idle-states = <&little_cpu_sleep_0>;
};
CPU_PD3: power-domain-cpu3 {
cpu_pd3: power-domain-cpu3 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_0_PD>;
domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
power-domains = <&cluster_0_pd>;
domain-idle-states = <&little_cpu_sleep_0>;
};
CPU_PD4: power-domain-cpu4 {
cpu_pd4: power-domain-cpu4 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_1_PD>;
domain-idle-states = <&BIG_CPU_SLEEP_0>;
power-domains = <&cluster_1_pd>;
domain-idle-states = <&big_cpu_sleep_0>;
};
CPU_PD5: power-domain-cpu5 {
cpu_pd5: power-domain-cpu5 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_1_PD>;
domain-idle-states = <&BIG_CPU_SLEEP_0>;
power-domains = <&cluster_1_pd>;
domain-idle-states = <&big_cpu_sleep_0>;
};
CPU_PD6: power-domain-cpu6 {
cpu_pd6: power-domain-cpu6 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_1_PD>;
domain-idle-states = <&BIG_CPU_SLEEP_0>;
power-domains = <&cluster_1_pd>;
domain-idle-states = <&big_cpu_sleep_0>;
};
CPU_PD7: power-domain-cpu7 {
cpu_pd7: power-domain-cpu7 {
#power-domain-cells = <0>;
power-domains = <&CLUSTER_1_PD>;
domain-idle-states = <&BIG_CPU_SLEEP_0>;
power-domains = <&cluster_1_pd>;
domain-idle-states = <&big_cpu_sleep_0>;
};
CLUSTER_0_PD: power-domain-cpu-cluster0 {
cluster_0_pd: power-domain-cpu-cluster0 {
#power-domain-cells = <0>;
domain-idle-states = <&CLUSTER_0_SLEEP_0>, <&CLUSTER_0_SLEEP_1>;
domain-idle-states = <&cluster_0_sleep_0>, <&cluster_0_sleep_1>;
};
CLUSTER_1_PD: power-domain-cpu-cluster1 {
cluster_1_pd: power-domain-cpu-cluster1 {
#power-domain-cells = <0>;
domain-idle-states = <&CLUSTER_1_SLEEP_0>, <&CLUSTER_1_SLEEP_1>;
domain-idle-states = <&cluster_1_sleep_0>, <&cluster_1_sleep_1>;
};
};
@@ -2405,7 +2405,7 @@
clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu;
cpu = <&CPU0>;
cpu = <&cpu0>;
status = "disabled";
@@ -2426,7 +2426,7 @@
clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu;
cpu = <&CPU1>;
cpu = <&cpu1>;
status = "disabled";
@@ -2447,7 +2447,7 @@
clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu;
cpu = <&CPU2>;
cpu = <&cpu2>;
status = "disabled";
@@ -2468,7 +2468,7 @@
clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu;
cpu = <&CPU3>;
cpu = <&cpu3>;
status = "disabled";
@@ -2489,7 +2489,7 @@
clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu;
cpu = <&CPU4>;
cpu = <&cpu4>;
status = "disabled";
@@ -2510,7 +2510,7 @@
clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu;
cpu = <&CPU5>;
cpu = <&cpu5>;
status = "disabled";
@@ -2531,7 +2531,7 @@
clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu;
cpu = <&CPU6>;
cpu = <&cpu6>;
status = "disabled";
@@ -2552,7 +2552,7 @@
clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu;
cpu = <&CPU7>;
cpu = <&cpu7>;
status = "disabled";