drm/i915/display: Write PHY_CMN1_CONTROL only when using AUXLess ALPM
We are seeing "dmesg-warn/abort - *ERROR* PHY * failed after 3 retries" since we started configuring LFPS sending. According to Bspec Configuring LFPS sending is needed only when using AUXLess ALPM. This patch avoids these failures by configuring LFPS sending only when using AUXLess ALPM. Bspec: 68849 Fixes:9dc619680d("drm/i915/display: Add function to configure LFPS sending") Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://lore.kernel.org/r/20250722125618.1842615-2-jouni.hogander@intel.com (cherry picked from commit8265ce0e0e) Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>
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Tvrtko Ursulin
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ba0f4c4c0f
commit
a045246b68
@@ -3240,11 +3240,10 @@ void intel_lnl_mac_transmit_lfps(struct intel_encoder *encoder,
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{
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struct intel_display *display = to_intel_display(encoder);
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u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(encoder);
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bool enable = intel_alpm_is_alpm_aux_less(enc_to_intel_dp(encoder),
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crtc_state);
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int i;
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if (DISPLAY_VER(display) < 20)
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if (DISPLAY_VER(display) < 20 ||
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!intel_alpm_is_alpm_aux_less(enc_to_intel_dp(encoder), crtc_state))
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return;
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for (i = 0; i < 4; i++) {
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@@ -3256,8 +3255,7 @@ void intel_lnl_mac_transmit_lfps(struct intel_encoder *encoder,
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intel_cx0_rmw(encoder, lane_mask, PHY_CMN1_CONTROL(tx, 0),
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CONTROL0_MAC_TRANSMIT_LFPS,
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enable ? CONTROL0_MAC_TRANSMIT_LFPS : 0,
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MB_WRITE_COMMITTED);
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CONTROL0_MAC_TRANSMIT_LFPS, MB_WRITE_COMMITTED);
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}
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}
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