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arm64: dts: qcom: msm8953: add spi_7

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Add spi_7 can be found in MSM8953 devices.

Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Link: https://lore.kernel.org/r/20250830-msm8953-spi-fix-v1-3-89950eaf10fe@mainlining.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Barnabás Czémán
2025-09-01 13:03:31 -05:00
committed by Bjorn Andersson
parent 690bc19286
commit 73f7dc09f8
1 changed files with 52 additions and 0 deletions
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arch/arm64/boot/dts/qcom/msm8953.dtsi
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@@ -870,6 +870,38 @@
};
};
spi_7_default: spi-7-default-state {
cs-pins {
pins = "gpio136";
function = "blsp_spi7";
drive-strength = <2>;
bias-disable;
};
spi-pins {
pins = "gpio135", "gpio137", "gpio138";
function = "blsp_spi7";
drive-strength = <12>;
bias-disable;
};
};
spi_7_sleep: spi-7-sleep-state {
cs-pins {
pins = "gpio136";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
spi-pins {
pins = "gpio135", "gpio137", "gpio138";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
};
uart_5_default: uart-5-default-state {
pins = "gpio16", "gpio17", "gpio18", "gpio19";
function = "blsp_uart5";
@@ -1880,6 +1912,26 @@
status = "disabled";
};
spi_7: spi@7af7000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x07af7000 0x600>;
interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "core", "iface";
clocks = <&gcc GCC_BLSP2_QUP3_SPI_APPS_CLK>,
<&gcc GCC_BLSP2_AHB_CLK>;
dmas = <&blsp2_dma 8>, <&blsp2_dma 9>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi_7_default>;
pinctrl-1 = <&spi_7_sleep>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c_8: i2c@7af8000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x07af8000 0x600>;