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drm/amd: Skip smu_v13 register irq on SRIOV VF

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[Why]
VF do not need to handle SMU IRQ state.
L1 Policy will block VF access THM_THERMAL_INT_CTRL and MP1_SMN_IH_SW_INT/CNTL.

[How]
Skip smu_v13 init register_irq_handler under SRIOV VF.
And add irq_src check in enable/disable thermal alert
to avoid thermal alert enable/disable fail.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Yifan Zha
2022-09-01 15:11:57 -04:00
committed by Alex Deucher
parent 8284182592
commit 72be731658
1 changed files with 9 additions and 0 deletions
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drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+9
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@@ -1108,6 +1108,9 @@ int smu_v13_0_enable_thermal_alert(struct smu_context *smu)
{
int ret = 0;
if (!smu->irq_source.num_types)
return 0;
ret = amdgpu_irq_get(smu->adev, &smu->irq_source, 0);
if (ret)
return ret;
@@ -1117,6 +1120,9 @@ int smu_v13_0_enable_thermal_alert(struct smu_context *smu)
int smu_v13_0_disable_thermal_alert(struct smu_context *smu)
{
if (!smu->irq_source.num_types)
return 0;
return amdgpu_irq_put(smu->adev, &smu->irq_source, 0);
}
@@ -1488,6 +1494,9 @@ int smu_v13_0_register_irq_handler(struct smu_context *smu)
struct amdgpu_irq_src *irq_src = &smu->irq_source;
int ret = 0;
if (amdgpu_sriov_vf(adev))
return 0;
irq_src->num_types = 1;
irq_src->funcs = &smu_v13_0_irq_funcs;