i.MX ARM device tree change for 6.16:

- A series from Alexander Stein that updates ls1021a-tqmals1021a device
  tree mostly for display support inlcuding HDMI, LVDS and CDTech panel
- A change from Dario Binacchi to use pad config defines for i.MX23/28
  device trees
- A i.MX7D change from Efe Can İçöz to include min and max voltage in
  opp-microvolt
- A few patches from Fabio Estevam to fix dt-schema warnings
- A couple of changes from Krzysztof Kozlowski to align NAND and WIFI
  node name with binings
- A clean-up change from Rob Herring to drop redundant CPU
  "clock-latency"

* tag 'imx-dt-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: mxs: use padconfig macros
  ARM: dts: imx7d: update opp-table voltages
  ARM: dts: nxp: Align wifi node name with bindings
  ARM: dts: imx6q-apalis: remove pcie-switch node
  ARM: dts: ls1021a-tqmals1021a: change sound card model name
  ARM: dts: ls1021a-tqmals1021a: Add overlay for CDTech DC44 RGB display
  ARM: dts: ls1021a-tqmals1021a: Add overlay for CDTech FC21 RGB display
  ARM: dts: ls1021a-tqmals1021a: Add LVDS overlay for Tianma TM070JVGH33
  ARM: dts: ls1021a-tqmals1021a: Add HDMI overlay
  ARM: dts: ls1021a-tqmals1021a: Add vcc-supply for spi-nor
  ARM: dts: ls1021a-tqmals1021a: Fix license
  ARM: dts: imx: Drop redundant CPU "clock-latency"
  ARM: dts: imx51-digi-connectcore-som: Fix MMA7455 compatible
  ARM: dts: nxp: Align NAND controller node name with bindings
  ARM: dts: imx: Fix the iim compatible string
  ARM: dts: imx31/imx6: Use flash as the NOR node name

Link: https://lore.kernel.org/r/20250512103858.50501-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2025-05-12 14:19:28 +02:00
25 changed files with 232 additions and 42 deletions
+1 -1
View File
@@ -611,7 +611,7 @@
reg = <0x80000000 0x3b002000>;
ranges;
nfc: nand@bb000000 {
nfc: nand-controller@bb000000 {
#address-cells = <1>;
#size-cells = <1>;
+1 -1
View File
@@ -157,7 +157,7 @@
&weim {
status = "okay";
nor@0,0 {
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x0 0x200000>;
bank-width = <2>;
+1 -1
View File
@@ -218,7 +218,7 @@
};
iim: efuse@5001c000 {
compatible = "fsl,imx31-iim", "fsl,imx27-iim";
compatible = "fsl,imx31-iim";
reg = <0x5001c000 0x1000>;
interrupts = <19>;
clocks = <&clks 25>;
+1 -1
View File
@@ -363,7 +363,7 @@
reg = <0x80000000 0x40000000>;
ranges;
nfc: nand@bb000000 {
nfc: nand-controller@bb000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,imx35-nand", "fsl,imx25-nand";
@@ -165,7 +165,7 @@
mma7455l@1d {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mma7455l>;
compatible = "fsl,mma7455l";
compatible = "fsl,mma7455";
reg = <0x1d>;
interrupt-parent = <&gpio1>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>, <6 IRQ_TYPE_LEVEL_HIGH>;
+2 -2
View File
@@ -476,7 +476,7 @@
};
iim: efuse@83f98000 {
compatible = "fsl,imx51-iim", "fsl,imx27-iim", "syscon";
compatible = "fsl,imx51-iim";
reg = <0x83f98000 0x4000>;
interrupts = <69>;
clocks = <&clks IMX5_CLK_IIM_GATE>;
@@ -595,7 +595,7 @@
status = "disabled";
};
nfc: nand@83fdb000 {
nfc: nand-controller@83fdb000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,imx51-nand";
+2 -2
View File
@@ -668,7 +668,7 @@
};
iim: efuse@63f98000 {
compatible = "fsl,imx53-iim", "fsl,imx27-iim", "syscon";
compatible = "fsl,imx53-iim";
reg = <0x63f98000 0x4000>;
interrupts = <69>;
clocks = <&clks IMX5_CLK_IIM_GATE>;
@@ -775,7 +775,7 @@
status = "disabled";
};
nfc: nand@63fdb000 {
nfc: nand-controller@63fdb000 {
compatible = "fsl,imx53-nand";
reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>;
interrupts = <8>;
@@ -36,15 +36,6 @@
status = "okay";
};
/* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
&i2c1 {
/* PCIe Switch */
pcie-switch@58 {
compatible = "plx,pex8605";
reg = <0x58>;
};
};
&pcie {
vpcie-supply = <&reg_pcie_switch>;
status = "okay";
+1 -1
View File
@@ -279,7 +279,7 @@
ranges = <0 0 0x08000000 0x08000000>;
status = "okay";
nor@0,0 {
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0 0x02000000>;
#address-cells = <1>;
@@ -854,7 +854,7 @@
ranges = <0 0 0x08000000 0x08000000>;
status = "disabled"; /* pin conflict with SPI NOR */
nor@0,0 {
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0 0x02000000>;
#address-cells = <1>;
+1 -1
View File
@@ -384,7 +384,7 @@
#address-cells = <1>;
#size-cells = <0>;
brcmf: bcrmf@1 {
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
@@ -374,7 +374,7 @@
cap-power-off-card;
status = "okay";
brcmf: bcrmf@1 {
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
+3 -3
View File
@@ -48,7 +48,7 @@
opp-792000000 {
opp-hz = /bits/ 64 <792000000>;
opp-microvolt = <1000000>;
opp-microvolt = <1000000 950000 1250000>;
clock-latency-ns = <150000>;
opp-supported-hw = <0xd>, <0x7>;
opp-suspend;
@@ -56,7 +56,7 @@
opp-996000000 {
opp-hz = /bits/ 64 <996000000>;
opp-microvolt = <1100000>;
opp-microvolt = <1100000 1045000 1250000>;
clock-latency-ns = <150000>;
opp-supported-hw = <0xc>, <0x7>;
opp-suspend;
@@ -64,7 +64,7 @@
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1225000>;
opp-microvolt = <1225000 1200000 1250000>;
clock-latency-ns = <150000>;
opp-supported-hw = <0x8>, <0x3>;
opp-suspend;
-1
View File
@@ -73,7 +73,6 @@
device_type = "cpu";
reg = <0>;
clock-frequency = <792000000>;
clock-latency = <61036>; /* two CLK32 periods */
clocks = <&clks IMX7D_CLK_ARM>;
cpu-idle-states = <&cpu_sleep_wait>;
operating-points-v2 = <&cpu0_opp_table>;
+9
View File
@@ -6,3 +6,12 @@ dtb-$(CONFIG_SOC_LS1021A) += \
ls1021a-tqmls1021a-mbls1021a.dtb \
ls1021a-tsn.dtb \
ls1021a-twr.dtb
ls1021a-tqmls1021a-mbls1021a-hdmi-dtbs += ls1021a-tqmls1021a-mbls1021a.dtb ls1021a-tqmls1021a-mbls1021a-hdmi.dtbo
ls1021a-tqmls1021a-mbls1021a-lvds-tm070jvhg33-dtbs += ls1021a-tqmls1021a-mbls1021a.dtb ls1021a-tqmls1021a-mbls1021a-lvds-tm070jvhg33.dtbo
ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-dc44-dtbs += ls1021a-tqmls1021a-mbls1021a.dtb ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-dc44.dtbo
ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-fc21-dtbs += ls1021a-tqmls1021a-mbls1021a.dtb ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-fc21.dtbo
dtb-$(CONFIG_SOC_LS1021A) += ls1021a-tqmls1021a-mbls1021a-hdmi.dtb
dtb-$(CONFIG_SOC_LS1021A) += ls1021a-tqmls1021a-mbls1021a-lvds-tm070jvhg33.dtb
dtb-$(CONFIG_SOC_LS1021A) += ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-dc44.dtb
dtb-$(CONFIG_SOC_LS1021A) += ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-fc21.dtb
@@ -0,0 +1,32 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2013-2014 Freescale Semiconductor, Inc.
* Copyright 2018-2025 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Alexander Stein
*/
/dts-v1/;
/plugin/;
&dcu {
status = "okay";
port {
dcu_out: endpoint {
remote-endpoint = <&sii9022a_in>;
};
};
};
&hdmi_out {
status = "okay";
};
&sii9022a {
status = "okay";
};
&sii9022a_in {
remote-endpoint = <&dcu_out>;
};
@@ -0,0 +1,47 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2013-2014 Freescale Semiconductor, Inc.
* Copyright 2018-2025 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Alexander Stein
*/
#include <dt-bindings/gpio/gpio.h>
/dts-v1/;
/plugin/;
&backlight_dcu {
status = "okay";
};
&dcu {
status = "okay";
port {
dcu_out: endpoint {
remote-endpoint = <&lvds_encoder_in>;
};
};
};
&display {
compatible = "tianma,tm070jvhg33";
status = "okay";
};
&lvds_encoder {
status = "okay";
};
&lvds_encoder_in {
remote-endpoint = <&dcu_out>;
};
&lvds_encoder_out {
remote-endpoint = <&panel_in>;
};
&panel_in {
remote-endpoint = <&lvds_encoder_out>;
};
@@ -0,0 +1,55 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2013-2014 Freescale Semiconductor, Inc.
* Copyright 2018-2025 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Alexander Stein
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/dts-v1/;
/plugin/;
&backlight_dcu {
status = "okay";
};
&dcu {
status = "okay";
port {
dcu_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
&display {
compatible = "cdtech,s070swv29hg-dc44";
status = "okay";
};
&i2c0 {
#address-cells = <1>;
#size-cells = <0>;
polytouch: touchscreen@38 {
compatible = "edt,edt-ft5406", "edt,edt-ft5x06";
reg = <0x38>;
interrupt-parent = <&pca9554_0>;
interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
/* LCD_PWR_EN -> TSC_WAKE */
wake-gpios = <&pca9554_1 4 GPIO_ACTIVE_HIGH>;
iovcc-supply = <&reg_3p3v>;
vcc-supply = <&reg_3p3v>;
gain = <20>;
touchscreen-size-x = <800>;
touchscreen-size-y = <480>;
};
};
&panel_in {
remote-endpoint = <&dcu_out>;
};
@@ -0,0 +1,55 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2013-2014 Freescale Semiconductor, Inc.
* Copyright 2018-2025 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Alexander Stein
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/dts-v1/;
/plugin/;
&backlight_dcu {
status = "okay";
};
&dcu {
status = "okay";
port {
dcu_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
&display {
compatible = "cdtech,s070pws19hp-fc21";
status = "okay";
};
&i2c0 {
#address-cells = <1>;
#size-cells = <0>;
polytouch: touchscreen@38 {
compatible = "edt,edt-ft5406", "edt,edt-ft5x06";
reg = <0x38>;
interrupt-parent = <&pca9554_0>;
interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
/* LCD_PWR_EN -> TSC_WAKE */
wake-gpios = <&pca9554_1 4 GPIO_ACTIVE_HIGH>;
iovcc-supply = <&reg_3p3v>;
vcc-supply = <&reg_3p3v>;
gain = <20>;
touchscreen-size-x = <800>;
touchscreen-size-y = <480>;
};
};
&panel_in {
remote-endpoint = <&dcu_out>;
};
@@ -1,4 +1,4 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2013-2014 Freescale Semiconductor, Inc.
* Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
@@ -147,6 +147,7 @@
display: panel {
backlight = <&backlight_dcu>;
enable-gpios = <&pca9554_1 3 GPIO_ACTIVE_HIGH>;
power-supply = <&reg_3p3v>;
status = "disabled";
port {
@@ -156,7 +157,7 @@
sound {
compatible = "fsl,imx-audio-tlv320aic32x4";
model = "ls1021a-mbls1021a-tlv320aic32";
model = "tqm-tlv320aic32";
ssi-controller = <&sai1>;
audio-codec = <&tlv320aic32x4>;
};
@@ -1,4 +1,4 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2013-2014 Freescale Semiconductor, Inc.
* Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
@@ -72,6 +72,7 @@
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
reg = <0>;
vcc-supply = <&reg_3p3v_som>;
partitions {
compatible = "fixed-partitions";
+3 -3
View File
@@ -93,9 +93,9 @@
MX23_PAD_LCD_HSYNC__GPIO_1_24
MX23_PAD_PWM3__GPIO_1_29
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
};
};
+6 -6
View File
@@ -83,9 +83,9 @@
fsl,pinmux-ids = <
MX23_PAD_GPMI_D07__GPIO_0_7
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
key_pins_a: keys@0 {
@@ -94,9 +94,9 @@
MX23_PAD_ROTARYA__GPIO_2_7
MX23_PAD_ROTARYB__GPIO_2_8
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <1>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_ENABLE>;
};
};
};
+1 -1
View File
@@ -299,7 +299,7 @@
keep-power-in-suspend;
status = "okay";
wlan@1 {
wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
+3 -3
View File
@@ -102,9 +102,9 @@
0x31c3 /*
MX28_PAD_PWM3__GPIO_3_28 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
};