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Merge tag 'amlogic-arm64-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt

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Amlogic ARM64 DT for v6.17:
- Align wifi node name with bindings
- Add pinctrl nodes for Amlogic S7/S7D/S6 nodes
- Enable the NPU nodes on Alta & VIM3
- New boards:
  - Ugoos AM3

* tag 'amlogic-arm64-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  arm64: dts: amlogic: Enable the npu node for Alta and VIM3
  dts: arm64: amlogic: add S6 pinctrl node
  dts: arm64: amlogic: add S7D pinctrl node
  dts: arm64: amlogic: add S7 pinctrl node
  arm64: dts: amlogic: Add Ugoos AM3
  dt-bindings: arm: amlogic: Add Ugoos AM3
  arm64: dts: amlogic: Align wifi node name with bindings

Link: https://lore.kernel.org/r/3d93b621-9544-4a68-85db-6f87a9e8fa5c@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2025-07-22 22:19:54 +02:00
parent 7723866e8b 587c1c00f7
commit 7097d52d55
10 changed files with 371 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/devicetree/bindings/arm/amlogic.yaml
+1
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@@ -135,6 +135,7 @@ properties:
- minix,neo-u9h
- nexbox,a1
- tronsmart,vega-s96
- ugoos,am3
- videostrong,gxm-kiii-pro
- wetek,core2
- const: amlogic,s912
arch/arm64/boot/dts/amlogic/Makefile
+1
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@@ -80,6 +80,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-libretech-pc.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-ugoos-am3.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-s4-s805x2-aq222.dtb
arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi
+97
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@@ -6,6 +6,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
/ {
cpus {
#address-cells = <2>;
@@ -92,6 +93,102 @@
clock-names = "xtal", "pclk", "baud";
status = "disabled";
};
periphs_pinctrl: pinctrl@4000 {
compatible = "amlogic,pinctrl-s6";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x4000 0x0 0x340>;
gpioz: gpio@c0 {
reg = <0 0xc0 0 0x20>, <0 0x18 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_Z<<8) 16>;
};
gpiox: gpio@100 {
reg = <0 0x100 0 0x30>, <0 0xc 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 20>;
};
gpioh: gpio@140 {
reg = <0 0x140 0 0x20>, <0 0x2c 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_H<<8) 9>;
};
gpiod: gpio@180 {
reg = <0 0x180 0 0x20>, <0 0x8 0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_D<<8) 7>;
};
gpiof: gpio@1a0 {
reg = <0 0x1a0 0 0x20>, <0 0x20 0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_F<<8) 5>;
};
gpioe: gpio@1c0 {
reg = <0 0x1c0 0 0x20>, <0 0x48 0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_E<<8) 3>;
};
gpioc: gpio@200 {
reg = <0 0x200 0 0x20>, <0 0x24 0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_C<<8) 8>;
};
gpiob: gpio@240 {
reg = <0 0x240 0 0x20>, <0 0x0 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>;
};
gpioa: gpio@280 {
reg = <0 0x280 0 0x20>, <0 0x40 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_A<<8) 16>;
};
test_n: gpio@2c0 {
reg = <0 0x2c0 0 0x20>;
reg-names = "gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges =
<&periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>;
};
gpiocc: gpio@300 {
reg = <0 0x300 0 0x20>, <0 0x14 0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>;
};
};
};
};
};
arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
+81
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@@ -6,6 +6,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
/ {
cpus {
@@ -94,6 +95,86 @@
clock-names = "xtal", "pclk", "baud";
status = "disabled";
};
periphs_pinctrl: pinctrl@4000 {
compatible = "amlogic,pinctrl-s7";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x4000 0x0 0x340>;
gpioz: gpio@c0 {
reg = <0 0xc0 0 0x20>, <0 0x18 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_Z<<8) 13>;
};
gpiox: gpio@100 {
reg = <0 0x100 0 0x30>, <0 0xc 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 20>;
};
gpioh: gpio@140 {
reg = <0 0x140 0 0x20>, <0 0x2c 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_H<<8) 12>;
};
gpiod: gpio@180 {
reg = <0 0x180 0 0x20>, <0 0x40 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_D<<8) 12>;
};
gpioe: gpio@1c0 {
reg = <0 0x1c0 0 0x20>, <0 0x48 0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_E<<8) 2>;
};
gpioc: gpio@200 {
reg = <0 0x200 0 0x20>, <0 0x24 0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_C<<8) 8>;
};
gpiob: gpio@240 {
reg = <0 0x240 0 0x20>, <0 0x0 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>;
};
test_n: gpio@2c0 {
reg = <0 0x2c0 0 0x20>;
reg-names = "gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges =
<&periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>;
};
gpiocc: gpio@300 {
reg = <0 0x300 0 0x20>, <0 0x14 0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>;
};
};
};
};
};
arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi
+90
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@@ -6,6 +6,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
/ {
cpus {
@@ -94,6 +95,95 @@
clock-names = "xtal", "pclk", "baud";
status = "disabled";
};
periphs_pinctrl: pinctrl@4000 {
compatible = "amlogic,pinctrl-s7d",
"amlogic,pinctrl-s7";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x4000 0x0 0x340>;
gpioz: gpio@c0 {
reg = <0 0xc0 0 0x20>, <0 0x18 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_Z<<8) 13>;
};
gpiox: gpio@100 {
reg = <0 0x100 0 0x30>, <0 0xc 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 20>;
};
gpioh: gpio@140 {
reg = <0 0x140 0 0x20>, <0 0x2c 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_H<<8) 12>;
};
gpiod: gpio@180 {
reg = <0 0x180 0 0x20>, <0 0x40 0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_D<<8) 5>;
};
gpioe: gpio@1c0 {
reg = <0 0x1c0 0 0x20>, <0 0x48 0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_E<<8) 2>;
};
gpioc: gpio@200 {
reg = <0 0x200 0 0x20>, <0 0x24 0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_C<<8) 8>;
};
gpiob: gpio@240 {
reg = <0 0x240 0 0x20>, <0 0x0 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>;
};
gpiodv: gpio@280 {
reg = <0 0x280 0 0x20>, <0 0x8 0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_DV<<8) 7>;
};
test_n: gpio@2c0 {
reg = <0 0x2c0 0 0x20>;
reg-names = "gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges =
<&periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>;
};
gpiocc: gpio@300 {
reg = <0 0x300 0 0x20>, <0 0x14 0 0x4>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>;
};
};
};
};
};
arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
+4
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@@ -39,3 +39,7 @@
phy-names = "usb2-phy0", "usb2-phy1";
};
*/
&npu {
status = "okay";
};
arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
+4
View File
@@ -111,3 +111,7 @@
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>, <&pwm_b_x7_pins>;
};
&npu {
status = "okay";
};
arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
+1 -1
View File
@@ -97,7 +97,7 @@
clock-names = "ext_clock";
};
cvbs-connector {
cvbs_connector: cvbs-connector {
compatible = "composite-video-connector";
port {
arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
+1 -1
View File
@@ -217,7 +217,7 @@
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_boot>;
brcmf: brcmf@1 {
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
arch/arm64/boot/dts/amlogic/meson-gxm-ugoos-am3.dts
+91
View File
@@ -0,0 +1,91 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2025 J. Neuschäfer <j.ne@posteo.net>
*
* Debug UART (3.3V, 115200 baud) at the corner of the board:
* (4) (3) (2) [1]
* Vcc RXD TXD GND
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h>
#include "meson-gxm.dtsi"
#include "meson-gx-p23x-q20x.dtsi"
/ {
compatible = "ugoos,am3", "amlogic,s912", "amlogic,meson-gxm";
model = "Ugoos AM3";
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1710000>;
button-function {
label = "Update";
linux,code = <KEY_VENDOR>;
press-threshold-microvolt = <10000>;
};
};
};
&cvbs_connector {
/* Not used on this board */
status = "disabled";
};
&ethmac {
pinctrl-0 = <&eth_pins>;
pinctrl-names = "default";
/* Select external PHY by default */
phy-handle = <&external_phy>;
amlogic,tx-delay-ns = <2>;
/* External PHY is in RGMII */
phy-mode = "rgmii";
status = "okay";
};
&external_mdio {
external_phy: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_15 */
interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
};
};
&i2c_B {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c_b_pins>;
rtc: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
};
};
/* WLAN: Atheros 10k (QCA9377) */
&sd_emmc_a {
max-frequency = <200000000>;
};
/* eMMC */
&sd_emmc_c {
max-frequency = <100000000>;
};