Merge tag 'at91-soc' of git://github.com/at91linux/linux-at91 into late/all
From Nicolas Ferre: AT91 SoC update for 3.12 take 1 - enable kernel uncompress information output for SoC where it was missing: at91sam9n12 and sama5d3 - addition of at91rm9200 to the generic at91_dt_defconfig * tag 'at91-soc' of git://github.com/at91linux/linux-at91: ARM: at91: at91_dt_defconfig: enable rm9200 support ARM: at91: sam9n12: enable kernel uncompress info output ARM: at91: sama5: enable kernel uncompress info output ARM: at91: include sama5d3.h into hardware.h ARM: at91: sama5d3: add definition for usart base address
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@@ -14,11 +14,13 @@ CONFIG_MODULE_UNLOAD=y
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# CONFIG_IOSCHED_DEADLINE is not set
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARCH_AT91=y
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CONFIG_SOC_AT91RM9200=y
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CONFIG_SOC_AT91SAM9260=y
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CONFIG_SOC_AT91SAM9263=y
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CONFIG_SOC_AT91SAM9G45=y
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CONFIG_SOC_AT91SAM9X5=y
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CONFIG_SOC_AT91SAM9N12=y
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CONFIG_MACH_AT91RM9200_DT=y
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CONFIG_MACH_AT91SAM9_DT=y
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CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
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CONFIG_AT91_TIMER_HZ=128
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@@ -62,6 +64,7 @@ CONFIG_MTD=y
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_CHAR=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_DATAFLASH=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_ATMEL=y
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CONFIG_MTD_UBI=y
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@@ -78,7 +81,6 @@ CONFIG_BLK_DEV_SD=y
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CONFIG_SCSI_MULTI_LUN=y
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# CONFIG_SCSI_LOWLEVEL is not set
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CONFIG_NETDEVICES=y
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CONFIG_MII=y
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CONFIG_MACB=y
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# CONFIG_NET_VENDOR_BROADCOM is not set
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# CONFIG_NET_VENDOR_FARADAY is not set
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@@ -33,6 +33,7 @@
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#include <mach/at91sam9g45.h>
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#include <mach/at91sam9x5.h>
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#include <mach/at91sam9n12.h>
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#include <mach/sama5d3.h>
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/*
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* On all at91 except rm9200 and x40 have the System Controller starts
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@@ -64,6 +64,14 @@
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#define SAMA5D3_ID_TRNG 45 /* True Random Generator Number */
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#define SAMA5D3_ID_IRQ0 47 /* Advanced Interrupt Controller (IRQ0) */
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/*
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* User Peripheral physical base addresses.
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*/
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#define SAMA5D3_BASE_USART0 0xf001c000
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#define SAMA5D3_BASE_USART1 0xf0020000
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#define SAMA5D3_BASE_USART2 0xf8020000
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#define SAMA5D3_BASE_USART3 0xf8024000
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/*
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* Internal Memory
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*/
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@@ -94,6 +94,15 @@ static const u32 uarts_sam9x5[] = {
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0,
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};
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static const u32 uarts_sama5[] = {
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AT91_BASE_DBGU1,
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SAMA5D3_BASE_USART0,
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SAMA5D3_BASE_USART1,
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SAMA5D3_BASE_USART2,
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SAMA5D3_BASE_USART3,
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0,
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};
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static inline const u32* decomp_soc_detect(void __iomem *dbgu_base)
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{
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u32 cidr, socid;
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@@ -121,8 +130,12 @@ static inline const u32* decomp_soc_detect(void __iomem *dbgu_base)
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case ARCH_ID_AT91SAM9RL64:
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return uarts_sam9rl;
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case ARCH_ID_AT91SAM9N12:
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case ARCH_ID_AT91SAM9X5:
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return uarts_sam9x5;
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case ARCH_ID_SAMA5D3:
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return uarts_sama5;
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}
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/* at91sam9g10 */
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