Merge tag 'mips-fixes_5.16_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS fixes from Thomas Bogendoerfer: - build fix for ZSTD enabled configs - fix for preempt warning - fix for loongson FTLB detection - fix for page table level selection * tag 'mips-fixes_5.16_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: use 3-level pgtable for 64KB page size on MIPS_VA_BITS_48 MIPS: loongson64: fix FTLB configuration MIPS: Fix using smp_processor_id() in preemptible in show_cpuinfo() MIPS: boot/compressed/: add __ashldi3 to target for ZSTD compression
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@@ -3097,7 +3097,7 @@ config STACKTRACE_SUPPORT
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config PGTABLE_LEVELS
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int
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default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
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default 3 if 64BIT && !PAGE_SIZE_64KB
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default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
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default 2
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config MIPS_AUTO_PFN_OFFSET
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@@ -52,7 +52,7 @@ endif
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vmlinuzobjs-$(CONFIG_KERNEL_XZ) += $(obj)/ashldi3.o
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vmlinuzobjs-$(CONFIG_KERNEL_ZSTD) += $(obj)/bswapdi.o
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vmlinuzobjs-$(CONFIG_KERNEL_ZSTD) += $(obj)/bswapdi.o $(obj)/ashldi3.o
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targets := $(notdir $(vmlinuzobjs-y))
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@@ -1734,8 +1734,6 @@ static inline void decode_cpucfg(struct cpuinfo_mips *c)
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static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
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{
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decode_configs(c);
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/* All Loongson processors covered here define ExcCode 16 as GSExc. */
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c->options |= MIPS_CPU_GSEXCEX;
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@@ -1796,6 +1794,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
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panic("Unknown Loongson Processor ID!");
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break;
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}
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decode_configs(c);
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}
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#else
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static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) { }
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@@ -185,7 +185,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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seq_puts(m, " tx39_cache");
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if (cpu_has_octeon_cache)
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seq_puts(m, " octeon_cache");
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if (cpu_has_fpu)
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if (raw_cpu_has_fpu)
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seq_puts(m, " fpu");
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if (cpu_has_32fpr)
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seq_puts(m, " 32fpr");
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