Merge tag 'aspeed-5.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/drivers
ASPEED soc driver updates for 5.12 - Clock control logic for LPC snoop driver - New system ids for AST2600 variants * tag 'aspeed-5.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: soc: aspeed: socinfo: Add new systems soc: aspeed: snoop: Add clock control logic Link: https://lore.kernel.org/r/CACPK8Xf+4VkWC6rkHhsWdwhaLjy2Az=GAHaEe=SvOiUc_OGKSQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@@ -11,6 +11,7 @@
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*/
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/interrupt.h>
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#include <linux/fs.h>
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#include <linux/kfifo.h>
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@@ -67,6 +68,7 @@ struct aspeed_lpc_snoop_channel {
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struct aspeed_lpc_snoop {
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struct regmap *regmap;
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int irq;
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struct clk *clk;
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struct aspeed_lpc_snoop_channel chan[NUM_SNOOP_CHANNELS];
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};
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@@ -282,22 +284,42 @@ static int aspeed_lpc_snoop_probe(struct platform_device *pdev)
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return -ENODEV;
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}
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lpc_snoop->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(lpc_snoop->clk)) {
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rc = PTR_ERR(lpc_snoop->clk);
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if (rc != -EPROBE_DEFER)
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dev_err(dev, "couldn't get clock\n");
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return rc;
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}
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rc = clk_prepare_enable(lpc_snoop->clk);
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if (rc) {
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dev_err(dev, "couldn't enable clock\n");
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return rc;
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}
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rc = aspeed_lpc_snoop_config_irq(lpc_snoop, pdev);
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if (rc)
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return rc;
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goto err;
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rc = aspeed_lpc_enable_snoop(lpc_snoop, dev, 0, port);
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if (rc)
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return rc;
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goto err;
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/* Configuration of 2nd snoop channel port is optional */
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if (of_property_read_u32_index(dev->of_node, "snoop-ports",
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1, &port) == 0) {
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rc = aspeed_lpc_enable_snoop(lpc_snoop, dev, 1, port);
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if (rc)
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if (rc) {
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aspeed_lpc_disable_snoop(lpc_snoop, 0);
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goto err;
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}
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}
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return 0;
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err:
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clk_disable_unprepare(lpc_snoop->clk);
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return rc;
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}
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@@ -309,6 +331,8 @@ static int aspeed_lpc_snoop_remove(struct platform_device *pdev)
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aspeed_lpc_disable_snoop(lpc_snoop, 0);
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aspeed_lpc_disable_snoop(lpc_snoop, 1);
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clk_disable_unprepare(lpc_snoop->clk);
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return 0;
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}
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@@ -25,6 +25,7 @@ static struct {
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/* AST2600 */
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{ "AST2600", 0x05000303 },
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{ "AST2620", 0x05010203 },
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{ "AST2605", 0x05030103 },
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};
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static const char *siliconid_to_name(u32 siliconid)
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@@ -43,14 +44,30 @@ static const char *siliconid_to_name(u32 siliconid)
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static const char *siliconid_to_rev(u32 siliconid)
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{
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unsigned int rev = (siliconid >> 16) & 0xff;
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unsigned int gen = (siliconid >> 24) & 0xff;
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switch (rev) {
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case 0:
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return "A0";
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case 1:
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return "A1";
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case 3:
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return "A2";
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if (gen < 0x5) {
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/* AST2500 and below */
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switch (rev) {
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case 0:
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return "A0";
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case 1:
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return "A1";
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case 3:
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return "A2";
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}
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} else {
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/* AST2600 */
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switch (rev) {
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case 0:
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return "A0";
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case 1:
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return "A1";
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case 2:
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return "A2";
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case 3:
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return "A3";
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}
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}
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return "??";
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