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Merge tag 'thead-dt-for-v6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux into soc/dt

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T-HEAD Devicetrees for v6.18

Add a device tree node for the IMG BXM-4-64 GPU present in the T-HEAD
TH1520 SoC used by the Lichee Pi 4A board. This node enables support for
the GPU using the drm/imagination driver.

By adding this node, the kernel can recognize and initialize the GPU,
providing graphics acceleration capabilities on the Lichee Pi 4A and
other boards based on the TH1520 SoC. The display controller and HDMI
output are still a work in progress.

Also included is a MAINTAINERS patch that adds an entry for the T-Head
SoC patchwork.

Signed-off-by: Drew Fustini <fustini@kernel.org>

* tag 'thead-dt-for-v6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux:
  MAINTAINERS: Add RISC-V T-HEAD SoC patchwork
  riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node

Link: https://lore.kernel.org/r/aLyIXR1G9DUzwGWc@x1
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2025-09-15 14:52:30 +02:00
parent cea9c89d46 dfa743da83
commit 48c7bf3ebd
2 changed files with 22 additions and 0 deletions
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MAINTAINERS
+1
View File
@@ -21745,6 +21745,7 @@ M: Guo Ren <guoren@kernel.org>
M: Fu Wei <wefu@redhat.com>
L: linux-riscv@lists.infradead.org
S: Maintained
Q: https://patchwork.kernel.org/project/riscv-thead/list/
T: git https://github.com/pdp7/linux.git
F: Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml
F: Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml
arch/riscv/boot/dts/thead/th1520.dtsi
+21
View File
@@ -225,6 +225,13 @@
#clock-cells = <0>;
};
gpu_mem_clk: mem-clk {
compatible = "fixed-clock";
clock-frequency = <0>;
clock-output-names = "gpu_mem_clk";
#clock-cells = <0>;
};
stmmac_axi_config: stmmac-axi-config {
snps,wr_osr_lmt = <15>;
snps,rd_osr_lmt = <15>;
@@ -502,6 +509,20 @@
#clock-cells = <1>;
};
gpu: gpu@ffef400000 {
compatible = "thead,th1520-gpu", "img,img-bxm-4-64",
"img,img-rogue";
reg = <0xff 0xef400000 0x0 0x100000>;
interrupt-parent = <&plic>;
interrupts = <102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_vo CLK_GPU_CORE>,
<&gpu_mem_clk>,
<&clk_vo CLK_GPU_CFG_ACLK>;
clock-names = "core", "mem", "sys";
power-domains = <&aon TH1520_GPU_PD>;
resets = <&rst TH1520_RESET_ID_GPU>;
};
rst: reset-controller@ffef528000 {
compatible = "thead,th1520-reset";
reg = <0xff 0xef528000 0x0 0x4f>;