drm/msm: Add MSM_PARAM_RAYTRACING uapi

Expose the value of the software fuse to userspace.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/592044/
Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
Connor Abbott
2024-06-21 13:41:43 -07:00
committed by Rob Clark
parent 14b27d5df3
commit 41fd54ef74
2 changed files with 4 additions and 0 deletions
+3
View File
@@ -376,6 +376,9 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
case MSM_PARAM_HIGHEST_BANK_BIT:
*value = adreno_gpu->ubwc_config.highest_bank_bit;
return 0;
case MSM_PARAM_RAYTRACING:
*value = adreno_gpu->has_ray_tracing;
return 0;
default:
DBG("%s: invalid param: %u", gpu->name, param);
return -EINVAL;
+1
View File
@@ -87,6 +87,7 @@ struct drm_msm_timespec {
#define MSM_PARAM_VA_START 0x0e /* RO: start of valid GPU iova range */
#define MSM_PARAM_VA_SIZE 0x0f /* RO: size of valid GPU iova range (bytes) */
#define MSM_PARAM_HIGHEST_BANK_BIT 0x10 /* RO */
#define MSM_PARAM_RAYTRACING 0x11 /* RO */
/* For backwards compat. The original support for preemption was based on
* a single ring per priority level so # of priority levels equals the #