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drm/amdgpu: Reduce redundant gpu resets on nbio v7.4

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On nbio v7.4, ras controller interrupt and athub
interrupt are generated after injecting UE to PCIE,
but gpu reset only needs to be triggered once.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
YiPeng Chai
2024-10-24 18:04:34 -04:00
committed by Alex Deucher
parent 1cdd67510e
commit 3d0ffc6418
1 changed files with 1 additions and 2 deletions
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drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
+1 -2
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@@ -414,8 +414,7 @@ static void nbio_v7_4_handle_ras_controller_intr_no_bifring(struct amdgpu_device
/* ras_controller_int is dedicated for nbif ras error,
* not the global interrupt for sync flood
*/
amdgpu_ras_set_fed(adev, true);
amdgpu_ras_reset_gpu(adev);
amdgpu_ras_global_ras_isr(adev);
}
amdgpu_ras_error_data_fini(&err_data);