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drm/amdgpu: disable sienna chichlid UMC RAS

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disable UMC RAS in lieu of stability issues on certain sku

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
John Clements
2020-09-25 16:55:26 -04:00
committed by Alex Deucher
parent d5cc02d97a
commit 265c280a48
1 changed files with 2 additions and 2 deletions
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drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+2 -2
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@@ -2008,8 +2008,7 @@ static int amdgpu_ras_check_asic_type(struct amdgpu_device *adev)
{
if (adev->asic_type != CHIP_VEGA10 &&
adev->asic_type != CHIP_VEGA20 &&
adev->asic_type != CHIP_ARCTURUS &&
adev->asic_type != CHIP_SIENNA_CICHLID)
adev->asic_type != CHIP_ARCTURUS)
return 1;
else
return 0;
@@ -2053,6 +2052,7 @@ static void amdgpu_ras_check_supported(struct amdgpu_device *adev,
*supported = amdgpu_ras_enable == 0 ?
0 : *hw_supported & amdgpu_ras_mask;
adev->ras_features = *supported;
}