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arm64: dts: altera: socfpga_stratix10: update internal oscillators

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Add the clock-frequency property to the cb_intosc_ls_clk and
cb_intosc_hs_div2_clk device tree nodes.

The f2s_free_clk is implemented by custom logic in the FPGA; so it
should be disabled in the dtsi by default and enabled by a
dts for a specific FPGA design on a specific board.

Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This commit is contained in:
Matthew Gerlach
2025-07-12 07:24:48 -05:00
committed by Dinh Nguyen
parent 1dfe3ca86a
commit 203b862057
1 changed files with 3 additions and 0 deletions
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arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+3
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@@ -130,16 +130,19 @@
cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <150000000>;
};
cb_intosc_ls_clk: cb-intosc-ls-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <300000000>;
};
f2s_free_clk: f2s-free-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
status = "disabled";
};
osc1: osc1 {