arm64: dts: qcom: sm8550: Additionally manage MXC power domain in camcc

Camcc requires both MMCX and MXC rails to be powered ON to configure
the camera PLLs on SM8550 platform. Hence add MXC power domain to
camcc node on SM8550.

Fixes: e271b59e39 ("arm64: dts: qcom: sm8550: Add camera clock controller")
Reviewed-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250822-topic-sm8x50-upstream-pll-multi-pd-voting-dt-v2-5-28f35728a146@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Vladimir Zapolskiy
2025-09-01 13:03:31 -05:00
committed by Bjorn Andersson
parent ad43a5317a
commit 169ccd7cec
+4 -2
View File
@@ -3625,8 +3625,10 @@
<&bi_tcxo_div2>,
<&bi_tcxo_ao_div2>,
<&sleep_clk>;
power-domains = <&rpmhpd RPMHPD_MMCX>;
required-opps = <&rpmhpd_opp_low_svs>;
power-domains = <&rpmhpd RPMHPD_MMCX>,
<&rpmhpd RPMHPD_MXC>;
required-opps = <&rpmhpd_opp_low_svs>,
<&rpmhpd_opp_low_svs>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;