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drm/amdgpu: Remove nbiov7.9 replay count reporting

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Direct pcie replay count reporting is not available on nbio v7.9.
Reporting is done through firmware.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Fixes: 50709d18f4 ("drm/amdgpu: Add pci replay count to nbio v7.9")
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar
2025-06-18 12:19:09 -04:00
committed by Alex Deucher
parent 196aefea44
commit 0f566f0e9c
1 changed files with 0 additions and 20 deletions
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drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
-20
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@@ -31,9 +31,6 @@
#define NPS_MODE_MASK 0x000000FFL
/* Core 0 Port 0 counter */
#define smnPCIEP_NAK_COUNTER 0x1A340218
static void nbio_v7_9_remap_hdp_registers(struct amdgpu_device *adev)
{
WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL,
@@ -467,22 +464,6 @@ static void nbio_v7_9_init_registers(struct amdgpu_device *adev)
}
}
static u64 nbio_v7_9_get_pcie_replay_count(struct amdgpu_device *adev)
{
u32 val, nak_r, nak_g;
if (adev->flags & AMD_IS_APU)
return 0;
/* Get the number of NAKs received and generated */
val = RREG32_PCIE(smnPCIEP_NAK_COUNTER);
nak_r = val & 0xFFFF;
nak_g = val >> 16;
/* Add the total number of NAKs, i.e the number of replays */
return (nak_r + nak_g);
}
#define MMIO_REG_HOLE_OFFSET 0x1A000
static void nbio_v7_9_set_reg_remap(struct amdgpu_device *adev)
@@ -524,7 +505,6 @@ const struct amdgpu_nbio_funcs nbio_v7_9_funcs = {
.get_memory_partition_mode = nbio_v7_9_get_memory_partition_mode,
.is_nps_switch_requested = nbio_v7_9_is_nps_switch_requested,
.init_registers = nbio_v7_9_init_registers,
.get_pcie_replay_count = nbio_v7_9_get_pcie_replay_count,
.set_reg_remap = nbio_v7_9_set_reg_remap,
};