Merge tag 'arm-smmu-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into arm/smmu
Arm SMMU updates for 5.16 - Minor optimisations to SMMUv3 command creation and submission - Numerous new compatible string for Qualcomm SMMUv2 implementations
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@@ -33,10 +33,12 @@ properties:
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- description: Qcom SoCs implementing "arm,mmu-500"
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items:
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- enum:
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- qcom,qcm2290-smmu-500
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- qcom,sc7180-smmu-500
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- qcom,sc7280-smmu-500
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- qcom,sc8180x-smmu-500
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- qcom,sdm845-smmu-500
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- qcom,sm6350-smmu-500
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- qcom,sm8150-smmu-500
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- qcom,sm8250-smmu-500
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- qcom,sm8350-smmu-500
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@@ -409,10 +409,7 @@ static void __arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu,
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dev_err(smmu->dev, "\t0x%016llx\n", (unsigned long long)cmd[i]);
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/* Convert the erroneous command into a CMD_SYNC */
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if (arm_smmu_cmdq_build_cmd(cmd, &cmd_sync)) {
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dev_err(smmu->dev, "failed to convert to CMD_SYNC\n");
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return;
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}
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arm_smmu_cmdq_build_cmd(cmd, &cmd_sync);
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queue_write(Q_ENT(q, cons), cmd, q->ent_dwords);
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}
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@@ -860,7 +857,7 @@ static int __arm_smmu_cmdq_issue_cmd(struct arm_smmu_device *smmu,
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{
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u64 cmd[CMDQ_ENT_DWORDS];
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if (arm_smmu_cmdq_build_cmd(cmd, ent)) {
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if (unlikely(arm_smmu_cmdq_build_cmd(cmd, ent))) {
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dev_warn(smmu->dev, "ignoring unknown CMDQ opcode 0x%x\n",
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ent->opcode);
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return -EINVAL;
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@@ -885,11 +882,20 @@ static void arm_smmu_cmdq_batch_add(struct arm_smmu_device *smmu,
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struct arm_smmu_cmdq_batch *cmds,
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struct arm_smmu_cmdq_ent *cmd)
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{
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int index;
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if (cmds->num == CMDQ_BATCH_ENTRIES) {
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arm_smmu_cmdq_issue_cmdlist(smmu, cmds->cmds, cmds->num, false);
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cmds->num = 0;
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}
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arm_smmu_cmdq_build_cmd(&cmds->cmds[cmds->num * CMDQ_ENT_DWORDS], cmd);
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index = cmds->num * CMDQ_ENT_DWORDS;
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if (unlikely(arm_smmu_cmdq_build_cmd(&cmds->cmds[index], cmd))) {
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dev_warn(smmu->dev, "ignoring unknown CMDQ opcode 0x%x\n",
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cmd->opcode);
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return;
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}
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cmds->num++;
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}
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@@ -1764,10 +1770,11 @@ static int arm_smmu_atc_inv_master(struct arm_smmu_master *master)
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{
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int i;
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struct arm_smmu_cmdq_ent cmd;
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struct arm_smmu_cmdq_batch cmds = {};
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struct arm_smmu_cmdq_batch cmds;
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arm_smmu_atc_inv_to_cmd(0, 0, 0, &cmd);
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cmds.num = 0;
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for (i = 0; i < master->num_streams; i++) {
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cmd.atc.sid = master->streams[i].id;
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arm_smmu_cmdq_batch_add(master->smmu, &cmds, &cmd);
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@@ -231,6 +231,7 @@ static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = {
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{ .compatible = "qcom,sc7180-mdss" },
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{ .compatible = "qcom,sc7180-mss-pil" },
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{ .compatible = "qcom,sc7280-mdss" },
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{ .compatible = "qcom,sc7280-mss-pil" },
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{ .compatible = "qcom,sc8180x-mdss" },
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{ .compatible = "qcom,sdm845-mdss" },
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{ .compatible = "qcom,sdm845-mss-pil" },
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@@ -403,12 +404,14 @@ static struct arm_smmu_device *qcom_smmu_create(struct arm_smmu_device *smmu,
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static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = {
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{ .compatible = "qcom,msm8998-smmu-v2" },
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{ .compatible = "qcom,qcm2290-smmu-500" },
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{ .compatible = "qcom,sc7180-smmu-500" },
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{ .compatible = "qcom,sc7280-smmu-500" },
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{ .compatible = "qcom,sc8180x-smmu-500" },
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{ .compatible = "qcom,sdm630-smmu-v2" },
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{ .compatible = "qcom,sdm845-smmu-500" },
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{ .compatible = "qcom,sm6125-smmu-500" },
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{ .compatible = "qcom,sm6350-smmu-500" },
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{ .compatible = "qcom,sm8150-smmu-500" },
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{ .compatible = "qcom,sm8250-smmu-500" },
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{ .compatible = "qcom,sm8350-smmu-500" },
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