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AArch64: Reserve two 64k pages for GIC CPU interface
On AArch64 system with a GICv2, the GICC range can be aligned to the last 4k block of a 64k page, ending up straddling two 64k pages. In order not to conflict with the distributor mapping, allocate two 64k pages to the CPU interface. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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Will Deacon
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50687d873a
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3fc7fe4ff1
@@ -2,7 +2,7 @@
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#define KVM__KVM_ARCH_H
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#define ARM_GIC_DIST_SIZE 0x10000
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#define ARM_GIC_CPUI_SIZE 0x10000
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#define ARM_GIC_CPUI_SIZE 0x20000
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#define ARM_KERN_OFFSET(kvm) ((kvm)->cfg.arch.aarch32_guest ? \
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0x8000 : \
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