AArch64: Reserve two 64k pages for GIC CPU interface

On AArch64 system with a GICv2, the GICC range can be aligned
to the last 4k block of a 64k page, ending up straddling two
64k pages. In order not to conflict with the distributor mapping,
allocate two 64k pages to the CPU interface.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
Marc Zyngier
2015-07-03 12:26:29 +01:00
committed by Will Deacon
parent 50687d873a
commit 3fc7fe4ff1
+1 -1
View File
@@ -2,7 +2,7 @@
#define KVM__KVM_ARCH_H
#define ARM_GIC_DIST_SIZE 0x10000
#define ARM_GIC_CPUI_SIZE 0x10000
#define ARM_GIC_CPUI_SIZE 0x20000
#define ARM_KERN_OFFSET(kvm) ((kvm)->cfg.arch.aarch32_guest ? \
0x8000 : \