mirror of
https://github.com/clearlinux/graphene.git
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[Pal/Linux-SGX]: Clean-up of {enclave/sgx}_entry.S
Helper asm functions are moved to static inline C functions with inline asm and correct signatures. This allows for better register scheduling.
This commit is contained in:
committed by
Dmitrii Kuvaiskii
parent
178faecb88
commit
b7dd160270
@@ -620,101 +620,6 @@ __morestack:
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popq %rbp
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retq
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/*
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* sgx_report:
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* Generate SGX hardware signed report.
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*/
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.global sgx_report
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.type sgx_report, @function
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sgx_report:
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.cfi_startproc
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pushq %rbx
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pushq %rcx
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movq %rdi, %rbx
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movq %rsi, %rcx
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movq $EREPORT, %rax
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ENCLU
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popq %rcx
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popq %rbx
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retq
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.cfi_endproc
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.size sgx_report, .-sgx_report
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/*
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* sgx_getkey:
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* Retreive SGX hardware enclave cryptography key.
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*/
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.global sgx_getkey
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.type sgx_getkey, @function
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sgx_getkey:
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.cfi_startproc
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pushq %rbx
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pushq %rcx
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movq %rdi, %rbx
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movq %rsi, %rcx
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movq $EGETKEY, %rax
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ENCLU
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popq %rcx
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popq %rbx
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retq
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.cfi_endproc
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.size sgx_getkey, .-sgx_getkey
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/*
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* rdrand:
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* Get hardware generated random value.
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*/
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.global rdrand
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.type rdrand, @function
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rdrand:
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.cfi_startproc
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.Lretry_rdrand:
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.byte 0x0f, 0xc7, 0xf0 /* RDRAND %EAX */
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jnc .Lretry_rdrand
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retq
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.cfi_endproc
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.size rdrand, .-rdrand
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/*
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* rdfsbase:
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* read FS register (allowed in enclaves).
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*/
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.global rdfsbase
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.type rdfsbase, @function
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rdfsbase:
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.cfi_startproc
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.byte 0xf3, 0x48, 0x0f, 0xae, 0xc0 /* RDFSBASE %RAX */
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retq
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.cfi_endproc
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.size rdfsbase, .-rdfsbase
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/*
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* wrfsbase:
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* modify FS register (allowed in enclaves).
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*/
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.global wrfsbase
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.type wrfsbase, @function
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wrfsbase:
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.cfi_startproc
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.byte 0xf3, 0x48, 0x0f, 0xae, 0xd7 /* WRFSBASE %RDI */
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retq
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.cfi_endproc
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.size wrfsbase, .-wrfsbase
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/*
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* Restore an sgx_context_t as generated by .Lhandle_exception. Execution will
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* continue as specified by the rip in the context.
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@@ -104,7 +104,7 @@ int sgx_get_report (sgx_arch_hash_t * mrenclave,
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int ret = sgx_report(&targetinfo, &state, report);
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if (ret)
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return -PAL_ERROR_DENIED;
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return -PAL_ERROR_INVAL;
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SGX_DBG(DBG_S, "Generated report:\n");
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SGX_DBG(DBG_S, " cpusvn: %08lx %08lx\n", report->cpusvn[0],
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@@ -910,10 +910,9 @@ int init_enclave (void)
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sgx_arch_report_t report;
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int ret = sgx_report(&targetinfo, &reportdata, &report);
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if (ret) {
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SGX_DBG(DBG_E, "failed to get self report: %d\n", ret);
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if (ret)
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return -PAL_ERROR_INVAL;
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}
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memcpy(pal_sec.mrenclave, report.mrenclave, sizeof(pal_sec.mrenclave));
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memcpy(pal_sec.mrsigner, report.mrsigner, sizeof(pal_sec.mrsigner));
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pal_sec.enclave_attributes = report.attributes;
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@@ -17,6 +17,7 @@
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#ifndef SGX_API_H
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#define SGX_API_H
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#include "sgx_arch.h"
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#include "pal_error.h"
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int sgx_ocall (unsigned long code, void * ms);
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@@ -31,10 +32,6 @@ void sgx_reset_ustack(void);
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bool sgx_copy_ptr_to_enclave(void** ptr, void* uptr, uint64_t size);
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uint64_t sgx_copy_to_enclave(const void* ptr, uint64_t maxsize, const void* uptr, uint64_t usize);
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int sgx_report (sgx_arch_targetinfo_t * targetinfo,
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void * reportdata, sgx_arch_report_t * report);
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int sgx_getkey (sgx_arch_keyrequest_t * keyrequest, sgx_arch_key128_t * key);
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int sgx_get_report (sgx_arch_hash_t * mrenclave,
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sgx_arch_attributes_t * attributes,
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@@ -43,9 +40,74 @@ int sgx_get_report (sgx_arch_hash_t * mrenclave,
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int sgx_verify_report (sgx_arch_report_t * report);
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uint32_t rdrand (void);
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uint64_t rdfsbase (void);
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void wrfsbase (uint64_t addr);
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/*
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* sgx_report:
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* Generate SGX hardware signed report.
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*/
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static inline int sgx_report (sgx_arch_targetinfo_t * targetinfo,
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void * reportdata, sgx_arch_report_t * report)
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{
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__asm__ volatile(
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ENCLU "\n"
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:: "a"(EREPORT), "b"(targetinfo), "c"(reportdata), "d"(report)
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: "memory");
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return 0;
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}
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/*
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* sgx_getkey:
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* Retrieve SGX hardware enclave cryptography key.
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*/
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static inline int64_t sgx_getkey (sgx_arch_keyrequest_t * keyrequest,
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sgx_arch_key128_t * key)
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{
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int64_t rax = EGETKEY;
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__asm__ volatile(
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ENCLU "\n"
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: "+a"(rax)
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: "b"(keyrequest), "c"(key)
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: "memory");
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return rax;
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}
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/*
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* rdrand:
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* Get hardware generated random value.
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*/
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static inline uint32_t rdrand (void)
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{
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uint32_t ret;
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__asm__ volatile(
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"1: .byte 0x0f, 0xc7, 0xf0\n" /* RDRAND %EAX */
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"jnc 1b\n"
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:"=a"(ret)
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:: "cc");
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return ret;
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}
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/*
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* rdfsbase:
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* read FS register (allowed in enclaves).
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*/
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static inline uint64_t rdfsbase (void)
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{
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uint64_t fsbase;
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__asm__ volatile(
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".byte 0xf3, 0x48, 0x0f, 0xae, 0xc0\n" /* RDFSBASE %RAX */
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: "=a"(fsbase));
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return fsbase;
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}
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/*
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* wrfsbase:
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* modify FS register (allowed in enclaves).
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*/
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static inline void wrfsbase (uint64_t addr)
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{
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__asm__ volatile(
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".byte 0xf3, 0x48, 0x0f, 0xae, 0xd7\n" /* WRFSBASE %RDI */
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:: "D"(addr));
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}
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void restore_sgx_context(sgx_context_t *ctx);
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void _restore_sgx_context(sgx_context_t *ctx);
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@@ -251,6 +251,8 @@ typedef struct {
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typedef uint8_t sgx_arch_key128_t[16] __attribute__((aligned(16)));
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#define ENCLU ".byte 0x0f, 0x01, 0xd7"
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#else /* !__ASSEMBLER__ */
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/* microcode to call ENCLU */
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@@ -75,35 +75,3 @@ sgx_entry_return:
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# RSI - external event
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jmp .Ldo_ecall
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.cfi_endproc
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/*
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* rdfsbase:
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* read FS register (allowed in enclaves).
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*/
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.global rdfsbase
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.type rdfsbase, @function
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rdfsbase:
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.cfi_startproc
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.byte 0xf3, 0x48, 0x0f, 0xae, 0xc0 /* RDFSBASE %RAX */
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retq
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.cfi_endproc
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.size rdfsbase, .-rdfsbase
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/*
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* wrfsbase:
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* modify FS register (allowed in enclaves).
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*/
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.global wrfsbase
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.type wrfsbase, @function
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wrfsbase:
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.cfi_startproc
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.byte 0xf3, 0x48, 0x0f, 0xae, 0xd7 /* WRFSBASE %RDI */
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retq
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.cfi_endproc
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.size wrfsbase, .-wrfsbase
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