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delocate: match all the ARM register extension patterns.

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Change-Id: I42d210ae4be106fb2898b986bb17dfe293454828
Reviewed-on: https://boringssl-review.googlesource.com/c/boringssl/+/55665
Reviewed-by: David Benjamin <davidben@google.com>
Commit-Queue: Adam Langley <agl@google.com>
This commit is contained in:
Adam Langley
2022-12-08 17:30:17 +00:00
committed by Boringssl LUCI CQ
parent 7ff871acbe
commit ba509dca55
4 changed files with 1056 additions and 1209 deletions
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util/fipstools/delocate/delocate.peg
+1 -1
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@@ -77,7 +77,7 @@ RegisterOrConstant <- (('%'[[A-Z]][[A-Z0-9]]*) /
('#' '~'? '(' [0-9] WS? "<<" WS? [0-9] ')' ) /
ARMRegister)
![fb:(+\-]
ARMConstantTweak <- ("lsl" / "sxtw" / "sxtb" / "uxtw" / "uxtb" / "lsr" / "ror" / "asr") (WS '#' Offset)?
ARMConstantTweak <- (([us] "xt" [xwhb]) / "lsl" / "lsr" / "ror" / "asr") (WS '#' Offset)?
ARMRegister <- "sp" / ([xwdqshb] [0-9] [0-9]?) / "xzr" / "wzr" / "NZCV" / ARMVectorRegister / ('{' WS? ARMVectorRegister (',' WS? ARMVectorRegister)* WS? '}' ('[' [0-9] [0-9]? ']')? )
ARMVectorRegister <- "v" [0-9] [0-9]? ('.' [0-9]* [bsdhq] ('[' [0-9] [0-9]? ']')? )?
# Compilers only output a very limited number of expression forms. Rather than
util/fipstools/delocate/delocate.peg.go
+1033 -1208
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File diff suppressed because it is too large Load Diff
util/fipstools/delocate/testdata/aarch64-Basic/in.s
Vendored
+11
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@@ -67,6 +67,17 @@ foo:
add y0, y0
add y12, y12
// Make sure that the magic extension constants are recognised rather
// than being interpreted as symbols.
add w0, w1, b2, uxtb
add w0, w1, b2, uxth
add w0, w1, b2, uxtw
add w0, w1, b2, uxtx
add w0, w1, b2, sxtb
add w0, w1, b2, sxth
add w0, w1, b2, sxtw
add w0, w1, b2, sxtx
local_function:
util/fipstools/delocate/testdata/aarch64-Basic/out.s
Vendored
+11
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@@ -114,6 +114,17 @@ foo:
// WAS add y12, y12
add bcm_redirector_y12, bcm_redirector_y12
// Make sure that the magic extension constants are recognised rather
// than being interpreted as symbols.
add w0, w1, b2, uxtb
add w0, w1, b2, uxth
add w0, w1, b2, uxtw
add w0, w1, b2, uxtx
add w0, w1, b2, sxtb
add w0, w1, b2, sxth
add w0, w1, b2, sxtw
add w0, w1, b2, sxtx
.Llocal_function_local_target:
local_function: