chacha: Move 32-bit Arm CPU dispatch from assembly to C
This also removes handling of the empty input, to match what was done for aarch64. (The C code ensures the function is never called in this case.) Bug: 673 Change-Id: I7e868a9eb0b022c22c3f4ba2c8782ae1464c5a52 Reviewed-on: https://boringssl-review.googlesource.com/c/boringssl/+/64967 Auto-Submit: David Benjamin <davidben@google.com> Reviewed-by: Bob Beck <bbe@google.com> Commit-Queue: Bob Beck <bbe@google.com>
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Boringssl LUCI CQ
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@@ -196,39 +196,14 @@ $code.=<<___;
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.long 0x61707865,0x3320646e,0x79622d32,0x6b206574 @ endian-neutral
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.Lone:
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.long 1,0,0,0
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#if __ARM_MAX_ARCH__>=7
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.LOPENSSL_armcap:
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.word OPENSSL_armcap_P-.Lsigma
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#else
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.word -1
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#endif
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.globl ChaCha20_ctr32
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.type ChaCha20_ctr32,%function
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.globl ChaCha20_ctr32_nohw
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.type ChaCha20_ctr32_nohw,%function
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.align 5
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ChaCha20_ctr32:
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.LChaCha20_ctr32:
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ChaCha20_ctr32_nohw:
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ldr r12,[sp,#0] @ pull pointer to counter and nonce
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stmdb sp!,{r0-r2,r4-r11,lr}
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adr r14,.Lsigma
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cmp r2,#0 @ len==0?
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#ifdef __thumb2__
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itt eq
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#endif
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addeq sp,sp,#4*3
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beq .Lno_data
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#if __ARM_MAX_ARCH__>=7
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cmp r2,#192 @ test len
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bls .Lshort
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ldr r4,[r14,#32]
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ldr r4,[r14,r4]
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# ifdef __APPLE__
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ldr r4,[r4]
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# endif
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tst r4,#ARMV7_NEON
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bne .LChaCha20_neon
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.Lshort:
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#endif
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ldmia r12,{r4-r7} @ load counter and nonce
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sub sp,sp,#4*(16) @ off-load area
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stmdb sp!,{r4-r7} @ copy counter and nonce
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@@ -621,9 +596,8 @@ $code.=<<___;
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.Ldone:
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add sp,sp,#4*(32+3)
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.Lno_data:
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ldmia sp!,{r4-r11,pc}
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.size ChaCha20_ctr32,.-ChaCha20_ctr32
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.size ChaCha20_ctr32_nohw,.-ChaCha20_ctr32_nohw
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___
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{{{
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@@ -665,12 +639,12 @@ $code.=<<___;
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.arch armv7-a
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.fpu neon
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.type ChaCha20_neon,%function
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.globl ChaCha20_ctr32_neon
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.type ChaCha20_ctr32_neon,%function
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.align 5
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ChaCha20_neon:
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ChaCha20_ctr32_neon:
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ldr r12,[sp,#0] @ pull pointer to counter and nonce
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stmdb sp!,{r0-r2,r4-r11,lr}
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.LChaCha20_neon:
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adr r14,.Lsigma
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vstmdb sp!,{d8-d15} @ ABI spec says so
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stmdb sp!,{r0-r3}
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@@ -1145,8 +1119,7 @@ $code.=<<___;
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vldmia sp,{d8-d15}
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add sp,sp,#4*(16+3)
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ldmia sp!,{r4-r11,pc}
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.size ChaCha20_neon,.-ChaCha20_neon
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.comm OPENSSL_armcap_P,4,4
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.size ChaCha20_ctr32_neon,.-ChaCha20_ctr32_neon
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#endif
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___
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}}}
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@@ -30,11 +30,12 @@ void CRYPTO_hchacha20(uint8_t out[32], const uint8_t key[32],
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const uint8_t nonce[16]);
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#if !defined(OPENSSL_NO_ASM) && \
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(defined(OPENSSL_X86) || defined(OPENSSL_X86_64) || defined(OPENSSL_ARM))
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(defined(OPENSSL_X86) || defined(OPENSSL_X86_64))
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#define CHACHA20_ASM
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#elif !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64)
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#elif !defined(OPENSSL_NO_ASM) && \
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(defined(OPENSSL_ARM) || defined(OPENSSL_AARCH64))
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#define CHACHA20_ASM_NOHW
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