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kernel-zhihe-a210/arch/riscv/boot/dts/zhihe/a210-emu.dts
2026-01-30 17:09:03 +08:00

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/dts-v1/;
#include "a210-soc-core.dtsi"
#include "a210-soc-peri.dtsi"
#include "a210-platform-emu.dtsi"
/ {
model = "A210 EMU configuration";
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
pcie3x4 = &dm3x4;
pcie3x1 = &rp3x1;
};
/* The first 2M will be reserved in the Kernel, and the entire available range is set here */
memory@0 {
device_type = "memory";
reg = <0x00 0x80000000 0x01 0x00000000>; /* 4G - 64MB */
numa-node-id = <0>;
};
reserved-memory {
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x00 0x4000000>;
alloc-ranges = <0x00 0x90000000 0x00 0x4000000>;
linux,cma-default;
};
memory@1c000000 {
reg = <0x00 0x1c000000 0x00 0x2000000>;
no-map;
};
framebuffer: framebuffer@10000000 {
reg = <0x00 0x10000000 0x00 0x6700000>;
no-map;
};
zh_videomem@100000000 {
reg = <0x01 0x00 0x00 0x20000000>;
no-map;
};
npu_mmu_memory@130000000 {
reg = <0x01 0x30000000 0x00 0x04000000>;
no-map;
};
memblock-memory@17c000000 {
reg = <0x01 0x7c000000 0x00 0x04000000>;
no-map;
};
};
/* The bootargs in U-Boot will override the configuration set here. */
chosen {
stdout-path = "serial4";
};
};
&clk {
compatible = "zhihe,a210-clk-emu";
};
&vidmem {
status = "okay";
memory-region = <&framebuffer>;
};
/*
* The reference frequency of the serial is limited and cannot be modified.
* To ensure normal printing through the serial port,
* it is necessary to ensure consistency between the frequency division and boot stages,
* and force the setting of a reference frequency of 24M.
*/
&clk_peri {
uart_sclk_frequency = <24000000>;
};
&bmu0 {
status = "okay";
};
&bmu1 {
status = "disabled";
};
&bmu2 {
status = "disabled";
};
&bmu3 {
status = "disabled";
};
&bmu4 {
status = "disabled";
};
&bmu5 {
status = "disabled";
};
&bmu6 {
status = "disabled";
};
&bmu7 {
status = "disabled";
};
&bmu8 {
status = "disabled";
};
&bmu9 {
status = "disabled";
};