OERV-BSP/kernel-zhihe-a210
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Release develop 251121

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This commit is contained in:
hongyi
2025-11-21 14:24:33 +08:00
parent e081635272
commit e3942b9ebf
8 changed files with 59 additions and 29 deletions
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5
arch/riscv/boot/dts/zhihe/a210-evb-d2d.dts
View File

@@ -94,6 +94,11 @@
no-map;
};
npu1_mmu_memory@2130000000 {
reg = <0x21 0x30000000 0x00 0x04000000>;
no-map;
};
memblock-memory@17b800000 {
reg = <0x01 0x7b800000 0x00 0x04000000>;
no-map;

36
arch/riscv/boot/dts/zhihe/a210-soc-peri-die1.dtsi
View File

@@ -210,5 +210,41 @@
#mbox-cells = <2>;
status = "okay";
};
npu1: vipcore1@0x2007000000 {
compatible = "verisilicon,vipcore1";
reg = <0x20 0x07000000 0x00 0x10000>;
interrupt-parent = <&intc>;
interrupts = <71>;
clocks = <&clk_die1 TOP_NPU_CCLK_DIV>,
<&clk_die1 TOP_NPU_ACLK_DIV>;
clock-names = "npu_cclk", "npu_aclk";
power-domains = <&power_npu_ip>;
status = "okay";
};
npu2: vipcore2@0x4007000000 {
compatible = "verisilicon,vipcore2";
reg = <0x40 0x07000000 0x00 0x10000>;
interrupt-parent = <&intc>;
interrupts = <71>;
clocks = <&clk_die2 TOP_NPU_CCLK_DIV>,
<&clk_die2 TOP_NPU_ACLK_DIV>;
clock-names = "npu_cclk", "npu_aclk";
power-domains = <&power_npu_ip>;
status = "okay";
};
npu3: vipcore3@0x6007000000 {
compatible = "verisilicon,vipcore3";
reg = <0x60 0x07000000 0x00 0x10000>;
interrupt-parent = <&intc>;
interrupts = <71>;
clocks = <&clk_die3 TOP_NPU_CCLK_DIV>,
<&clk_die3 TOP_NPU_ACLK_DIV>;
clock-names = "npu_cclk", "npu_aclk";
power-domains = <&power_npu_ip>;
status = "okay";
};
};
};

7
arch/riscv/boot/dts/zhihe/a210-soc-peri.dtsi
View File

@@ -1672,6 +1672,9 @@
#mbox-cells = <2>;
version = <1>;
status = "okay";
aon_wdt0: aon_wdt@0 {
compatible = "zhihe,aon_wdt";
};
};
sata: sata@000a200000 {
@@ -1821,8 +1824,8 @@
};
npu0: vipcore@0x07000000 {
compatible = "verisilicon,vipcore";
reg = <0x00 0x7000000 0x00 0x20000>;
compatible = "verisilicon,vipcore0";
reg = <0x00 0x7000000 0x00 0x10000>;
interrupt-parent = <&intc>;
interrupts = <71>;
clocks = <&clk TOP_NPU_CCLK_DIV>,

2
drivers/firmware/thead/th1520_aon.c
View File

@@ -210,7 +210,7 @@ out:
}
EXPORT_SYMBOL(th1520_aon_call_rpc);
int get_aon_log_mem(struct device *dev, phys_addr_t *mem, size_t *mem_size)
static int get_aon_log_mem(struct device *dev, phys_addr_t *mem, size_t *mem_size)
{
struct resource r;
struct device_node *node;

5
drivers/firmware/zhihe/zhihe_aon.c
View File

@@ -211,7 +211,7 @@ out:
}
EXPORT_SYMBOL(zhihe_aon_call_rpc);
int get_aon_log_mem(struct device *dev, phys_addr_t *mem, size_t *mem_size)
static int get_aon_log_mem(struct device *dev, phys_addr_t *mem, size_t *mem_size)
{
struct resource r;
struct device_node *node;
@@ -323,7 +323,7 @@ static int __maybe_unused zhihe_aon_resume_noirq(struct device *dev)
aon_chan = &zhihe_aon_ipc_handle->chans;
complete(&aon_chan->tx_done);
#endif
#endif
return 0;
}
@@ -344,4 +344,3 @@ MODULE_AUTHOR("hongkun.xu <xuhongkun@zhcomputing.com>");
MODULE_AUTHOR("xionglue.huang <huangxionglue@zhcomputing.com>");
MODULE_DESCRIPTION("ZHIHE firmware protocol driver");
MODULE_LICENSE("GPL v2");

1
drivers/pinctrl/pinctrl-a210.c
View File

@@ -1149,7 +1149,6 @@ static int a210_pinctrl_suspend(struct device *dev)
case A210_PADCTRL_2:
ret = a210_pinctrl_backup_regs(pp, A210_PADCTRL2_CFG_REG_NUMS, A210_PADCTRL2_MUX_REG_NUMS);
clk_disable_unprepare(pp->clk);
pp->mux_bak[A210_AUDIO_IO_SEL_IDX] = readl(pp->base);
break;
default:
break;

3
drivers/pinctrl/pinctrl-th1520.c
View File

@@ -166,7 +166,7 @@ static int th1520_audio_func_sel(struct th1520_pinctrl *thp,
return 0;
}
static const struct custom_operations th1520_custom_ops = {
static struct custom_operations th1520_custom_ops = {
.init = th1520_audio_func_sel,
};
@@ -1012,7 +1012,6 @@ static int th1520_pinctrl_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
const struct th1520_pad_group *group = device_get_match_data(dev);
struct th1520_pinctrl *thp;
struct clk *clk;
int ret;
thp = devm_kzalloc(dev, sizeof(*thp), GFP_KERNEL);

29
drivers/watchdog/zhihe_wdt.c
View File

@@ -388,33 +388,22 @@ static int zhihe_wdt_resume(struct device *dev)
static DEFINE_SIMPLE_DEV_PM_OPS(zhihe_wdt_pm_ops, zhihe_wdt_suspend, zhihe_wdt_resume);
static const struct of_device_id zhihe_wdt_of_match[] = {
{ .compatible = "zhihe,aon_wdt", },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, zhihe_wdt_of_match);
static struct platform_driver zhihe_wdt_driver = {
.probe = zhihe_wdt_probe,
.driver = {
.name = DRV_NAME,
.of_match_table = zhihe_wdt_of_match,
.pm = pm_sleep_ptr(&zhihe_wdt_pm_ops),
},
.probe = zhihe_wdt_probe,
};
static int __init zhihe_wdt_init(void)
{
static struct platform_device *pdev;
int ret;
pdev = platform_device_register_simple(DRV_NAME, -1, NULL, 0);
if (IS_ERR(pdev))
return PTR_ERR(pdev);
ret = platform_driver_register(&zhihe_wdt_driver);
if (ret) {
platform_device_unregister(pdev);
return PTR_ERR(pdev);
}
pr_info("Watchdog module: %s loaded\n", DRV_NAME);
return 0;
}
device_initcall(zhihe_wdt_init);
module_platform_driver(zhihe_wdt_driver);
MODULE_AUTHOR("Wei.Liu <lw312886@linux.alibaba.com>");
MODULE_DESCRIPTION("PMIC Watchdog Driver for p100");