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This commit is contained in:
hongyi
2025-09-29 11:57:42 +08:00
parent ef2d7e51cf
commit 3ae127f9aa
20 changed files with 817 additions and 851 deletions
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49
.cicd/.gitlab-ci.yml
View File

@@ -15,33 +15,23 @@ mr-code-review:
mr-build-virt:
stage: build
script:
- zb diskimage -ekernel:source-path=$PWD -osubsystem=test -oboard=virt --tar
artifacts:
paths:
- build/Release/*.tar.gz
expire_in: 1 days
- zb diskimage -ekernel:source-path=$PWD -osubsystem=test -odistro=debian -oboard=virt --tar
rules:
- if: $CI_PIPELINE_SOURCE == "merge_request_event"
mr-build-p1:
mr-build-a200-evb:
stage: build
script:
- zb diskimage -ekernel:source-path=$PWD -osubsystem=test -oboard=p1 --tar
artifacts:
paths:
- build/Release/*.tar.gz
expire_in: 1 days
- zb diskimage -ekernel:source-path=$PWD -osubsystem=test -odistro=debian -oboard=a200-evb --tar
- zb gitlab upload build/Release/*.tar.gz # 上传到临时 mr artifactory
rules:
- if: $CI_PIPELINE_SOURCE == "merge_request_event"
mr-build-p100-evb:
mr-build-a210-evb:
stage: build
script:
- zb diskimage -ekernel:source-path=$PWD -osubsystem=test -oboard=p100-evb --tar
artifacts:
paths:
- build/Release/*.tar.gz
expire_in: 1 days
- zb diskimage -ekernel:source-path=$PWD -osubsystem=test -odistro=debian -oboard=a210-evb --tar
- zb gitlab upload build/Release/*.tar.gz # 上传到临时 mr artifactory
rules:
- if: $CI_PIPELINE_SOURCE == "merge_request_event"
@@ -54,34 +44,33 @@ mr-test-virt:
rules:
- if: $CI_PIPELINE_SOURCE == "merge_request_event"
mr-test-p1:
mr-test-a200-evb:
stage: test
script:
- zb gitlab run --timeout 600 --board "p1-evb_develop-*" .cicd/runtest-p1.sh
- zb gitlab run --timeout 600 --board "p1-*" .cicd/runtest-a200-evb.sh
dependencies:
- mr-build-p1
- mr-build-a200-evb
tags:
- board-runner
- a200-board-runner
rules:
- if: $CI_PIPELINE_SOURCE == "merge_request_event"
mr-test-p100-evb:
mr-test-a210-evb:
stage: test
script:
- echo "无测试"
# - zb gitlab run --timeout 600 --board "a210-evb-*" .cicd/runtest-p100-evb.sh
- zb gitlab run --timeout 600 --board "a210-evb-3-*" .cicd/runtest-a210-evb.sh
dependencies:
- mr-build-p100-evb
- mr-build-a210-evb
tags:
- board-runner
- a210-board-runner
rules:
- if: $CI_PIPELINE_SOURCE == "merge_request_event"
mr-deploy:
stage: deploy
script:
- zb kernel -f -esource-path=$PWD -oboard=p100-evb
- zb kernel -f -esource-path=$PWD -oboard=p1
- zb kernel -f -esource-path=$PWD -oboard=a210-evb
- zb kernel -f -esource-path=$PWD -oboard=a200-evb
- zb kernel -f -esource-path=$PWD -oboard=virt
- zb upload kernel --all
rules:
@@ -95,8 +84,8 @@ before_script:
- export DISK_IMAGE=diskimage_${SDK_VERSION//\//_}
- export VIRT_TARGZ=${DISK_IMAGE}_virt-release_test.tar.gz
- export P1_TARGZ=${DISK_IMAGE}_p1-release_test.tar.gz
- export P100_EVB_EMMC_TARGZ=${DISK_IMAGE}_p100-evb-release_test.tar.gz
- export A200_EVB_IMAGE=${DISK_IMAGE}_a200-evb-release_test_debian.tar.gz
- export A210_EVB_IMAGE=${DISK_IMAGE}_a210-evb-release_test_debian.tar.gz
- export
variables:

13
.cicd/runtest-p1.sh
View File

@@ -1,13 +0,0 @@
#!/bin/bash
set -e
echo "---------------------------------------- runtest-p1.sh board: $BOARD_NAME, username: $ZB_BOARD_USERNAME"
zflash -b $BOARD_NAME -w emmc emmc_boot.loader --tar=../build/Release/$P1_TARGZ
zb test cicd-testcase
if [ $? -ne 0 ]; then
echo "Tests failed, please check the logs."
exit 1
fi

2
.cicd/version.sh
View File

@@ -15,4 +15,4 @@ fi
zbuild build zbuild -f || true
# 删除一天前的遗留目录
find $CI_BUILDS_DIR -name "[0-9]*" -type d -maxdepth 1 -mtime +1 -exec rm -r {} \; || true
find $CI_BUILDS_DIR -maxdepth 1 -type d -name "[0-9]*" -mtime +1 -exec rm -r {} \; || true

5
arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
View File

@@ -700,7 +700,7 @@
&gmac0 {
pinctrl-names = "default";
pinctrl-0 = <&gmac0_pins>;
pinctrl-0 = <&gmac0_pins &mdio0_pins>;
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
status = "okay";
@@ -785,9 +785,6 @@
};
&mdio0 {
pinctrl-names = "default";
pinctrl-0 = <&mdio0_pins>;
phy0: ethernet-phy@1 {
reg = <1>;
};

135
arch/riscv/boot/dts/zhihe/a210-dev.dts
View File

@@ -121,13 +121,13 @@
#size-cells = <0>;
status = "okay";
simple-audio-card,widgets = "Speaker";
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
"Speaker", "AW87565_PA2 VO",
"AW87565_PA2 IN", "ES8156_DAC1 LOUT";
simple-audio-card,aux-devs = <&audio_aw87565_pa2>;
SOUND_CARD_LINK(0, i2s, i2s1, 0, es8156_dac1, 0); /* I2S1 <-> es8156_dac1 */
SOUND_CARD_LINK(1, i2s, i2s1, 0, es7210_adc1, 0); /* I2S1 <-> es7210_adc1 */
SOUND_CARD_LINK(0, i2s, i2s1, 0, es8156_dac1, 0);
SOUND_CARD_LINK(1, i2s, i2s1, 0, es7210_adc1, 0);
};
/* The bootargs in U-Boot will override the configuration set here. */
@@ -136,10 +136,25 @@
};
};
&aon_padctrl {
rtc_pins: rtc {
rtc-pins {
pins = "AOGPIO0_27";
function = "aogpio0";
bias-disable;
drive-strength = <13>;
input-enable;
input-schmitt-disable;
slew-rate = <0>;
};
};
};
&peri1_padctrl {
gmac0_pins: gmac0-0 {
txclk-pins {
pins = "GPIO0_0"; /* GMAC0_TX_CLK */
pins = "GPIO0_0", /* GMAC0_TX_CLK */
"GPIO0_12"; /* GMAC0_MDC */
function = "gmac0";
bias-disable;
drive-strength = <13>;
@@ -150,10 +165,10 @@
tx-pins {
pins = "GPIO0_2", /* GMAC0_TXEN */
"GPIO0_3", /* GMAC0_TXD0 */
"GPIO0_4", /* GMAC0_TXD1 */
"GPIO0_5", /* GMAC0_TXD2 */
"GPIO0_6"; /* GMAC0_TXD3 */
"GPIO0_3", /* GMAC0_TXD0 */
"GPIO0_4", /* GMAC0_TXD1 */
"GPIO0_5", /* GMAC0_TXD2 */
"GPIO0_6"; /* GMAC0_TXD3 */
function = "gmac0";
bias-disable;
drive-strength = <20>;
@@ -164,11 +179,12 @@
rx-pins {
pins = "GPIO0_1", /* GMAC0_RX_CLK */
"GPIO0_7", /* GMAC0_RXDV */
"GPIO0_8", /* GMAC0_RXD0 */
"GPIO0_9", /* GMAC0_RXD1 */
"GPIO0_10", /* GMAC0_RXD2 */
"GPIO0_11"; /* GMAC0_RXD3 */
"GPIO0_7", /* GMAC0_RXDV */
"GPIO0_8", /* GMAC0_RXD0 */
"GPIO0_9", /* GMAC0_RXD1 */
"GPIO0_10", /* GMAC0_RXD2 */
"GPIO0_11", /* GMAC0_RXD3 */
"GPIO0_13"; /* GMAC0_MDIO */
function = "gmac0";
bias-disable;
drive-strength = <13>;
@@ -177,27 +193,6 @@
slew-rate = <0>;
};
};
mdio0_pins: mdio0-0 {
mdc-pins {
pins = "GPIO0_12"; /* GMAC0_MDC */
function = "gmac0";
bias-disable;
drive-strength = <13>;
input-disable;
input-schmitt-disable;
slew-rate = <0>;
};
mdio-pins {
pins = "GPIO0_13"; /* GMAC0_MDIO */
function = "gmac0";
bias-disable;
drive-strength = <13>;
input-enable;
input-schmitt-enable;
slew-rate = <0>;
};
};
i2s0_pins: i2s0-1 {
i2s-pins {
pins = "GPIO0_28", "GPIO0_29", "GPIO0_30", "GPIO0_31", "GPIO1_0";
@@ -253,7 +248,7 @@
};
pcie_x4_pins: pcie_x4-1 {
pcie_x4-pins {
pins = "GPIO0_28", "GPIO0_29", "GPIO0_30", "GPIO0_31";
pins = "GPIO0_28", "GPIO0_29", "GPIO0_31";
function = "pcie_x4";
bias-disable;
drive-strength = <7>;
@@ -264,7 +259,8 @@
};
gmac1_pins: gmac1-0 {
txclk-pins {
pins = "GPIO1_2"; /* GMAC1_TX_CLK */
pins = "GPIO1_2", /* GMAC1_TX_CLK */
"GPIO1_14"; /* GMAC1_MDC */
function = "gmac1";
bias-disable;
drive-strength = <13>;
@@ -274,10 +270,10 @@
};
tx-pins {
pins = "GPIO1_4", /* GMAC1_TXEN */
"GPIO1_5", /* GMAC1_TXD0 */
"GPIO1_6", /* GMAC1_TXD1 */
"GPIO1_7", /* GMAC1_TXD2 */
"GPIO1_8"; /* GMAC1_TXD3 */
"GPIO1_5", /* GMAC1_TXD0 */
"GPIO1_6", /* GMAC1_TXD1 */
"GPIO1_7", /* GMAC1_TXD2 */
"GPIO1_8"; /* GMAC1_TXD3 */
function = "gmac1";
bias-disable;
drive-strength = <20>;
@@ -287,11 +283,12 @@
};
rx-pins {
pins = "GPIO1_3", /* GMAC1_RX_CLK */
"GPIO1_9", /* GMAC1_RXDV */
"GPIO1_10", /* GMAC1_RXD0 */
"GPIO1_11", /* GMAC1_RXD1 */
"GPIO1_12", /* GMAC1_RXD2 */
"GPIO1_13"; /* GMAC1_RXD3 */
"GPIO1_9", /* GMAC1_RXDV */
"GPIO1_10", /* GMAC1_RXD0 */
"GPIO1_11", /* GMAC1_RXD1 */
"GPIO1_12", /* GMAC1_RXD2 */
"GPIO1_13", /* GMAC1_RXD3 */
"GPIO1_15"; /* GMAC1_MDIO */
function = "gmac1";
bias-disable;
drive-strength = <13>;
@@ -300,27 +297,6 @@
slew-rate = <0>;
};
};
mdio1_pins: mdio1-0 {
mdc-pins {
pins = "GPIO1_14"; /* GMAC1_MDC */
function = "gmac1";
bias-disable;
drive-strength = <13>;
input-disable;
input-schmitt-disable;
slew-rate = <0>;
};
mdio-pins {
pins = "GPIO1_15"; /* GMAC1_MDIO */
function = "gmac1";
bias-disable;
drive-strength = <13>;
input-enable;
input-schmitt-enable;
slew-rate = <0>;
};
};
sdhci_pins: sdhci0-1 {
sd-pins {
pins = "GPIO1_1";
@@ -466,7 +442,7 @@
};
uart8_pins: uart8-1 {
tx-pins {
pins = "GPIO3_2", "GPIO2_22"; // TXD, RTSN
pins = "GPIO3_2"; // TXD
function = "uart8";
bias-disable;
drive-strength = <3>;
@@ -476,7 +452,7 @@
};
rx-pins {
pins = "GPIO3_3", "GPIO2_21"; // RXD, CTSN
pins = "GPIO3_3"; // RXD
function = "uart8";
bias-disable;
drive-strength = <1>;
@@ -497,9 +473,6 @@
};
&mdio0 {
pinctrl-names = "default";
pinctrl-0 = <&mdio0_pins>;
phy0: ethernet-phy@0 {
reg = <0x0>;
};
@@ -513,9 +486,6 @@
};
&mdio1 {
pinctrl-names = "default";
pinctrl-0 = <&mdio1_pins>;
phy1: ethernet-phy@1 {
reg = <0x0>;
};
@@ -545,6 +515,13 @@
pinctrl-names = "default";
pinctrl-0 = <&i2c4_pins>;
clock-frequency = <400000>;
pcf8563: rtc@51 {
pinctrl-names = "default";
pinctrl-0 = <&rtc_pins>;
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};
&i2c5 {
@@ -556,9 +533,9 @@
compatible = "everest,es8156";
reg = <0x8>;
#sound-dai-cells = <1>;
sound-name-prefix = "ES8156_DAC1";
sound-name-prefix = "ES8156_DAC0";
mclk-sclk-ratio = <4>;
status = "okay";
status = "disabled";
};
codec_es7210_adc0: es7210@40 {
@@ -568,8 +545,8 @@
work-mode = "ES7210_NORMAL_I2S";
channels-max = <2>;
mclk-sclk-ratio = <4>;
sound-name-prefix = "ES7210_ADC1";
status = "okay";
sound-name-prefix = "ES7210_ADC0";
status = "disabled";
};
codec_es8156_dac1: es8156@9 {
@@ -582,7 +559,7 @@
};
codec_es7210_adc1: es7210@41 {
compatible = "MicArray_1";
compatible = "MicArray_0";
reg = <0x41>;
#sound-dai-cells = <1>;
work-mode = "ES7210_NORMAL_I2S";

92
arch/riscv/boot/dts/zhihe/a210-evb.dts
View File

@@ -296,7 +296,8 @@
&peri1_padctrl {
gmac0_pins: gmac0-0 {
txclk-pins {
pins = "GPIO0_0"; /* GMAC0_TX_CLK */
pins = "GPIO0_0", /* GMAC0_TX_CLK */
"GPIO0_12"; /* GMAC0_MDC */
function = "gmac0";
bias-disable;
drive-strength = <13>;
@@ -307,10 +308,10 @@
tx-pins {
pins = "GPIO0_2", /* GMAC0_TXEN */
"GPIO0_3", /* GMAC0_TXD0 */
"GPIO0_4", /* GMAC0_TXD1 */
"GPIO0_5", /* GMAC0_TXD2 */
"GPIO0_6"; /* GMAC0_TXD3 */
"GPIO0_3", /* GMAC0_TXD0 */
"GPIO0_4", /* GMAC0_TXD1 */
"GPIO0_5", /* GMAC0_TXD2 */
"GPIO0_6"; /* GMAC0_TXD3 */
function = "gmac0";
bias-disable;
drive-strength = <20>;
@@ -321,11 +322,12 @@
rx-pins {
pins = "GPIO0_1", /* GMAC0_RX_CLK */
"GPIO0_7", /* GMAC0_RXDV */
"GPIO0_8", /* GMAC0_RXD0 */
"GPIO0_9", /* GMAC0_RXD1 */
"GPIO0_10", /* GMAC0_RXD2 */
"GPIO0_11"; /* GMAC0_RXD3 */
"GPIO0_7", /* GMAC0_RXDV */
"GPIO0_8", /* GMAC0_RXD0 */
"GPIO0_9", /* GMAC0_RXD1 */
"GPIO0_10", /* GMAC0_RXD2 */
"GPIO0_11", /* GMAC0_RXD3 */
"GPIO0_13"; /* GMAC0_MDIO */
function = "gmac0";
bias-disable;
drive-strength = <13>;
@@ -334,27 +336,6 @@
slew-rate = <0>;
};
};
mdio0_pins: mdio0-0 {
mdc-pins {
pins = "GPIO0_12"; /* GMAC0_MDC */
function = "gmac0";
bias-disable;
drive-strength = <13>;
input-disable;
input-schmitt-disable;
slew-rate = <0>;
};
mdio-pins {
pins = "GPIO0_13"; /* GMAC0_MDIO */
function = "gmac0";
bias-disable;
drive-strength = <13>;
input-enable;
input-schmitt-enable;
slew-rate = <0>;
};
};
uart3_pins: uart3-0 {
tx-pins {
pins = "GPIO0_3", "GPIO0_6"; // TXD, RTSN
@@ -582,7 +563,8 @@
};
gmac1_pins: gmac1-0 {
txclk-pins {
pins = "GPIO1_2"; /* GMAC1_TX_CLK */
pins = "GPIO1_2", /* GMAC1_TX_CLK */
"GPIO1_14"; /* GMAC1_MDC */
function = "gmac1";
bias-disable;
drive-strength = <13>;
@@ -592,10 +574,10 @@
};
tx-pins {
pins = "GPIO1_4", /* GMAC1_TXEN */
"GPIO1_5", /* GMAC1_TXD0 */
"GPIO1_6", /* GMAC1_TXD1 */
"GPIO1_7", /* GMAC1_TXD2 */
"GPIO1_8"; /* GMAC1_TXD3 */
"GPIO1_5", /* GMAC1_TXD0 */
"GPIO1_6", /* GMAC1_TXD1 */
"GPIO1_7", /* GMAC1_TXD2 */
"GPIO1_8"; /* GMAC1_TXD3 */
function = "gmac1";
bias-disable;
drive-strength = <20>;
@@ -605,11 +587,12 @@
};
rx-pins {
pins = "GPIO1_3", /* GMAC1_RX_CLK */
"GPIO1_9", /* GMAC1_RXDV */
"GPIO1_10", /* GMAC1_RXD0 */
"GPIO1_11", /* GMAC1_RXD1 */
"GPIO1_12", /* GMAC1_RXD2 */
"GPIO1_13"; /* GMAC1_RXD3 */
"GPIO1_9", /* GMAC1_RXDV */
"GPIO1_10", /* GMAC1_RXD0 */
"GPIO1_11", /* GMAC1_RXD1 */
"GPIO1_12", /* GMAC1_RXD2 */
"GPIO1_13", /* GMAC1_RXD3 */
"GPIO1_15"; /* GMAC1_MDIO */
function = "gmac1";
bias-disable;
drive-strength = <13>;
@@ -618,27 +601,6 @@
slew-rate = <0>;
};
};
mdio1_pins: mdio1-0 {
mdc-pins {
pins = "GPIO1_14"; /* GMAC1_MDC */
function = "gmac1";
bias-disable;
drive-strength = <13>;
input-disable;
input-schmitt-disable;
slew-rate = <0>;
};
mdio-pins {
pins = "GPIO1_15"; /* GMAC1_MDIO */
function = "gmac1";
bias-disable;
drive-strength = <13>;
input-enable;
input-schmitt-enable;
slew-rate = <0>;
};
};
uart2_pins: uart2-0 {
tx-pins {
pins = "GPIO1_1";
@@ -1061,9 +1023,6 @@
};
&mdio0 {
pinctrl-names = "default";
pinctrl-0 = <&mdio0_pins>;
phy0: ethernet-phy@0 {
reg = <0x0>;
};
@@ -1077,9 +1036,6 @@
};
&mdio1 {
pinctrl-names = "default";
pinctrl-0 = <&mdio1_pins>;
phy1: ethernet-phy@1 {
reg = <0x0>;
};

27
arch/riscv/boot/dts/zhihe/a210-platform-dev.dtsi
View File

@@ -103,7 +103,7 @@
};
&dm3x4 {
status = "disabled";
status = "okay";
};
&audio_i2s0 {
@@ -111,7 +111,7 @@
};
&audio_i2s1 {
status = "disabled";
status = "okay";
};
&audio_i2s2 {
@@ -239,6 +239,10 @@
status = "disabled";
};
&rtc {
status = "disabled";
};
/* Temporarily disable gpio4 */
&peri3_padctrl {
status = "disabled";
@@ -247,22 +251,3 @@
&gpio4 {
status = "disabled";
};
/* FIX aon_padctrl init failed issue */
/ {
soc {
clocks {
evb_clock_24m: clock-24m {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "evb_clock_24m";
#clock-cells = <0>;
};
};
};
};
&aon_padctrl {
clocks = <&evb_clock_24m>;
};

32
arch/riscv/boot/dts/zhihe/a210-platform-evb.dtsi
View File

@@ -124,41 +124,15 @@
};
&peri3_padctrl {
status = "disabled";
status = "disabled";
};
&gpio4 {
status = "disabled";
};
&peri3_padctrl {
status = "disabled";
};
&gpio4 {
status = "disabled";
status = "disabled";
};
&gmac1 {
status = "disabled";
};
/* FIX aon_padctrl init failed issue */
/ {
soc {
clocks {
evb_clock_24m: clock-24m {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "evb_clock_24m";
#clock-cells = <0>;
};
};
};
};
&aon_padctrl {
clocks = <&evb_clock_24m>;
status = "disabled";
};
/* FIXME: Disabled non-critical peripherals in the bringup phase */

4
arch/riscv/boot/dts/zhihe/a210-soc-core.dtsi
View File

@@ -8,7 +8,7 @@
#include <dt-bindings/iopmp/zh-iopmp.h>
/ {
compatible = "zhihe,p100";
compatible = "zhihe,a210";
#address-cells = <2>;
#size-cells = <2>;
@@ -1248,7 +1248,7 @@
reg-names = "common", "ts", "pd", "vm";
clocks = <&aon_110m>;
#thermal-sensor-cells = <1>;
moortec,ts-coeff-h = <220500>;
moortec,ts-coeff-h = <220000>;
moortec,ts-coeff-g = <42740>;
moortec,ts-coeff-j = <0xFFFFFF60>; // -160
moortec,ts-coeff-cal5 = <4094>;

58
arch/riscv/boot/dts/zhihe/a210-soc-peri.dtsi
View File

@@ -17,7 +17,7 @@
#address-cells = <1>;
#size-cells = <0>;
dpu_enc0: dpu-encoder@0 {
/* default encoder is DSI */
/* default encoder is DSI. */
compatible = "verisilicon,dsi-encoder";
reg = <0>;
status = "disabled";
@@ -110,9 +110,21 @@
reg-io-width = <4>;
phy_version = <301>;
status = "okay";
port@0 {
hdmi_tx_in: endpoint {
remote-endpoint = <&disp1_out>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
hdmi_tx_in: endpoint {
remote-endpoint = <&disp1_out>;
};
};
/* i2s input */
port@1 {
reg = <1>;
hdmi_i2s_rx: endpoint {
remote-endpoint = <&hdmi_i2s_tx>;
};
};
};
};
@@ -504,7 +516,7 @@
};
emmc: sdhci@00500000 {
compatible = "zhihe,p100-dwcmshc";
compatible = "zhihe,a210-dwcmshc";
reg = <0x0 0x00500000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <265>;
@@ -518,7 +530,7 @@
};
sdhci0: sd@00510000 {
compatible = "zhihe,p100-dwcmshc";
compatible = "zhihe,a210-dwcmshc";
reg = <0x00 0x00510000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <337>;
@@ -598,8 +610,10 @@
};
aon_padctrl: aon-padctrl@30848000 {
compatible = "zhihe,p100-group0-pinctrl";
compatible = "zhihe,a210-group0-pinctrl";
reg = <0x00 0x30848000 0x0 0x2000>;
clocks = <&aon_110m>;
clock-names = "pclk";
status = "okay";
};
@@ -608,14 +622,16 @@
reg = <0x00 0x30841000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&aon_110m>, <&osc_32k>;
clock-names = "bus", "db";
status = "okay";
ao_gpio0_porta: ao_gpio0-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
ngpios = <26>;
gpio-ranges = <&aon_padctrl 0 7 26>;
ngpios = <32>;
gpio-ranges = <&aon_padctrl 0 8 15>, <&aon_padctrl 21 23 11>;
reg = <0>;
interrupt-controller;
@@ -630,6 +646,8 @@
reg = <0x00 0x30897000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&aon_110m>, <&osc_32k>;
clock-names = "bus", "db";
status = "okay";
ao_gpio1_porta: ao_gpio1-controller@0 {
@@ -637,7 +655,7 @@
gpio-controller;
#gpio-cells = <2>;
ngpios = <10>;
gpio-ranges = <&aon_padctrl 0 33 10>;
gpio-ranges = <&aon_padctrl 0 34 10>;
reg = <0>;
interrupt-controller;
@@ -648,7 +666,7 @@
};
peri1_padctrl: peri1-padctrl@02026000 {
compatible = "zhihe,p100-group1-pinctrl";
compatible = "zhihe,a210-group1-pinctrl";
reg = <0x00 0x02026000 0x0 0x1000>;
clocks = <&clk_peri PERI1_PAD_CTRL_PCLK_EN>;
clock-names = "pclk";
@@ -656,7 +674,7 @@
};
peri2_padctrl: peri2-padctrl@08411000 {
compatible = "zhihe,p100-group2-pinctrl";
compatible = "zhihe,a210-group2-pinctrl";
reg = <0x00 0x08411000 0x0 0x1000>;
clocks = <&clk_peri PERI2_PAD_CTRL_PCLK_EN>;
clock-names = "pclk";
@@ -664,7 +682,7 @@
};
peri3_padctrl: peri3-padctrl@00542000 {
compatible = "zhihe,p100-group3-pinctrl";
compatible = "zhihe,a210-group3-pinctrl";
reg = <0x00 0x00542000 0x0 0x1000>;
clocks = <&clk_peri PERI3_PAD_CTRL_PCLK_EN>;
clock-names = "pclk";
@@ -1105,7 +1123,8 @@
audio_i2s_8ch_sd0: audio_i2s_8ch_sd0@000840c000 {
compatible = "zhihe,i2s3-8ch-sd0";
reg = <0x0 0x0840c000 0x0 0x1000>;
reg = <0x0 0x0840c000 0x0 0x1000>,
<0x0 0x00240000 0x0 0x4>;
interrupt-parent = <&intc>;
interrupts = <304>;
clocks = <&clk_peri PERI2_I2S3_SRC_CLK_EN>, <&clk_peri PERI2_I2S3_PCLK_EN>;
@@ -1116,6 +1135,17 @@
dma-names = "tx", "rx";
snd-soc-zhihe-a210;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
/* i2s transmit to hdmi */
port@0 {
reg = <0>;
hdmi_i2s_tx: endpoint {
remote-endpoint = <&hdmi_i2s_rx>;
};
};
};
};
audio_i2s_8ch_sd1: audio_i2s_8ch_sd1@000840c000 {

17
arch/riscv/configs/a210_evb_defconfig
View File

@@ -11,9 +11,15 @@ CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_NUMA_BALANCING=y
CONFIG_CGROUPS=y
CONFIG_MEMCG=y
CONFIG_CGROUP_SCHED=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CGROUP_HUGETLB=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_BPF=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
@@ -23,11 +29,11 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_LZMA is not set
# CONFIG_RD_XZ is not set
# CONFIG_INITRAMFS_PRESERVE_MTIME is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_EXPERT=y
# CONFIG_BUG is not set
CONFIG_KALLSYMS_ALL=y
CONFIG_PERF_EVENTS=y
CONFIG_CRASH_DUMP=y
CONFIG_ARCH_ZHIHE=y
CONFIG_XUANTIE_SSTC=y
CONFIG_ERRATA_THEAD=y
@@ -57,6 +63,9 @@ CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_NETFILTER=y
CONFIG_BRIDGE_NETFILTER=y
CONFIG_BRIDGE=y
CONFIG_DNS_RESOLVER=y
CONFIG_CAN=m
CONFIG_CAN_J1939=m
@@ -89,7 +98,11 @@ CONFIG_BLK_DEV_MD=m
CONFIG_MD_RAID0=m
CONFIG_MD_RAID1=m
CONFIG_MD_RAID456=m
CONFIG_BLK_DEV_DM=y
CONFIG_NETDEVICES=y
CONFIG_MACVLAN=y
CONFIG_IPVLAN=y
CONFIG_VETH=y
# CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set
# CONFIG_NET_VENDOR_AQUANTIA is not set
@@ -229,6 +242,7 @@ CONFIG_MMC_SDHCI_OF_DWCMSHC=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_PCF8563=m
CONFIG_RTC_DRV_XGENE=y
CONFIG_DMADEVICES=y
CONFIG_DW_AXI_DMAC=y
@@ -253,6 +267,7 @@ CONFIG_ZH_IOPMP=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXPORTFS_BLOCK_OPS=y
CONFIG_QUOTA=y
CONFIG_AUTOFS_FS=y
CONFIG_OVERLAY_FS=y
CONFIG_VFAT_FS=m

2
drivers/clk/zhihe/clk-a210.c
View File

@@ -892,7 +892,7 @@ static int p100_clocks_probe(struct platform_device *pdev)
goto unregister_clks;
}
dev_err(dev, "succeed to register p100 %s driver\n", priv->name);
dev_info(dev, "succeed to register p100 %s driver\n", priv->name);
return 0;

1
drivers/gpu/drm/verisilicon/dw_dp.c
View File

@@ -3480,7 +3480,6 @@ static bool dw_dp_detect_dpcd(struct dw_dp *dp)
#endif
ret = drm_dp_dpcd_readb(&dp->aux, DP_DPCD_REV, &value);
if (ret < 0) {
dev_err(dp->dev, "aux failed to read dpcd: %d\n", ret);
goto fail_probe;
}

12
drivers/gpu/drm/verisilicon/dw_hdmi_tx_phy_gen2.h
View File

@@ -500,8 +500,8 @@ static const struct dw_hdmi_mpll_gen_config mpll_configs[] = {
.divider = { .prep_div = 0x0, .mpll_cko_div = 0x0, .ref_cntrl = 0x0,
.mpll_n_cntrl = 0x1, .vco_cntrl = 0x1, .mpll_multiplier = 0xa, },
.charge_pump = { .gmp_cntrl = 0x2, .prop_cntrl = 0x2, .int_cntrl = 0x0, },
.voltage = { .txterm = TXTERM_OPEN_CIRCUIT, .sup_txlvl = 0xd, .tx_traon = 0x0,
.tx_trbon = 0x0, .tx_symon = 0x8, .ck_symon = 0x8, },
.voltage = { .txterm = TXTERM_OPEN_CIRCUIT, .sup_txlvl = 0xc, .tx_traon = 0x0,
.tx_trbon = 0x1, .tx_symon = 0x8, .ck_symon = 0x8, },
}, {
.pixelclock = 154000,
.colordepth = 8,
@@ -554,8 +554,8 @@ static const struct dw_hdmi_mpll_gen_config mpll_configs[] = {
.divider = { .prep_div = 0x0, .mpll_cko_div = 0x0, .ref_cntrl = 0x0,
.mpll_n_cntrl = 0x0, .vco_cntrl = 0x1, .mpll_multiplier = 0x5, },
.charge_pump = { .gmp_cntrl = 0x3, .prop_cntrl = 0x1, .int_cntrl = 0x1, },
.voltage = { .txterm = TXTERM_133_33_OHM, .sup_txlvl = 0x10, .tx_traon = 0x0,
.tx_trbon = 0x1, .tx_symon = 0xd, .ck_symon = 0xc, },
.voltage = { .txterm = TXTERM_66_67_OHM, .sup_txlvl = 0xc, .tx_traon = 0x1,
.tx_trbon = 0x0, .tx_symon = 0xc, .ck_symon = 0x8, },
}, {
.pixelclock = 371250,
.colordepth = 8,
@@ -581,8 +581,8 @@ static const struct dw_hdmi_mpll_gen_config mpll_configs[] = {
.divider = { .prep_div = 0x0, .mpll_cko_div = 0x3, .ref_cntrl = 0x0,
.mpll_n_cntrl = 0x0, .vco_cntrl = 0x0, .mpll_multiplier = 0x5, },
.charge_pump = { .gmp_cntrl = 0x3, .prop_cntrl = 0x2, .int_cntrl = 0x0, },
.voltage = { .txterm = TXTERM_200_OHM, .sup_txlvl = 0x11, .tx_traon = 0x0,
.tx_trbon = 0x0, .tx_symon = 0xf, .ck_symon = 0xa, },
.voltage = { .txterm = TXTERM_66_67_OHM, .sup_txlvl = 0xc, .tx_traon = 0x1,
.tx_trbon = 0x1, .tx_symon = 0xf, .ck_symon = 0x3, },
},
};

8
drivers/mmc/host/sdhci-of-dwcmshc.c
View File

@@ -945,7 +945,7 @@ static const struct sdhci_pltfm_data sdhci_dwcmshc_th1520_pdata = {
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
};
static const struct sdhci_pltfm_data sdhci_dwcmshc_p100_pdata = {
static const struct sdhci_pltfm_data sdhci_dwcmshc_a210_pdata = {
.ops = &sdhci_dwcmshc_th1520_ops,
.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
SDHCI_QUIRK_SINGLE_POWER_WRITE | SDHCI_QUIRK_BROKEN_ADMA,
@@ -1025,8 +1025,8 @@ static const struct of_device_id sdhci_dwcmshc_dt_ids[] = {
.data = &sdhci_dwcmshc_th1520_pdata,
},
{
.compatible = "zhihe,p100-dwcmshc",
.data = &sdhci_dwcmshc_p100_pdata,
.compatible = "zhihe,a210-dwcmshc",
.data = &sdhci_dwcmshc_a210_pdata,
},
{},
};
@@ -1176,7 +1176,7 @@ static int dwcmshc_probe(struct platform_device *pdev)
goto err_clk;
}
if (pltfm_data == &sdhci_dwcmshc_th1520_pdata || pltfm_data == &sdhci_dwcmshc_p100_pdata) {
if (pltfm_data == &sdhci_dwcmshc_th1520_pdata || pltfm_data == &sdhci_dwcmshc_a210_pdata) {
priv->delay_line = PHY_SDCLKDL_DC_DEFAULT;
if ((device_property_read_bool(dev, "mmc-ddr-1_8v")) |

1108
drivers/pinctrl/pinctrl-a210.c
View File

File diff suppressed because it is too large Load Diff

7
drivers/usb/dwc3/dwc3-zhihe.c
View File

@@ -56,6 +56,7 @@ static int dwc3_zhihe_probe(struct platform_device *pdev)
struct device_node *np = dev->of_node;
struct dwc3_zhihe *zhihe;
struct device_node *dwc3_np;
struct resource dwc3_res;
int ret;
if (!np) {
@@ -135,7 +136,7 @@ static int dwc3_zhihe_probe(struct platform_device *pdev)
dev_err(dev, "No DWC3 subnode found\n");
return -ENODEV;
}
ret = of_address_to_resource(dwc3_np, 0, res);
ret = of_address_to_resource(dwc3_np, 0, &dwc3_res);
if (ret) {
dev_err(dev, "failed to get subnode's resource\n");
of_node_put(dwc3_np);
@@ -145,7 +146,7 @@ static int dwc3_zhihe_probe(struct platform_device *pdev)
of_node_put(dwc3_np);
dwc3_np = NULL;
zhihe->dwc3_ctrl = devm_ioremap(dev, res->start, resource_size(res));
zhihe->dwc3_ctrl = devm_ioremap(dev, dwc3_res.start, resource_size(&dwc3_res));
if (IS_ERR(zhihe->dwc3_ctrl)) {
dev_err(dev, "dwc3_ctrl has ERROR\n");
return PTR_ERR(zhihe->dwc3_ctrl);
@@ -153,7 +154,7 @@ static int dwc3_zhihe_probe(struct platform_device *pdev)
/* Update TX deemphasis parameters used in compliance mode, pattern 14 */
writel(0x10540, zhihe->dwc3_ctrl + DWC3_LCSR_TX_DEEMPH_2);
devm_release_region(dev, res->start, resource_size(res));
devm_release_region(dev, dwc3_res.start, resource_size(&dwc3_res));
clk_disable(zhihe->ref_clk);
clk_disable(zhihe->slv_aclk);

19
drivers/watchdog/a210_wdt.c
View File

@@ -82,12 +82,11 @@ static int a210_wdt_is_running(struct a210_wdt_device *wdt_dev)
struct a210_aon_ipc *ipc = wdt_dev->ipc_handle;
struct a210_aon_msg_wdg_ctrl_ack ack_msg= {0};
int ret;
a210_wdt_msg_hdr_fill(&wdt_dev->msg.hdr, A210_AON_WDG_FUNC_GET_STATE);
wdt_dev->msg.running_state = -1;
ret = a210_aon_call_rpc(ipc, &wdt_dev->msg, &ack_msg, true);
printk("a210_wdt_is_running ret %d",ret);
if (ret)
return ret;
@@ -96,8 +95,6 @@ static int a210_wdt_is_running(struct a210_wdt_device *wdt_dev)
pr_debug("ret = %d, timeout = %d, running_state = %d\n", ret, wdt_dev->msg.timeout,
wdt_dev->msg.running_state);
printk("ret = %d, timeout = %d, running_state = %d\n", ret, wdt_dev->msg.timeout,
wdt_dev->msg.running_state);
return wdt_dev->msg.running_state;
}
@@ -206,12 +203,10 @@ static int a210_wdt_restart(struct watchdog_device *wdd, unsigned long action, v
a210_wdt_msg_hdr_fill(&wdt_dev->msg.hdr, A210_AON_WDG_FUNC_RESTART);
pr_debug("[%s,%d]: Inform aon to restart the whole system....\n", __func__, __LINE__);
printk("a210_wdt_restart msg 0x%x\n",wdt_dev->msg.hdr);
ret = a210_aon_call_rpc(ipc, &wdt_dev->msg, NULL, false);
if (ret)
return ret;
pr_debug("[%s,%d]: Finish to inform aon to restart the whole system....\n", __func__, __LINE__);
printk("Finish to inform aon to restart the whole system....\n");
return 0;
}
@@ -301,7 +296,6 @@ static int a210_wdt_probe(struct platform_device *pdev)
int ret;
struct watchdog_device *wdd;
printk("a210_wdt_probe\n");
msleep(1000);
wdt_dev = devm_kzalloc(dev, sizeof(*wdt_dev), GFP_KERNEL);
if (!wdt_dev)
@@ -309,11 +303,8 @@ static int a210_wdt_probe(struct platform_device *pdev)
wdt_dev->is_aon_wdt_ena = 0;
ret = a210_aon_get_handle(&(wdt_dev->ipc_handle),"aon0");
printk("a210_wdt_probe wdt_dev->ipc_handle 0x%x",wdt_dev->ipc_handle);
printk("a210_wdt_probe ret %d",ret);
if (ret == -EPROBE_DEFER)
return ret;
printk("a210_wdt_probe get_handleOK %d",ret);
wdd = devm_kzalloc(dev, sizeof(*wdd), GFP_KERNEL);
if (!wdd)
return -ENOMEM;
@@ -336,7 +327,6 @@ static int a210_wdt_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, wdt_dev);
ret = a210_wdt_is_running(wdt_dev);
if (ret < 0) {
printk("a210_wdt_probe failed to get pmic wdt running state\n");
pr_err("failed to get pmic wdt running state\n");
return ret;
}
@@ -350,9 +340,6 @@ static int a210_wdt_probe(struct platform_device *pdev)
if (ret)
return ret;
printk("[%s,%d] register power off callback\n", __func__, __LINE__);
pr_info("[%s,%d] register power off callback\n", __func__, __LINE__);
pm_power_off = a210_pm_power_off;
a210_power_off_wdt = wdt_dev;
ret = sysfs_create_group(&pdev->dev.kobj, &dev_attr_aon_sys_wdt_group);
@@ -362,7 +349,6 @@ static int a210_wdt_probe(struct platform_device *pdev)
}
pr_info("succeed to register p100 pmic watchdog\n");
printk("a210_wdt_probe succeed to register p100 pmic watchdog\n");
return 0;
}
@@ -427,7 +413,6 @@ static int __init a210_wdt_init(void)
}
pr_info("Watchdog module: %s loaded\n", DRV_NAME);
printk("Watchdog module: %s loaded\n", DRV_NAME);
return 0;
}
device_initcall(a210_wdt_init);

58
sound/soc/zhihe/zhihe-i2s.c
View File

@@ -12,6 +12,7 @@
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/of_graph.h>
#include <linux/pm_runtime.h>
#include <linux/slab.h>
#include <sound/initval.h>
@@ -26,6 +27,22 @@ static int i2s3_probe_flag = 0;
static unsigned int a200_special_sample_rates[] = { 11025, 22050, 44100, 88200 };
static bool is_csr_available(struct device_node *i2s_node, int port_reg, int reg)
{
struct device_node *remote_node;
if (!i2s_node)
return false;
remote_node = of_graph_get_remote_node(i2s_node, port_reg, reg);
if (remote_node) {
of_node_put(remote_node);
return true;
}
return false;
}
static int a200_i2s_set_div(struct zhihe_i2s_priv *i2s_priv, unsigned int rate,
unsigned int ratio)
{
@@ -386,12 +403,10 @@ static int zhihe_hdmi_dai_hw_params(struct snd_pcm_substream *substream,
switch (format) {
case SNDRV_PCM_FORMAT_S16_LE:
fssta |= I2S_DATA_WIDTH_16BIT;
fssta |= FSSTA_SCLK_SEL_32;
fssta |= FSSTA_MCLK_SEL_256;
break;
case SNDRV_PCM_FORMAT_S24_LE:
fssta |= I2S_DATA_WIDTH_24BIT;
fssta |= FSSTA_SCLK_SEL_64;
fssta |= FSSTA_MCLK_SEL_256;
break;
default:
@@ -399,6 +414,9 @@ static int zhihe_hdmi_dai_hw_params(struct snd_pcm_substream *substream,
return -EINVAL;
}
/* HDMI audio interface operates with a SCLK at 64fs. */
fssta |= FSSTA_SCLK_SEL_64;
regmap_update_bits(i2s_priv->regmap, I2S_FSSTA, FSSTA_DATAWTH_Msk |
FSSTA_SCLK_SEL_Msk | FSSTA_MCLK_SEL_Msk, fssta);
@@ -427,6 +445,30 @@ static int zhihe_i2s_dai_probe(struct snd_soc_dai *dai)
return 0;
}
static int zhihe_hdmi_dai_probe(struct snd_soc_dai *dai)
{
struct zhihe_i2s_priv *i2s_priv = snd_soc_dai_get_drvdata(dai);
if (i2s_priv->board == ZHIHE_A210) {
u32 val;
if (!i2s_priv->sys_csr) {
dev_err(i2s_priv->dev,
"sys_csr is null, can't init hdmi dai\n");
return -EINVAL;
}
val = readl(i2s_priv->sys_csr + SYS_CSR_OFFSET);
if (i2s_priv->hdmi_connected)
val |= HDMI_AUDIO_EN;
writel(val, i2s_priv->sys_csr + SYS_CSR_OFFSET);
}
snd_soc_dai_init_dma_data(dai, &i2s_priv->dma_params_tx,
&i2s_priv->dma_params_rx);
return 0;
}
static const struct snd_soc_dai_ops zhihe_i2s_dai_ops = {
.probe = zhihe_i2s_dai_probe,
.trigger = zhihe_i2s_dai_trigger,
@@ -435,7 +477,7 @@ static const struct snd_soc_dai_ops zhihe_i2s_dai_ops = {
};
static const struct snd_soc_dai_ops zhihe_hdmi_dai_ops = {
.probe = zhihe_i2s_dai_probe,
.probe = zhihe_hdmi_dai_probe,
.trigger = zhihe_i2s_dai_trigger,
.set_fmt = zhihe_i2s_set_fmt_dai,
.hw_params = zhihe_hdmi_dai_hw_params,
@@ -909,6 +951,16 @@ static int zhihe_i2s_probe(struct platform_device *pdev)
goto err_suspend;
}
}
/* CSR transmit channel config, only i2s3 on A210 is supported */
if (!strcmp(i2s_priv->drvdata->name, "i2s3-8ch-sd0")) {
i2s_priv->sys_csr = devm_platform_ioremap_resource(pdev, 1);
if (!i2s_priv->sys_csr)
dev_warn(&pdev->dev, "failed to map sys_csr\n");
else
i2s_priv->hdmi_connected =
is_csr_available(np, TRANSFER_PORT_HDMI, -1);
}
}
i2s_priv->dma_params_tx.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;

19
sound/soc/zhihe/zhihe-i2s.h
View File

@@ -107,6 +107,8 @@ enum {
#define I2S_DR2 0x064 /* CH2_Data Register */
#define I2S_DR3 0x068 /* CH3_Data Register */
#define SYS_CSR_OFFSET 0x000 /* System Control and Status Register */
/* IISEN , offset: 0x00 */
#define IISEN_I2SEN_POS (0U)
#define IISEN_I2SEN_MSK (0x1U << IISEN_I2SEN_POS)
@@ -512,10 +514,25 @@ enum {
#define I2S_DATA_WIDTH_32BIT (0xAU << FSSTA_DATAWTH_Pos)
#define I2S_DATA_WIDTH_32BIT_OUPUT (0x8U << FSSTA_DATAWTH_Pos)
/* SYS_CSR, offset: 0x00 */
#define DP_AUDIO_EN_Pos (4U)
#define DP_AUDIO_EN_Msk (0x1U << DP_AUDIO_EN_Pos)
#define DP_AUDIO_EN DP_AUDIO_EN_Msk
#define HDMI_AUDIO_EN_Pos (5U)
#define HDMI_AUDIO_EN_Msk (0x1U << HDMI_AUDIO_EN_Pos)
#define HDMI_AUDIO_EN HDMI_AUDIO_EN_Msk
#define TXFIFO_IRQ_TH (0x8U)
#define RXFIFO_IRQ_TH (0x20U)
#define I2S_MAX_FIFO (0x20U)
typedef enum {
TRANSFER_PORT_HDMI = 0,
TRANSFER_PORT_DP,
TRANSFER_PORT_UNKNOWN,
} transfer_port_t;
struct zhihe_i2s_soc_drvdata {
char name[32];
char i2s_dai_name[32];
@@ -530,6 +547,7 @@ struct zhihe_i2s_priv {
struct device *dev;
struct regmap *regmap;
struct regmap *audio_cpr_regmap;
void __iomem *sys_csr;
struct reset_control *rst;
struct snd_dmaengine_dai_dma_data dma_params_tx;
struct snd_dmaengine_dai_dma_data dma_params_rx;
@@ -538,6 +556,7 @@ struct zhihe_i2s_priv {
int irq;
bool alolrc_high;
bool rx_ch_left;
bool hdmi_connected;
int board;
spinlock_t zhihe_i2s_lock;