pcie: Adapt PCIe address space for AMD GPU on K1-X
1. In the Device Tree, merge the PCIe I/O and memory address windows.The AMD GPU requires a large, contiguous BAR space, which the previous separate windows could not satisfy. 2. Add a hack to correct the BAR space size calculation. The K1-X platform reserves a total of 384MB (0x18000000) for PCIe devices (including BAR and config space). However, the Linux kernel's allocation logic, influenced by 128MB alignment, attempts to request a full 384MB BAR space for the GPU.This commit reduces the requested size to 0x16000000, ensuring the allocation succeeds, as the GPU itself only requires 258MB. Signed-off-by: liyeshan <yeshan.li@spacemit.com> Change-Id: Ic5610b455aac5b0dc97ac4904037865f83ad1c2c
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@@ -2372,8 +2372,7 @@
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0xb7002000 0 0xb7002000 0x0 0x100000>,
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<0x42000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000>,
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<0x02000000 0x0 0xb0000000 0 0xb0000000 0x0 0x7000000>;
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<0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x17000000>;
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interconnects = <&dram_range7>;
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interconnect-names = "dma-mem";
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@@ -1067,6 +1067,10 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
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min_align = calculate_mem_align(aligns, max_order);
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min_align = max(min_align, window_alignment(bus, b_res->flags));
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size0 = calculate_memsize(size, min_size, 0, 0, resource_size(b_res), min_align);
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#ifdef CONFIG_SOC_SPACEMIT_K1X
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if (size0 == 0x18000000U)
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size0 = 0x16000000U;
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#endif
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add_align = max(min_align, add_align);
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size1 = (!realloc_head || (realloc_head && !add_size && !children_add_size)) ? size0 :
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calculate_memsize(size, min_size, add_size, children_add_size,
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