dts: add k1-x_som dts
Change-Id: I1a5288a14f90b51010f49f852009268803b282d0 Signed-off-by: lijuan <juan.li@spacemit.com>
This commit is contained in:
@@ -9,5 +9,5 @@ dtb-$(CONFIG_SOC_SPACEMIT_K1X) += k1-x_fpga.dtb k1-x_fpga_1x4.dtb k1-x_fpga_2x2.
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k1-x_baton-camera.dtb k1-x_FusionOne.dtb k1-x_InnoBoard-Pi.dtb \
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k1-x_ZT001H.dtb k1-x_uav.dtb k1-x_MUSE-Paper2.dtb \
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k1-x_bit-brick.dtb k1-x_LX-V10.dtb k1-x_NetBridge-C1.dtb \
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k1-x_MUSE-Pi-Pro.dtb
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k1-x_MUSE-Pi-Pro.dtb k1-x_som.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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701
arch/riscv/boot/dts/spacemit/k1-x_som.dts
Executable file
701
arch/riscv/boot/dts/spacemit/k1-x_som.dts
Executable file
@@ -0,0 +1,701 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/* Copyright (c) 2023 Spacemit, Inc */
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/dts-v1/;
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#include "k1-x.dtsi"
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#include "k1-x-efuse.dtsi"
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#include "k1-x_pinctrl.dtsi"
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#include "k1-x_opp_table.dtsi"
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#include "k1-x_thermal_cooling.dtsi"
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/ {
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model = "spacemit k1-x som board";
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cpus: cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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timebase-frequency = <24000000>;
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cpu_0: cpu@0 {
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cpu-ai = "true";
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};
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cpu_1: cpu@1 {
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cpu-ai = "true";
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};
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cpu_2: cpu@2 {
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reg = <2>;
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cpu-ai = "true";
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};
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cpu_3: cpu@3 {
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reg = <3>;
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cpu-ai = "true";
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};
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&cpu_0>;
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};
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core1 {
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cpu = <&cpu_1>;
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};
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core2 {
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cpu = <&cpu_2>;
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};
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core3 {
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cpu = <&cpu_3>;
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};
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};
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cluster1 {
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core0 {
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cpu = <&cpu_4>;
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};
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core1 {
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cpu = <&cpu_5>;
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};
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core2 {
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cpu = <&cpu_6>;
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};
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core3 {
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cpu = <&cpu_7>;
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};
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};
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};
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x00000000 0x0 0x80000000>;
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};
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memory@100000000 {
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device_type = "memory";
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reg = <0x1 0x00000000 0x0 0x80000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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linux,cma {
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compatible = "shared-dma-pool";
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/* alloc memory from 0x40000000~0x70000000 */
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alloc-ranges = <0 0x40000000 0 0x30000000>;
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/* size of cma buffer is 384MByte */
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size = <0 0x18000000>;
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/* start address is 1Mbyte aligned */
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alignment = <0x0 0x100000>;
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linux,cma-default;
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/* besides hardware, dma for ex. buffer can be used by memory management */
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reusable;
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};
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/* reserved 384K for dpu, including mmu table(256K) and cmdlist(128K) */
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dpu_resv: dpu_reserved@2ff40000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0x2ff40000 0x0 0x000C0000>;
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no-map;
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};
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};
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chosen {
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bootargs = "earlycon=sbi console=ttyS0,115200n8 loglevel=8 swiotlb=65536 rdinit=/init";
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stdout-path = "serial0:115200n8";
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};
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dc_12v: dc-12v {
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compatible = "regulator-fixed";
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regulator-name = "dc_12v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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vcc4v0_baseboard: vcc4v0-baseboard {
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compatible = "regulator-fixed";
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regulator-name = "vcc4v0_baseboard";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <4000000>;
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regulator-max-microvolt = <4000000>;
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vin-supply = <&dc_12v>;
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};
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leds {
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compatible = "gpio-leds";
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led1 {
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label = "sys-led";
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gpios = <&gpio 96 0>;
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linux,default-trigger = "heartbeat";
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default-state = "on";
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status = "okay";
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};
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0_2>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0>;
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spacemit,i2c-fast-mode;
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status = "okay";
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2_0>;
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spacemit,i2c-fast-mode;
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status = "okay";
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eeprom@50{
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compatible = "atmel,24c02";
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reg = <0x50>;
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#address-cells = <1>;
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#size-cells = <1>;
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power-domains = <&power K1X_PMU_DUMMY_PWR_DOMAIN>;
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status = "disabled";
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mac_address0: mac_address0@0 {
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reg = <0x0 6>;
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};
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mac_address1: mac_address1@6 {
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reg = <0x6 6>;
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};
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};
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};
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&i2c8 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c8>;
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status = "okay";
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spm8821@41 {
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compatible = "spacemit,spm8821";
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reg = <0x41>;
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interrupt-parent = <&intc>;
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interrupts = <64>;
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status = "okay";
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vcc_sys-supply = <&vcc4v0_baseboard>;
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dcdc5-supply = <&dcdc_5>;
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regulators {
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compatible = "pmic,regulator,spm8821";
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/* buck */
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dcdc_1: DCDC_REG1 {
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regulator-name = "dcdc1";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3450000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <650000>;
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};
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};
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dcdc_2: DCDC_REG2 {
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regulator-name = "dcdc2";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3450000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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};
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dcdc_3: DCDC_REG3 {
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regulator-name = "dcdc3";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1800000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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};
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dcdc_4: DCDC_REG4 {
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regulator-name = "dcdc4";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3300000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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dcdc_5: DCDC_REG5 {
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regulator-name = "dcdc5";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3450000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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};
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dcdc_6: DCDC_REG6 {
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regulator-name = "dcdc6";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3450000>;
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regulator-ramp-delay = <5000>;
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regulator-always-on;
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};
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/* aldo */
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ldo_1: LDO_REG1 {
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regulator-name = "ldo1";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_2: LDO_REG2 {
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regulator-name = "ldo2";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_3: LDO_REG3 {
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regulator-name = "ldo3";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_4: LDO_REG4 {
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regulator-name = "ldo4";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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/* dldo */
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ldo_5: LDO_REG5 {
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regulator-name = "ldo5";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_6: LDO_REG6 {
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regulator-name = "ldo6";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_7: LDO_REG7 {
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regulator-name = "ldo7";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <500000>;
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};
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};
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ldo_8: LDO_REG8 {
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regulator-name = "ldo8";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-always-on;
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};
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ldo_9: LDO_REG9 {
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regulator-name = "ldo9";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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};
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ldo_10: LDO_REG10 {
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regulator-name = "ldo10";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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regulator-always-on;
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};
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ldo_11: LDO_REG11 {
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regulator-name = "ldo11";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <3400000>;
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};
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sw_1: SWITCH_REG1 {
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regulator-name = "switch1";
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};
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};
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pmic_pinctrl: pinctrl {
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compatible = "pmic,pinctrl,spm8821";
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gpio-controller;
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#gpio-cells = <2>;
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spacemit,npins = <6>;
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/**
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* led_pins: led-pins {
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* pins = "PIN3";
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* function = "sleep";
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* bias-disable = <0>;
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* drive-open-drain = <0x1>;
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||||
* };
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||||
*/
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||||
};
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||||
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||||
pwr_key: key {
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compatible = "pmic,pwrkey,spm8821";
|
||||
};
|
||||
|
||||
ext_rtc: rtc {
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||||
compatible = "pmic,rtc,spm8821";
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||||
};
|
||||
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||||
ext_adc: adc {
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||||
compatible = "pmic,adc,spm8821";
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||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-single,gpio-range = <
|
||||
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
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||||
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_67 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
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||||
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
|
||||
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range DVL0 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range DVL1 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
|
||||
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_111 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_113 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_115 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
&range GPIO_116 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_118 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
|
||||
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
|
||||
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
|
||||
>;
|
||||
|
||||
pinctrl_rcpu: pinctrl_rcpu_grp {
|
||||
pinctrl-single,pins = <
|
||||
K1X_PADCONF(GPIO_47, MUX_MODE1, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /* r_uart0_tx */
|
||||
K1X_PADCONF(GPIO_48, MUX_MODE1, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /* r_uart0_rx */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gmac0: gmac0_grp {
|
||||
pinctrl-single,pins =<
|
||||
K1X_PADCONF(GPIO_00, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rxdv */
|
||||
K1X_PADCONF(GPIO_01, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d0 */
|
||||
K1X_PADCONF(GPIO_02, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d1 */
|
||||
K1X_PADCONF(GPIO_03, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_clk */
|
||||
K1X_PADCONF(GPIO_04, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d2 */
|
||||
K1X_PADCONF(GPIO_05, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d3 */
|
||||
K1X_PADCONF(GPIO_06, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d0 */
|
||||
K1X_PADCONF(GPIO_07, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d1 */
|
||||
K1X_PADCONF(GPIO_08, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx */
|
||||
K1X_PADCONF(GPIO_09, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d2 */
|
||||
K1X_PADCONF(GPIO_10, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d3 */
|
||||
K1X_PADCONF(GPIO_11, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_en */
|
||||
K1X_PADCONF(GPIO_12, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac0_mdc */
|
||||
K1X_PADCONF(GPIO_13, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac0_mdio */
|
||||
K1X_PADCONF(GPIO_14, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_int_n */
|
||||
K1X_PADCONF(GPIO_45, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_clk_ref */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio{
|
||||
gpio-ranges = <
|
||||
&pinctrl 49 GPIO_49 2
|
||||
&pinctrl 58 GPIO_58 1
|
||||
&pinctrl 63 GPIO_63 3
|
||||
&pinctrl 67 GPIO_67 1
|
||||
&pinctrl 70 PRI_TDI 4
|
||||
&pinctrl 74 GPIO_74 1
|
||||
&pinctrl 80 GPIO_80 4
|
||||
&pinctrl 90 GPIO_90 3
|
||||
&pinctrl 96 DVL0 2
|
||||
&pinctrl 110 GPIO_110 1
|
||||
&pinctrl 111 GPIO_111 1
|
||||
&pinctrl 113 GPIO_113 1
|
||||
&pinctrl 114 GPIO_114 3
|
||||
&pinctrl 118 GPIO_118 1
|
||||
&pinctrl 123 GPIO_123 5
|
||||
>;
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&sdhci2 {
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
mmc-hs400-1_8v;
|
||||
mmc-hs400-enhanced-strobe;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
spacemit,sdh-quirks = <(
|
||||
SDHCI_QUIRK_BROKEN_CARD_DETECTION |
|
||||
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
|
||||
)>;
|
||||
spacemit,sdh-quirks2 = <(
|
||||
SDHCI_QUIRK2_PRESET_VALUE_BROKEN
|
||||
)>;
|
||||
spacemit,sdh-freq = <375000000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&udc {
|
||||
/*spacemit,udc-mode = <MV_USB_MODE_OTG>;*/
|
||||
spacemit,udc-mode = <MV_USB_MODE_UDC>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci {
|
||||
spacemit,reset-on-resume;
|
||||
spacemit,udc-mode = <MV_USB_MODE_OTG>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&otg {
|
||||
usb-role-switch;
|
||||
role-switch-user-control;
|
||||
spacemit,reset-on-resume;
|
||||
role-switch-default-mode = "peripheral";
|
||||
vbus-gpios = <&gpio 123 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usbphy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&udc1 {
|
||||
/*spacemit,udc-mode = <MV_USB_MODE_UDC>;*/
|
||||
spacemit,udc-mode = <MV_USB_MODE_OTG>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
/*spacemit,udc-mode = <MV_USB_MODE_OTG>;*/
|
||||
spacemit,reset-on-resume;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&otg1 {
|
||||
usb-role-switch;
|
||||
role-switch-user-control;
|
||||
spacemit,reset-on-resume;
|
||||
role-switch-default-mode = "host";
|
||||
vbus-gpios = <&gpio 123 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&combphy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3hub {
|
||||
hub-gpios = <
|
||||
&gpio 123 0 /* usb3 hub en */
|
||||
&gpio 124 0>; /* usb3 hub rst*/
|
||||
vbus-gpios = <&gpio 97 0>; /* gpio_97 for usb3 hub output vbus */
|
||||
vbus_delay_ms = <200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd3 {
|
||||
status = "okay";
|
||||
reset-on-resume;
|
||||
dwc3@c0a00000 {
|
||||
dr_mode = "host";
|
||||
phy_type = "utmi";
|
||||
snps,hsphy_interface = "utmi";
|
||||
snps,dis_enblslpm_quirk;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,dis_u3_susphy_quirk;
|
||||
snps,dis-del-phy-power-chg-quirk;
|
||||
snps,dis-tx-ipgap-linecheck-quirk;
|
||||
snps,parkmode-disable-ss-quirk;
|
||||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gmac0>;
|
||||
|
||||
emac,reset-gpio = <&gpio 110 0>;
|
||||
emac,reset-active-low;
|
||||
emac,reset-delays-us = <0 10000 100000>;
|
||||
|
||||
/* store forward mode */
|
||||
tx-threshold = <1518>;
|
||||
rx-threshold = <12>;
|
||||
tx-ring-num = <1024>;
|
||||
rx-ring-num = <1024>;
|
||||
dma-burst-len = <5>;
|
||||
|
||||
ref-clock-from-phy;
|
||||
|
||||
clk-tuning-enable;
|
||||
clk-tuning-by-delayline;
|
||||
tx-phase = <60>;
|
||||
rx-phase = <73>;
|
||||
|
||||
nvmem-cells = <&mac_address0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
phy-handle = <&rgmii0>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
mdio-bus {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
rgmii0: phy@0 {
|
||||
compatible = "ethernet-phy-id001c.c916";
|
||||
device_type = "ethernet-phy";
|
||||
reg = <0x1>;
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&imggpu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qspi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_qspi>;
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <26500000>;
|
||||
m25p,fast-read;
|
||||
broken-flash-reset;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&rcpu {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_rcpu>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&thermal {
|
||||
sensor_range = <0x1 0x4>;
|
||||
};
|
||||
|
||||
&thermal_zones {
|
||||
top_thermal {
|
||||
polling-delay = <0>;
|
||||
polling-delay-passive = <0>;
|
||||
thermal-sensors = <&thermal 1>;
|
||||
|
||||
trips {
|
||||
top_trip0: top-trip0 {
|
||||
temperature = <40000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
top_trip1: top-trip1 {
|
||||
temperature = <55000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
top_trip2: top-trip2 {
|
||||
temperature = <70000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
top_trip3: top-trip3 {
|
||||
temperature = <85000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpu_thermal {
|
||||
polling-delay = <0>;
|
||||
polling-delay-passive = <0>;
|
||||
thermal-sensors = <&thermal 2>;
|
||||
|
||||
/* Just a placeholder */
|
||||
trips {
|
||||
gpu_trip0: gpu-trip0 {
|
||||
temperature = <40000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user