8368247: RISC-V: enable vectorapi test for expand operation

.github/workflows/main.yml

@@ -327,8 +327,8 @@ jobs:
     uses: ./.github/workflows/build-macos.yml
     with:
       platform: macos-x64
-      runs-on: 'macos-15-intel'
-      xcode-toolset-version: '16.4'
+      runs-on: 'macos-13'
+      xcode-toolset-version: '14.3.1'
       configure-arguments: ${{ github.event.inputs.configure-arguments }}
       make-arguments: ${{ github.event.inputs.make-arguments }}
       dry-run: ${{ needs.prepare.outputs.dry-run == 'true' }}
@@ -340,8 +340,8 @@ jobs:
     uses: ./.github/workflows/build-macos.yml
     with:
       platform: macos-aarch64
-      runs-on: 'macos-15'
-      xcode-toolset-version: '16.4'
+      runs-on: 'macos-14'
+      xcode-toolset-version: '15.4'
       configure-arguments: ${{ github.event.inputs.configure-arguments }}
       make-arguments: ${{ github.event.inputs.make-arguments }}
       dry-run: ${{ needs.prepare.outputs.dry-run == 'true' }}
@@ -432,9 +432,9 @@ jobs:
     with:
       platform: macos-aarch64
       bootjdk-platform: macos-aarch64
-      runs-on: macos-15
+      runs-on: macos-14
       dry-run: ${{ needs.prepare.outputs.dry-run == 'true' }}
-      xcode-toolset-version: '16.4'
+      xcode-toolset-version: '15.4'
       debug-suffix: -debug
 
   test-windows-x64:

make/Hsdis.gmk

@@ -114,6 +114,7 @@ ifeq ($(HSDIS_BACKEND), binutils)
     TOOLCHAIN_TYPE := gcc
     OPENJDK_TARGET_OS := linux
     OPENJDK_TARGET_OS_TYPE := unix
+    CC_OUT_OPTION := -o$(SPACE)
     GENDEPS_FLAGS := -MMD -MF
     CFLAGS_DEBUG_SYMBOLS := -g
     DISABLED_WARNINGS :=

make/StaticLibs.gmk

@@ -116,9 +116,6 @@ else ifeq ($(call isTargetOs, aix), true)
     $(eval STATIC_LIB_EXPORT_FILES += $(lib).exp) \
   )
   STATIC_LIBS := -Wl,-bexpfull $(STATIC_LIB_FILES) $(addprefix -Wl$(COMMA)-bE:, $(STATIC_LIB_EXPORT_FILES))
-  ifeq ($(DEBUG_LEVEL), slowdebug)
-    STATIC_LIBS += -Wl,-bbigtoc
-  endif
 else
   $(error Unsupported platform)
 endif

make/autoconf/basic_tools.m4

@@ -363,7 +363,7 @@ AC_DEFUN_ONCE([BASIC_SETUP_COMPLEX_TOOLS],
 
   # Check if it's a GNU date compatible version
   AC_MSG_CHECKING([if date is a GNU compatible version])
-  check_date=`$DATE --version 2>&1 | $GREP "GNU\|BusyBox\|uutils"`
+  check_date=`$DATE --version 2>&1 | $GREP "GNU\|BusyBox"`
   if test "x$check_date" != x; then
     AC_MSG_RESULT([yes])
     IS_GNU_DATE=yes

make/autoconf/boot-jdk.m4

@@ -408,6 +408,27 @@ AC_DEFUN_ONCE([BOOTJDK_SETUP_BOOT_JDK],
   AC_MSG_CHECKING([if Boot JDK is 32 or 64 bits])
   AC_MSG_RESULT([$BOOT_JDK_BITS])
 
+  # Try to enable CDS
+  AC_MSG_CHECKING([for local Boot JDK Class Data Sharing (CDS)])
+  BOOT_JDK_CDS_ARCHIVE=$CONFIGURESUPPORT_OUTPUTDIR/classes.jsa
+  UTIL_ADD_JVM_ARG_IF_OK([-XX:+UnlockDiagnosticVMOptions -XX:-VerifySharedSpaces -XX:SharedArchiveFile=$BOOT_JDK_CDS_ARCHIVE],boot_jdk_cds_args,[$JAVA])
+
+  if test "x$boot_jdk_cds_args" != x; then
+    # Try creating a CDS archive
+    $JAVA $boot_jdk_cds_args -Xshare:dump > /dev/null 2>&1
+    if test $? -eq 0; then
+      BOOTJDK_USE_LOCAL_CDS=true
+      AC_MSG_RESULT([yes, created])
+    else
+      # Generation failed, don't use CDS.
+      BOOTJDK_USE_LOCAL_CDS=false
+      AC_MSG_RESULT([no, creation failed])
+    fi
+  else
+    BOOTJDK_USE_LOCAL_CDS=false
+    AC_MSG_RESULT([no, -XX:SharedArchiveFile not supported])
+  fi
+
   BOOTJDK_SETUP_CLASSPATH
 ])
 
@@ -423,8 +444,13 @@ AC_DEFUN_ONCE([BOOTJDK_SETUP_BOOT_JDK_ARGUMENTS],
   # Force en-US environment
   UTIL_ADD_JVM_ARG_IF_OK([-Duser.language=en -Duser.country=US],boot_jdk_jvmargs,[$JAVA])
 
-  UTIL_ADD_JVM_ARG_IF_OK([-Xlog:all=off:stdout],boot_jdk_jvmargs,[$JAVA])
-  UTIL_ADD_JVM_ARG_IF_OK([-Xlog:all=warning:stderr],boot_jdk_jvmargs,[$JAVA])
+  if test "x$BOOTJDK_USE_LOCAL_CDS" = xtrue; then
+    # Use our own CDS archive
+    UTIL_ADD_JVM_ARG_IF_OK([$boot_jdk_cds_args -Xshare:auto],boot_jdk_jvmargs,[$JAVA])
+  else
+    # Otherwise optimistically use the system-wide one, if one is present
+    UTIL_ADD_JVM_ARG_IF_OK([-Xshare:auto],boot_jdk_jvmargs,[$JAVA])
+  fi
 
   # Finally append user provided options to allow them to override.
   UTIL_ADD_JVM_ARG_IF_OK([$USER_BOOT_JDK_OPTIONS],boot_jdk_jvmargs,[$JAVA])
@@ -571,9 +597,10 @@ AC_DEFUN([BOOTJDK_SETUP_BUILD_JDK],
   AC_ARG_WITH(build-jdk, [AS_HELP_STRING([--with-build-jdk],
       [path to JDK of same version as is being built@<:@the newly built JDK@:>@])])
 
-  EXTERNAL_BUILDJDK_PATH=""
+  CREATE_BUILDJDK=false
+  EXTERNAL_BUILDJDK=false
+  BUILD_JDK_FOUND="no"
   if test "x$with_build_jdk" != "x"; then
-    BUILD_JDK_FOUND=no
     BOOTJDK_CHECK_BUILD_JDK([
       if test "x$with_build_jdk" != x; then
         BUILD_JDK=$with_build_jdk
@@ -581,15 +608,40 @@ AC_DEFUN([BOOTJDK_SETUP_BUILD_JDK],
         AC_MSG_NOTICE([Found potential Build JDK using configure arguments])
       fi
     ])
-    if test "x$BUILD_JDK_FOUND" != "xyes"; then
+    EXTERNAL_BUILDJDK=true
+  else
+    if test "x$COMPILE_TYPE" = "xcross"; then
+      BUILD_JDK="\$(BUILDJDK_OUTPUTDIR)/jdk"
+      BUILD_JDK_FOUND=yes
+      CREATE_BUILDJDK=true
       AC_MSG_CHECKING([for Build JDK])
-      AC_MSG_RESULT([no])
-      AC_MSG_ERROR([Could not find a suitable Build JDK])
+      AC_MSG_RESULT([yes, will build it for the host platform])
+    else
+      BUILD_JDK="\$(JDK_OUTPUTDIR)"
+      BUILD_JDK_FOUND=yes
+      AC_MSG_CHECKING([for Build JDK])
+      AC_MSG_RESULT([yes, will use output dir])
     fi
-    EXTERNAL_BUILDJDK_PATH="$BUILD_JDK"
   fi
 
-  AC_SUBST(EXTERNAL_BUILDJDK_PATH)
+  # Since these tools do not yet exist, we cannot use UTIL_FIXUP_EXECUTABLE to
+  # detect the need of fixpath
+  JMOD="$BUILD_JDK/bin/jmod"
+  UTIL_ADD_FIXPATH(JMOD)
+  JLINK="$BUILD_JDK/bin/jlink"
+  UTIL_ADD_FIXPATH(JLINK)
+  AC_SUBST(JMOD)
+  AC_SUBST(JLINK)
+
+  if test "x$BUILD_JDK_FOUND" != "xyes"; then
+    AC_MSG_CHECKING([for Build JDK])
+    AC_MSG_RESULT([no])
+    AC_MSG_ERROR([Could not find a suitable Build JDK])
+  fi
+
+  AC_SUBST(CREATE_BUILDJDK)
+  AC_SUBST(BUILD_JDK)
+  AC_SUBST(EXTERNAL_BUILDJDK)
 ])
 
 # The docs-reference JDK is used to run javadoc for the docs-reference targets.

make/autoconf/bootcycle-spec.gmk.template

@@ -44,3 +44,7 @@ JAVAC_CMD := $(FIXPATH) $(BOOT_JDK)/bin/javac
 JAR_CMD := $(FIXPATH) $(BOOT_JDK)/bin/jar
 # The bootcycle JVM arguments may differ from the original boot jdk.
 JAVA_FLAGS_BIG := @BOOTCYCLE_JVM_ARGS_BIG@
+# Any CDS settings generated for the bootjdk are invalid in the bootcycle build.
+# By filtering out those JVM args, the bootcycle JVM will use its default
+# settings for CDS.
+JAVA_FLAGS := $(filter-out -XX:SharedArchiveFile% -Xshare%, $(JAVA_FLAGS))

make/autoconf/flags-cflags.m4

@@ -37,25 +37,56 @@ AC_DEFUN([FLAGS_SETUP_SHARED_LIBS],
   if test "x$TOOLCHAIN_TYPE" = xgcc; then
     # Default works for linux, might work on other platforms as well.
     SHARED_LIBRARY_FLAGS='-shared'
+    # --disable-new-dtags forces use of RPATH instead of RUNPATH for rpaths.
+    # This protects internal library dependencies within the JDK from being
+    # overridden using LD_LIBRARY_PATH. See JDK-8326891 for more information.
+    SET_EXECUTABLE_ORIGIN='-Wl,-rpath,\$$ORIGIN[$]1 -Wl,--disable-new-dtags'
+    SET_SHARED_LIBRARY_ORIGIN="-Wl,-z,origin $SET_EXECUTABLE_ORIGIN"
+    SET_SHARED_LIBRARY_NAME='-Wl,-soname=[$]1'
 
   elif test "x$TOOLCHAIN_TYPE" = xclang; then
     if test "x$OPENJDK_TARGET_OS" = xmacosx; then
       # Linking is different on MacOSX
       SHARED_LIBRARY_FLAGS="-dynamiclib -compatibility_version 1.0.0 -current_version 1.0.0"
+      SET_EXECUTABLE_ORIGIN='-Wl,-rpath,@loader_path$(or [$]1,/.)'
+      SET_SHARED_LIBRARY_ORIGIN="$SET_EXECUTABLE_ORIGIN"
+      SET_SHARED_LIBRARY_NAME='-Wl,-install_name,@rpath/[$]1'
 
     elif test "x$OPENJDK_TARGET_OS" = xaix; then
       # Linking is different on aix
       SHARED_LIBRARY_FLAGS="-shared -Wl,-bM:SRE -Wl,-bnoentry"
+      SET_EXECUTABLE_ORIGIN=""
+      SET_SHARED_LIBRARY_ORIGIN=''
+      SET_SHARED_LIBRARY_NAME=''
 
     else
       # Default works for linux, might work on other platforms as well.
       SHARED_LIBRARY_FLAGS='-shared'
+      SET_EXECUTABLE_ORIGIN='-Wl,-rpath,\$$ORIGIN[$]1'
+      if test "x$OPENJDK_TARGET_OS" = xlinux; then
+        SET_EXECUTABLE_ORIGIN="$SET_EXECUTABLE_ORIGIN -Wl,--disable-new-dtags"
+      fi
+      SET_SHARED_LIBRARY_NAME='-Wl,-soname=[$]1'
+
+      # arm specific settings
+      if test "x$OPENJDK_TARGET_CPU" = "xarm"; then
+        # '-Wl,-z,origin' isn't used on arm.
+        SET_SHARED_LIBRARY_ORIGIN='-Wl,-rpath,\$$$$ORIGIN[$]1'
+      else
+        SET_SHARED_LIBRARY_ORIGIN="-Wl,-z,origin $SET_EXECUTABLE_ORIGIN"
+      fi
     fi
 
   elif test "x$TOOLCHAIN_TYPE" = xmicrosoft; then
     SHARED_LIBRARY_FLAGS="-dll"
+    SET_EXECUTABLE_ORIGIN=''
+    SET_SHARED_LIBRARY_ORIGIN=''
+    SET_SHARED_LIBRARY_NAME=''
   fi
 
+  AC_SUBST(SET_EXECUTABLE_ORIGIN)
+  AC_SUBST(SET_SHARED_LIBRARY_ORIGIN)
+  AC_SUBST(SET_SHARED_LIBRARY_NAME)
   AC_SUBST(SHARED_LIBRARY_FLAGS)
 ])
 

make/autoconf/flags-ldflags.m4

@@ -79,7 +79,7 @@ AC_DEFUN([FLAGS_SETUP_LDFLAGS_HELPER],
     fi
     if test "x$OPENJDK_TARGET_OS" = xaix; then
       BASIC_LDFLAGS="-Wl,-b64 -Wl,-brtl -Wl,-bnorwexec -Wl,-blibpath:/usr/lib:lib -Wl,-bnoexpall \
-        -Wl,-bernotok -Wl,-bcdtors:mbr::s -Wl,-bdatapsize:64k -Wl,-btextpsize:64k -Wl,-bstackpsize:64k"
+        -Wl,-bernotok -Wl,-bdatapsize:64k -Wl,-btextpsize:64k -Wl,-bstackpsize:64k"
       BASIC_LDFLAGS_JVM_ONLY="$BASIC_LDFLAGS_JVM_ONLY -Wl,-lC_r -Wl,-bbigtoc"
     fi
 
@@ -98,7 +98,7 @@ AC_DEFUN([FLAGS_SETUP_LDFLAGS_HELPER],
 
   # Setup OS-dependent LDFLAGS
   if test "x$OPENJDK_TARGET_OS" = xmacosx && test "x$TOOLCHAIN_TYPE" = xclang; then
-    # FIXME: We should really generalize SetSharedLibraryOrigin instead.
+    # FIXME: We should really generalize SET_SHARED_LIBRARY_ORIGIN instead.
     OS_LDFLAGS_JVM_ONLY="-Wl,-rpath,@loader_path/. -Wl,-rpath,@loader_path/.."
     OS_LDFLAGS="-mmacosx-version-min=$MACOSX_VERSION_MIN -Wl,-reproducible"
   fi

make/autoconf/flags.m4

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2011, 2025, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2011, 2024, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -319,10 +319,16 @@ AC_DEFUN_ONCE([FLAGS_PRE_TOOLCHAIN],
 AC_DEFUN([FLAGS_SETUP_TOOLCHAIN_CONTROL],
 [
   if test "x$TOOLCHAIN_TYPE" = xmicrosoft; then
+    CC_OUT_OPTION=-Fo
     if test "x$OPENJDK_TARGET_CPU" != xaarch64; then
       AS_NON_ASM_EXTENSION_OPTION=-Ta
     fi
+  else
+    # The option used to specify the target .o,.a or .so file.
+    # When compiling, how to specify the to be created object file.
+    CC_OUT_OPTION='-o$(SPACE)'
   fi
+  AC_SUBST(CC_OUT_OPTION)
   AC_SUBST(AS_NON_ASM_EXTENSION_OPTION)
 
   # Generate make dependency files

make/autoconf/jdk-options.m4

@@ -565,14 +565,9 @@ AC_DEFUN_ONCE([JDKOPT_SETUP_UNDEFINED_BEHAVIOR_SANITIZER],
   # with an additional define LLVM_SYMBOLIZER, which we set here.
   # To calculate the correct llvm_symbolizer path we can use the location of the compiler, because
   # their relation is fixed.
-  # In the ubsan case we have to link every binary with the C++-compiler as linker, because inherently
-  # the C-Compiler and the C++-compiler used as linker provide a different set of ubsan exports.
-  # Linking an executable with the C-compiler and one of its shared libraries with the C++-compiler
-  # leeds to unresolved symbols.
   if test "x$TOOLCHAIN_TYPE" = "xclang" && test "x$OPENJDK_TARGET_OS" = "xaix"; then
-    UBSAN_CFLAGS="$UBSAN_CFLAGS -DLLVM_SYMBOLIZER=$(dirname $(dirname $CC))/tools/ibm-llvm-symbolizer"
-    UBSAN_LDFLAGS="$UBSAN_LDFLAGS -Wl,-bbigtoc"
-    LD="$LDCXX"
+      UBSAN_CFLAGS="$UBSAN_CFLAGS -fno-sanitize=function,vptr -DLLVM_SYMBOLIZER=$(dirname $(dirname $CC))/tools/ibm-llvm-symbolizer"
+      UBSAN_LDFLAGS="$UBSAN_LDFLAGS -fno-sanitize=function,vptr -Wl,-bbigtoc"
   fi
   UTIL_ARG_ENABLE(NAME: ubsan, DEFAULT: false, RESULT: UBSAN_ENABLED,
       DESC: [enable UndefinedBehaviorSanitizer],

make/autoconf/lib-tests.m4

@@ -28,7 +28,7 @@
 ################################################################################
 
 # Minimum supported versions
-JTREG_MINIMUM_VERSION=8.1
+JTREG_MINIMUM_VERSION=8
 GTEST_MINIMUM_VERSION=1.14.0
 
 ################################################################################

make/autoconf/libraries.m4

@@ -136,8 +136,12 @@ AC_DEFUN_ONCE([LIB_SETUP_LIBRARIES],
     BASIC_JVM_LIBS="$BASIC_JVM_LIBS $LIBPTHREAD"
   fi
 
-  # librt - for timers (timer_* functions)
+  # librt for legacy clock_gettime
   if test "x$OPENJDK_TARGET_OS" = xlinux; then
+    # Hotspot needs to link librt to get the clock_* functions.
+    # But once our supported minimum build and runtime platform
+    # has glibc 2.17, this can be removed as the functions are
+    # in libc.
     BASIC_JVM_LIBS="$BASIC_JVM_LIBS -lrt"
   fi
 

make/autoconf/spec.gmk.template

@@ -386,22 +386,9 @@ CAPSTONE_ARCH_AARCH64_NAME := @CAPSTONE_ARCH_AARCH64_NAME@
 # it in sync.
 BOOT_JDK := @BOOT_JDK@
 
-EXTERNAL_BUILDJDK_PATH := @EXTERNAL_BUILDJDK_PATH@
-
-ifneq ($(EXTERNAL_BUILDJDK_PATH), )
-  EXTERNAL_BUILDJDK := true
-  CREATE_BUILDJDK := false
-  BUILD_JDK := $(EXTERNAL_BUILDJDK_PATH)
-else
-  EXTERNAL_BUILDJDK := false
-  ifeq ($(COMPILE_TYPE), cross)
-    CREATE_BUILDJDK := true
-    BUILD_JDK := $(BUILDJDK_OUTPUTDIR)/jdk
-  else
-    CREATE_BUILDJDK := false
-    BUILD_JDK := $(JDK_OUTPUTDIR)
-  endif
-endif
+BUILD_JDK := @BUILD_JDK@
+CREATE_BUILDJDK := @CREATE_BUILDJDK@
+EXTERNAL_BUILDJDK := @EXTERNAL_BUILDJDK@
 
 # Whether the boot jdk jar supports --date=TIMESTAMP
 BOOT_JDK_JAR_SUPPORTS_DATE := @BOOT_JDK_JAR_SUPPORTS_DATE@
@@ -504,6 +491,7 @@ CXX_VERSION_NUMBER := @CXX_VERSION_NUMBER@
 # Legacy support
 HOTSPOT_TOOLCHAIN_TYPE := @HOTSPOT_TOOLCHAIN_TYPE@
 
+CC_OUT_OPTION := @CC_OUT_OPTION@
 AS_NON_ASM_EXTENSION_OPTION := @AS_NON_ASM_EXTENSION_OPTION@
 
 # Flags used for overriding the default opt setting for a C/C++ source file.
@@ -636,8 +624,17 @@ ASFLAGS_DEBUG_SYMBOLS := @ASFLAGS_DEBUG_SYMBOLS@
 # Compress (or not) jars
 COMPRESS_JARS := @COMPRESS_JARS@
 
+# Options to linker to specify the library name.
+# (Note absence of := assignment, because we do not want to evaluate the macro body here)
+SET_SHARED_LIBRARY_NAME = @SET_SHARED_LIBRARY_NAME@
+
 SHARED_LIBRARY_FLAGS := @SHARED_LIBRARY_FLAGS@
 
+# Set origin using the linker, ie use the relative path to the dependent library to find the dependencies.
+# (Note absence of := assignment, because we do not want to evaluate the macro body here)
+SET_SHARED_LIBRARY_ORIGIN = @SET_SHARED_LIBRARY_ORIGIN@
+SET_EXECUTABLE_ORIGIN = @SET_EXECUTABLE_ORIGIN@
+
 LIBRARY_PREFIX := @LIBRARY_PREFIX@
 SHARED_LIBRARY_SUFFIX := @SHARED_LIBRARY_SUFFIX@
 STATIC_LIBRARY_SUFFIX := @STATIC_LIBRARY_SUFFIX@
@@ -660,8 +657,8 @@ JAVA_CMD := @JAVA@
 JAVAC_CMD := @JAVAC@
 JAVADOC_CMD := @JAVADOC@
 JAR_CMD := @JAR@
-JLINK_CMD := @FIXPATH@ $(BUILD_JDK)/bin/jlink
-JMOD_CMD := @FIXPATH@ $(BUILD_JDK)/bin/jmod
+JLINK_CMD := @JLINK@
+JMOD_CMD := @JMOD@
 # These variables are meant to be used. They are defined with = instead of := to make
 # it possible to override only the *_CMD variables.
 JAVA = $(JAVA_CMD) $(JAVA_FLAGS_BIG) $(JAVA_FLAGS)

make/common/Execute.gmk

@@ -149,7 +149,7 @@ define SetupExecuteBody
   endif
 
   $1_VARDEPS := $$($1_COMMAND) $$($1_PRE_COMMAND) $$($1_POST_COMMAND)
-  $1_VARDEPS_FILE := $$(call DependOnVariable, $1_VARDEPS, $$($1_BASE)_exec.vardeps)
+  $1_VARDEPS_FILE := $$(call DependOnVariable, $1_VARDEPS)
 
   ifneq ($$($1_PRE_COMMAND), )
 

make/common/JdkNativeCompilation.gmk

@@ -30,47 +30,6 @@ ifeq ($(INCLUDE), true)
 
 include NativeCompilation.gmk
 
-ifeq ($(call isCompiler, gcc), true)
-  # --disable-new-dtags forces use of RPATH instead of RUNPATH for rpaths.
-  # This protects internal library dependencies within the JDK from being
-  # overridden using LD_LIBRARY_PATH. See JDK-8326891 for more information.
-  SetExecutableOrigin = \
-      -Wl,-rpath,\$(DOLLAR)ORIGIN$1 -Wl,--disable-new-dtags
-  SetSharedLibraryOrigin = \
-      -Wl,-z,origin -Wl,-rpath,\$(DOLLAR)ORIGIN$1 -Wl,--disable-new-dtags
-else ifeq ($(call isCompiler, clang), true)
-  ifeq ($(call isTargetOs, macosx), true)
-    SetExecutableOrigin = \
-        -Wl,-rpath,@loader_path$(or $1,/.)
-    SetSharedLibraryOrigin = \
-        -Wl,-rpath,@loader_path$(or $1,/.)
-  else ifeq ($(call isTargetOs, aix), true)
-    SetExecutableOrigin =
-    SetSharedLibraryOrigin =
-  else
-    ifeq ($(call isTargetOs, linux), true)
-      SetExecutableOrigin = \
-          -Wl,-rpath,\$(DOLLAR)ORIGIN$1 -Wl,--disable-new-dtags
-    else
-      SetExecutableOrigin = \
-          -Wl,-rpath,\$(DOLLAR)ORIGIN$1
-    endif
-
-    ifeq ($(call isTargetOs, arm), true)
-      SetSharedLibraryOrigin = \
-          -Wl,-rpath,\$(DOLLAR)ORIGIN$1
-    else
-      SetSharedLibraryOrigin = \
-          -Wl,-z,origin -Wl,-rpath,\$(DOLLAR)ORIGIN$1
-    endif
-  endif
-else ifeq ($(call isCompiler, microsoft), true)
-  SetExecutableOrigin =
-  SetSharedLibraryOrigin =
-else
-  $(error Unknown toolchain)
-endif
-
 FindSrcDirsForComponent += \
   $(call uniq, $(wildcard \
       $(TOPDIR)/src/$(strip $1)/$(OPENJDK_TARGET_OS)/native/$(strip $2) \
@@ -485,9 +444,9 @@ define SetupJdkNativeCompilationBody
 
   ifneq ($$($1_LD_SET_ORIGIN), false)
     ifeq ($$($1_TYPE), EXECUTABLE)
-      $1_LDFLAGS += $$(call SetExecutableOrigin)
+      $1_LDFLAGS += $$(call SET_EXECUTABLE_ORIGIN)
     else
-      $1_LDFLAGS += $$(call SetSharedLibraryOrigin)
+      $1_LDFLAGS += $$(call SET_SHARED_LIBRARY_ORIGIN)
     endif
   endif
   # APPEND_LDFLAGS, if it exists, must be set after the origin flags

make/common/modules/LauncherCommon.gmk

@@ -156,8 +156,8 @@ define SetupBuildLauncherBody
       DISABLED_WARNINGS_gcc := unused-function unused-variable, \
       DISABLED_WARNINGS_clang := unused-function, \
       LDFLAGS := $$($1_LDFLAGS), \
-      LDFLAGS_linux := $$(call SetExecutableOrigin,/../lib), \
-      LDFLAGS_macosx := $$(call SetExecutableOrigin,/../lib), \
+      LDFLAGS_linux := $$(call SET_EXECUTABLE_ORIGIN,/../lib), \
+      LDFLAGS_macosx := $$(call SET_EXECUTABLE_ORIGIN,/../lib), \
       LDFLAGS_FILTER_OUT := $$($1_LDFLAGS_FILTER_OUT), \
       JDK_LIBS := $$($1_JDK_LIBS), \
       JDK_LIBS_windows := $$($1_JDK_LIBS_windows), \

make/common/native/CompileFile.gmk

@@ -93,14 +93,6 @@ DEPENDENCY_TARGET_SED_PATTERN := \
     -e 's/$$$$/ :/' \
     #
 
-################################################################################
-# Setup compiler-specific argument to specify output file
-ifeq ($(call isCompiler, microsoft), true)
-  CC_OUT_OPTION := -Fo
-else
-  CC_OUT_OPTION := -o$(SPACE)
-endif
-
 ################################################################################
 # Create the recipe needed to compile a single native source file.
 #
@@ -342,7 +334,7 @@ define CreateWindowsResourceFile
 		$$(call LogInfo, Compiling resource $$(notdir $$($1_VERSIONINFO_RESOURCE)) (for $$($1_BASENAME)))
 		$$(call MakeDir, $$(@D) $$($1_OBJECT_DIR))
 		$$(call ExecuteWithLog, $$@, $$(call MakeCommandRelative, \
-		    $$($1_RC) $$($1_RCFLAGS) $$($1_SYSROOT_CFLAGS) -Fo$$@ \
+		    $$($1_RC) $$($1_RCFLAGS) $$($1_SYSROOT_CFLAGS) $(CC_OUT_OPTION)$$@ \
 		    $$($1_VERSIONINFO_RESOURCE) 2>&1 ))
                 # Windows RC compiler does not support -showIncludes, so we mis-use CL
                 # for this. Filter out RC specific arguments that are unknown to CL.
@@ -352,7 +344,7 @@ define CreateWindowsResourceFile
 		$$(call ExecuteWithLog, $$($1_RES_DEPS_FILE)$(OBJ_SUFFIX), \
 		    $$($1_CC) $$(filter-out -l%, $$($1_RCFLAGS)) \
 		        $$($1_SYSROOT_CFLAGS) -showIncludes -nologo -TC \
-		        -Fo$$($1_RES_DEPS_FILE)$(OBJ_SUFFIX) -P -Fi$$($1_RES_DEPS_FILE).pp \
+		        $(CC_OUT_OPTION)$$($1_RES_DEPS_FILE)$(OBJ_SUFFIX) -P -Fi$$($1_RES_DEPS_FILE).pp \
 		        $$($1_VERSIONINFO_RESOURCE)) 2>&1 \
 		    | $(TR) -d '\r' | $(GREP) -v -e "^Note: including file:" \
 		        -e "^$$(notdir $$($1_VERSIONINFO_RESOURCE))$$$$" || test "$$$$?" = "1" ; \

make/common/native/Link.gmk

@@ -50,26 +50,6 @@ GetEntitlementsFile = \
       $(if $(wildcard $f), $f, $(DEFAULT_ENTITLEMENTS_FILE)) \
     )
 
-ifeq ($(call isCompiler, gcc), true)
-  SetSharedLibraryName = \
-      -Wl,-soname=$1
-else ifeq ($(call isCompiler, clang), true)
-  ifeq ($(call isTargetOs, macosx), true)
-    SetSharedLibraryName = \
-        -Wl,-install_name,@rpath/$1
-  else ifeq ($(call isTargetOs, aix), true)
-    SetSharedLibraryName =
-  else
-    # Default works for linux, might work on other platforms as well.
-    SetSharedLibraryName = \
-        -Wl,-soname=$1
-  endif
-else ifeq ($(call isCompiler, microsoft), true)
-  SetSharedLibraryName =
-else
-  $(error Unknown toolchain)
-endif
-
 ################################################################################
 define SetupLinking
   # Unless specifically set, stripping should only happen if symbols are also
@@ -151,7 +131,7 @@ define CreateDynamicLibraryOrExecutable
   # A shared dynamic library or an executable binary has been specified
   ifeq ($$($1_TYPE), LIBRARY)
     # Generating a dynamic library.
-    $1_EXTRA_LDFLAGS += $$(call SetSharedLibraryName,$$($1_BASENAME))
+    $1_EXTRA_LDFLAGS += $$(call SET_SHARED_LIBRARY_NAME,$$($1_BASENAME))
   endif
 
   ifeq ($(MACOSX_CODESIGN_MODE), hardened)

make/conf/github-actions.conf

@@ -26,7 +26,7 @@
 # Versions and download locations for dependencies used by GitHub Actions (GHA)
 
 GTEST_VERSION=1.14.0
-JTREG_VERSION=8.1+1
+JTREG_VERSION=8+2
 
 LINUX_X64_BOOT_JDK_EXT=tar.gz
 LINUX_X64_BOOT_JDK_URL=https://download.java.net/java/GA/jdk24/1f9ff9062db4449d8ca828c504ffae90/36/GPL/openjdk-24_linux-x64_bin.tar.gz

make/conf/jib-profiles.js

@@ -1174,9 +1174,9 @@ var getJibProfilesDependencies = function (input, common) {
         jtreg: {
             server: "jpg",
             product: "jtreg",
-            version: "8.1",
-            build_number: "1",
-            file: "bundles/jtreg-8.1+1.zip",
+            version: "8",
+            build_number: "2",
+            file: "bundles/jtreg-8+2.zip",
             environment_name: "JT_HOME",
             environment_path: input.get("jtreg", "home_path") + "/bin",
             configure_args: "--with-jtreg=" + input.get("jtreg", "home_path"),

make/data/charsetmapping/IBM930.c2b

@@ -32,6 +32,11 @@
 547d    92ca
 53da    9b7e
 446e    f86f
+#
+# we should use this one instead of the 4260<-ff0d
+#4260	2212  
+4260	ff0d
+#
 426A	00A6
 43A1	301C
 444A	2014

make/data/charsetmapping/IBM930.map

@@ -25,6 +25,13 @@
 #      4260 <--> 2212
 #      426A <--> 00A6
 #
+#      Warning:
+#      "our old" implementation seems agree with above "new" mappings
+#      except the entries   4260 <-> 2212. To keep the "compatbility"
+#      with the "old" implementation, I changed the entries "temporarily"
+#      4260 <-> 2212
+#      4260 <-  ff0d
+#
 00	0000
 01	0001
 02	0002
@@ -400,7 +407,8 @@ FF	009F
 425D	FF09
 425E	FF1B
 425F	FFE2
-4260	FF0D
+#4260	FF0D
+4260	2212
 4261	FF0F
 426A	FFE4
 426B	FF0C

make/devkit/Makefile

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2013, 2025, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2013, 2024, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -57,61 +57,61 @@
 
 COMMA := ,
 
-OS := $(shell uname -o)
-CPU := $(shell uname -m)
+os := $(shell uname -o)
+cpu := $(shell uname -p)
 
 # Figure out what platform this is building on.
-ME := $(CPU)-$(if $(findstring Linux,$(OS)),linux-gnu)
+me := $(cpu)-$(if $(findstring Linux,$(os)),linux-gnu)
 
-$(info Building on platform $(ME))
+$(info Building on platform $(me))
 
 #
 # By default just build for the current platform, which is assumed to be Linux
 #
 ifeq ($(TARGETS), )
-  PLATFORMS := $(ME)
-  HOST_PLATFORMS := $(PLATFORMS)
+  platforms := $(me)
+  host_platforms := $(platforms)
 else
-  PLATFORMS := $(subst $(COMMA), , $(TARGETS))
-  HOST_PLATFORMS := $(ME)
+  platforms := $(subst $(COMMA), , $(TARGETS))
+  host_platforms := $(me)
 endif
-TARGET_PLATFORMS := $(PLATFORMS)
-$(info HOST_PLATFORMS $(HOST_PLATFORMS))
-$(info TARGET_PLATFORMS $(TARGET_PLATFORMS))
+target_platforms := $(platforms)
+$(info host_platforms $(host_platforms))
+$(info target_platforms $(target_platforms))
 
-all compile : $(PLATFORMS)
+all compile : $(platforms)
 
 ifeq ($(SKIP_ME), )
-  $(foreach p,$(filter-out $(ME),$(PLATFORMS)),$(eval $(p) : $$(ME)))
+  $(foreach p,$(filter-out $(me),$(platforms)),$(eval $(p) : $$(me)))
 endif
 
 OUTPUT_ROOT = $(abspath ../../build/devkit)
 RESULT = $(OUTPUT_ROOT)/result
 
-SUBMAKEVARS = HOST=$@ BUILD=$(ME) RESULT=$(RESULT) OUTPUT_ROOT=$(OUTPUT_ROOT)
+submakevars = HOST=$@ BUILD=$(me) RESULT=$(RESULT) OUTPUT_ROOT=$(OUTPUT_ROOT)
 
-$(HOST_PLATFORMS) :
+$(host_platforms) :
 	@echo 'Building compilers for $@'
-	@echo 'Targets: $(TARGET_PLATFORMS)'
-	for p in $(filter $@, $(TARGET_PLATFORMS)) $(filter-out $@, $(TARGET_PLATFORMS)); do \
-	  $(MAKE) -f Tools.gmk download-rpms $(SUBMAKEVARS) \
+	@echo 'Targets: $(target_platforms)'
+	for p in $(filter $@, $(target_platforms)) $(filter-out $@, $(target_platforms)); do \
+	  $(MAKE) -f Tools.gmk download-rpms $(submakevars) \
               TARGET=$$p PREFIX=$(RESULT)/$@-to-$$p && \
-	  $(MAKE) -f Tools.gmk all $(SUBMAKEVARS) \
+	  $(MAKE) -f Tools.gmk all $(submakevars) \
               TARGET=$$p PREFIX=$(RESULT)/$@-to-$$p && \
-	  $(MAKE) -f Tools.gmk ccache $(SUBMAKEVARS) \
+	  $(MAKE) -f Tools.gmk ccache $(submakevars) \
               TARGET=$@ PREFIX=$(RESULT)/$@-to-$$p || exit 1 ; \
 	done
 	@echo 'All done"'
 
-TODAY := $(shell date +%Y%m%d)
+today := $(shell date +%Y%m%d)
 
 define Mktar
-  $(1)-to-$(2)_tar = $$(RESULT)/sdk-$(1)-to-$(2)-$$(TODAY).tar.gz
+  $(1)-to-$(2)_tar = $$(RESULT)/sdk-$(1)-to-$(2)-$$(today).tar.gz
   $$($(1)-to-$(2)_tar) : PLATFORM = $(1)-to-$(2)
   TARFILES += $$($(1)-to-$(2)_tar)
 endef
 
-$(foreach p,$(HOST_PLATFORMS),$(foreach t,$(TARGET_PLATFORMS),$(eval $(call Mktar,$(p),$(t)))))
+$(foreach p,$(host_platforms),$(foreach t,$(target_platforms),$(eval $(call Mktar,$(p),$(t)))))
 
 tars : all $(TARFILES)
 onlytars : $(TARFILES)
@@ -119,9 +119,9 @@ onlytars : $(TARFILES)
 	$(MAKE) -r -f Tars.gmk SRC_DIR=$(RESULT)/$(PLATFORM) TAR_FILE=$@
 
 clean :
-	rm -rf $(addprefix ../../build/devkit/, result $(HOST_PLATFORMS))
+	rm -rf $(addprefix ../../build/devkit/, result $(host_platforms))
 dist-clean: clean
 	rm -rf $(addprefix ../../build/devkit/, src download)
 
 FORCE :
-.PHONY : all compile tars $(HOST_PLATFORMS) clean dist-clean
+.PHONY : all compile tars $(configs) $(host_platforms) clean dist-clean

make/devkit/Tools.gmk

@@ -39,7 +39,7 @@
 # Fix this...
 #
 
-lowercase = $(shell echo $1 | tr A-Z a-z)
+uppercase = $(shell echo $1 | tr a-z A-Z)
 
 $(info TARGET=$(TARGET))
 $(info HOST=$(HOST))
@@ -104,48 +104,26 @@ endif
 ################################################################################
 # Define external dependencies
 
-GNU_BASE_URL := https://ftp.gnu.org/pub/gnu
-
-BINUTILS_VER_ONLY := 2.43
-BINUTILS_BASE_URL := $(GNU_BASE_URL)/binutils
-BINUTILS_SHA512 := 93e063163e54d6a6ee2bd48dc754270bf757a3635b49a702ed6b310e929e94063958512d191e66beaf44275f7ea60865dbde138b624626739679fcc306b133bb
-
-CCACHE_VER_ONLY := 4.10.2
-CCACHE_BASE_URL := https://github.com/ccache/ccache/releases/download
+gcc_ver_only := 14.2.0
+binutils_ver_only := 2.43
+ccache_ver_only := 4.10.2
 CCACHE_CMAKE_BASED := 1
-CCACHE_SHA512 := 3815c71d7266c32839acb306763268018acc58b3bbbd9ec79fc101e4217c1720d2ad2f01645bf69168c1c61d27700b6f3bb755cfa82689cca69824f015653f3c
+mpfr_ver_only := 4.2.1
+gmp_ver_only := 6.3.0
+mpc_ver_only := 1.3.1
+gdb_ver_only := 15.2
 
-GCC_VER_ONLY := 14.2.0
-GCC_BASE_URL := $(GNU_BASE_URL)/gcc
-GCC_SHA512 := 932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396
+dependencies := gcc binutils ccache mpfr gmp mpc gdb
 
-GDB_VER_ONLY := 15.2
-GDB_BASE_URL := $(GNU_BASE_URL)/gdb
-GDB_SHA512 := 624007deceb5b15ba89c0725883d1a699fa46714ef30887f3d0165e17c5d65d634671740a135aa69e437d916218abb08cfa2a38ed309ff19d48f51da56b2a8ba
+$(foreach dep,$(dependencies),$(eval $(dep)_ver := $(dep)-$($(dep)_ver_only)))
 
-GMP_VER_ONLY := 6.3.0
-GMP_BASE_URL := $(GNU_BASE_URL)/gmp
-GMP_SHA512 := e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2
-
-MPC_VER_ONLY := 1.3.1
-MPC_BASE_URL := $(GNU_BASE_URL)/mpc
-MPC_SHA512 := 4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97
-
-MPFR_VER_ONLY := 4.2.1
-MPFR_BASE_URL := https://www.mpfr.org
-MPFR_SHA512 := bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475
-
-DEPENDENCIES := BINUTILS CCACHE GCC GDB GMP MPC MPFR
-
-$(foreach dep,$(DEPENDENCIES),$(eval $(dep)_VER := $(call lowercase,$(dep)-$($(dep)_VER_ONLY))))
-
-BINUTILS_URL := $(BINUTILS_BASE_URL)/$(BINUTILS_VER).tar.xz
-CCACHE_URL := $(CCACHE_BASE_URL)/v$(CCACHE_VER_ONLY)/$(CCACHE_VER).tar.xz
-GCC_URL := $(GCC_BASE_URL)/$(GCC_VER)/$(GCC_VER).tar.xz
-GDB_URL := $(GDB_BASE_URL)/$(GDB_VER).tar.xz
-GMP_URL := $(GMP_BASE_URL)/$(GMP_VER).tar.xz
-MPC_URL := $(MPC_BASE_URL)/$(MPC_VER).tar.gz
-MPFR_URL := $(MPFR_BASE_URL)/$(MPFR_VER)/$(MPFR_VER).tar.xz
+GCC := http://ftp.gnu.org/pub/gnu/gcc/$(gcc_ver)/$(gcc_ver).tar.xz
+BINUTILS := http://ftp.gnu.org/pub/gnu/binutils/$(binutils_ver).tar.gz
+CCACHE := https://github.com/ccache/ccache/releases/download/v$(ccache_ver_only)/$(ccache_ver).tar.xz
+MPFR := https://www.mpfr.org/$(mpfr_ver)/$(mpfr_ver).tar.bz2
+GMP := http://ftp.gnu.org/pub/gnu/gmp/$(gmp_ver).tar.bz2
+MPC := http://ftp.gnu.org/pub/gnu/mpc/$(mpc_ver).tar.gz
+GDB := http://ftp.gnu.org/gnu/gdb/$(gdb_ver).tar.xz
 
 REQUIRED_MIN_MAKE_MAJOR_VERSION := 4
 ifneq ($(REQUIRED_MIN_MAKE_MAJOR_VERSION),)
@@ -202,10 +180,10 @@ DOWNLOAD_RPMS := $(DOWNLOAD)/rpms/$(TARGET)-$(LINUX_VERSION)
 SRCDIR := $(OUTPUT_ROOT)/src
 
 # Marker file for unpacking rpms
-RPMS := $(SYSROOT)/rpms_unpacked
+rpms := $(SYSROOT)/rpms_unpacked
 
 # Need to patch libs that are linker scripts to use non-absolute paths
-LIBS := $(SYSROOT)/libs_patched
+libs := $(SYSROOT)/libs_patched
 
 ################################################################################
 # Download RPMs
@@ -220,10 +198,10 @@ download-rpms:
 ################################################################################
 # Unpack source packages
 
-# Generate downloading + checksum verification of sources.
-define DownloadVerify
+# Generate downloading + unpacking of sources.
+define Download
   # Allow override
-  $(1)_DIRNAME ?= $(basename $(basename $(notdir $($(1)_URL))))
+  $(1)_DIRNAME ?= $(basename $(basename $(notdir $($(1)))))
   $(1)_DIR = $(abspath $(SRCDIR)/$$($(1)_DIRNAME))
   ifeq ($$($(1)_CMAKE_BASED),)
     $(1)_CFG = $$($(1)_DIR)/configure
@@ -234,7 +212,7 @@ define DownloadVerify
     $(1)_SRC_MARKER = $$($(1)_DIR)/CMakeLists.txt
     $(1)_CONFIG = $$(CMAKE_CONFIG) $$($(1)_DIR)
   endif
-  $(1)_FILE = $(DOWNLOAD)/$(notdir $($(1)_URL))
+  $(1)_FILE = $(DOWNLOAD)/$(notdir $($(1)))
 
   $$($(1)_SRC_MARKER) : $$($(1)_FILE)
 	mkdir -p $$(SRCDIR)
@@ -246,20 +224,11 @@ define DownloadVerify
 	touch $$@
 
   $$($(1)_FILE) :
-	mkdir -p $$(@D)
-	wget -O - $$($(1)_URL) > $$@.tmp
-	sha512_actual="$$$$(sha512sum $$@.tmp | awk '{ print $$$$1; }')"; \
-	if [ x"$$$${sha512_actual}" != x"$$($(1)_SHA512)" ]; then \
-	    echo "Checksum mismatch for $$@.tmp"; \
-	    echo "    Expected: $$($(1)_SHA512)"; \
-	    echo "    Actual:   $$$${sha512_actual}"; \
-	    exit 1; \
-	fi
-	mv $$@.tmp $$@
+	wget -P $(DOWNLOAD) $$($(1))
 endef
 
 # Download and unpack all source packages
-$(foreach dep,$(DEPENDENCIES),$(eval $(call DownloadVerify,$(dep))))
+$(foreach dep,$(dependencies),$(eval $(call Download,$(call uppercase,$(dep)))))
 
 ################################################################################
 # Unpack RPMS
@@ -281,7 +250,7 @@ RPM_FILE_LIST := $(sort $(foreach a, $(RPM_ARCHS), \
 # Note. For building linux you should install rpm2cpio.
 define unrpm
   $(SYSROOT)/$(notdir $(1)).unpacked : $(1)
-  $$(RPMS) : $(SYSROOT)/$(notdir $(1)).unpacked
+  $$(rpms) : $(SYSROOT)/$(notdir $(1)).unpacked
 endef
 
 %.unpacked :
@@ -308,7 +277,7 @@ $(foreach p,$(RPM_FILE_LIST),$(eval $(call unrpm,$(p))))
 # have it anyway, but just to make sure...
 # Patch libc.so and libpthread.so to force linking against libraries in sysroot
 # and not the ones installed on the build machine.
-$(LIBS) : $(RPMS)
+$(libs) : $(rpms)
 	@echo Patching libc and pthreads
 	@(for f in `find $(SYSROOT) -name libc.so -o -name libpthread.so`; do \
 	  (cat $$f | sed -e 's|/usr/lib64/||g' \
@@ -324,10 +293,10 @@ $(LIBS) : $(RPMS)
 # Create links for ffi header files so that they become visible by default when using the
 # devkit.
 ifeq ($(ARCH), x86_64)
-  $(SYSROOT)/usr/include/ffi.h: $(RPMS)
+  $(SYSROOT)/usr/include/ffi.h: $(rpms)
 	cd $(@D) && rm -f $(@F) && ln -s ../lib/libffi-*/include/$(@F) .
 
-  $(SYSROOT)/usr/include/ffitarget.h: $(RPMS)
+  $(SYSROOT)/usr/include/ffitarget.h: $(rpms)
 	cd $(@D) && rm -f $(@F) && ln -s ../lib/libffi-*/include/$(@F) .
 
   SYSROOT_LINKS += $(SYSROOT)/usr/include/ffi.h $(SYSROOT)/usr/include/ffitarget.h
@@ -336,7 +305,7 @@ endif
 ################################################################################
 
 # Define marker files for each source package to be compiled
-$(foreach dep,$(DEPENDENCIES),$(eval $(dep) = $(TARGETDIR)/$($(dep)_VER).done))
+$(foreach dep,$(dependencies),$(eval $(dep) = $(TARGETDIR)/$($(dep)_ver).done))
 
 ################################################################################
 
@@ -376,48 +345,48 @@ TOOLS ?= $(call declare_tools,_FOR_TARGET,$(TARGET)-)
 # CFLAG_<name> to most likely -m32.
 define mk_bfd
   $$(info Libs for $(1))
-  $$(BUILDDIR)/$$(BINUTILS_VER)-$(subst /,-,$(1))/Makefile \
+  $$(BUILDDIR)/$$(binutils_ver)-$(subst /,-,$(1))/Makefile \
       : CFLAGS += $$(CFLAGS_$(1))
-  $$(BUILDDIR)/$$(BINUTILS_VER)-$(subst /,-,$(1))/Makefile \
+  $$(BUILDDIR)/$$(binutils_ver)-$(subst /,-,$(1))/Makefile \
       : LIBDIRS = --libdir=$(TARGETDIR)/$(1)
 
-  BFDLIB += $$(TARGETDIR)/$$(BINUTILS_VER)-$(subst /,-,$(1)).done
-  BFDMAKES += $$(BUILDDIR)/$$(BINUTILS_VER)-$(subst /,-,$(1))/Makefile
+  bfdlib += $$(TARGETDIR)/$$(binutils_ver)-$(subst /,-,$(1)).done
+  bfdmakes += $$(BUILDDIR)/$$(binutils_ver)-$(subst /,-,$(1))/Makefile
 endef
 
 # Create one set of bfds etc for each multilib arch
 $(foreach l,$(LIBDIRS),$(eval $(call mk_bfd,$(l))))
 
 # Only build these two libs.
-$(BFDLIB) : MAKECMD = all-libiberty all-bfd
-$(BFDLIB) : INSTALLCMD = install-libiberty install-bfd
+$(bfdlib) : MAKECMD = all-libiberty all-bfd
+$(bfdlib) : INSTALLCMD = install-libiberty install-bfd
 
 # Building targets libbfd + libiberty. HOST==TARGET, i.e not
 # for a cross env.
-$(BFDMAKES) : CONFIG = --target=$(TARGET) \
+$(bfdmakes) : CONFIG = --target=$(TARGET) \
     --host=$(TARGET) --build=$(BUILD) \
     --prefix=$(TARGETDIR) \
     --with-sysroot=$(SYSROOT) \
     $(LIBDIRS)
 
-$(BFDMAKES) : TOOLS = $(call declare_tools,_FOR_TARGET,$(TARGET)-) $(call declare_tools,,$(TARGET)-)
+$(bfdmakes) : TOOLS = $(call declare_tools,_FOR_TARGET,$(TARGET)-) $(call declare_tools,,$(TARGET)-)
 
 ################################################################################
 
-$(GCC) \
-    $(BINUTILS) \
-    $(GMP) \
-    $(MPFR) \
-    $(MPC) \
-    $(BFDMAKES) \
-    $(CCACHE) : ENVS += $(TOOLS)
+$(gcc) \
+    $(binutils) \
+    $(gmp) \
+    $(mpfr) \
+    $(mpc) \
+    $(bfdmakes) \
+    $(ccache) : ENVS += $(TOOLS)
 
 # libdir to work around hateful bfd stuff installing into wrong dirs...
 # ensure we have 64 bit bfd support in the HOST library. I.e our
 # compiler on i686 will know 64 bit symbols, BUT later
 # we build just the libs again for TARGET, then with whatever the arch
 # wants.
-$(BUILDDIR)/$(BINUTILS_VER)/Makefile : CONFIG += --enable-64-bit-bfd --libdir=$(PREFIX)/$(word 1,$(LIBDIRS))
+$(BUILDDIR)/$(binutils_ver)/Makefile : CONFIG += --enable-64-bit-bfd --libdir=$(PREFIX)/$(word 1,$(LIBDIRS))
 
 ifeq ($(filter $(ARCH), s390x riscv64 ppc64le), )
   # gold compiles but cannot link properly on s390x @ gcc 13.2 and Fedore 41
@@ -428,8 +397,8 @@ endif
 
 # Makefile creation. Simply run configure in build dir.
 # Setting CFLAGS to -O2 generates a much faster ld.
-$(BFDMAKES) \
-$(BUILDDIR)/$(BINUTILS_VER)/Makefile \
+$(bfdmakes) \
+$(BUILDDIR)/$(binutils_ver)/Makefile \
     : $(BINUTILS_CFG)
 	$(info Configuring $@. Log in $(@D)/log.config)
 	@mkdir -p $(@D)
@@ -448,7 +417,7 @@ $(BUILDDIR)/$(BINUTILS_VER)/Makefile \
 	) > $(@D)/log.config 2>&1
 	@echo 'done'
 
-$(BUILDDIR)/$(MPFR_VER)/Makefile \
+$(BUILDDIR)/$(mpfr_ver)/Makefile \
     : $(MPFR_CFG)
 	$(info Configuring $@. Log in $(@D)/log.config)
 	@mkdir -p $(@D)
@@ -463,7 +432,7 @@ $(BUILDDIR)/$(MPFR_VER)/Makefile \
 	) > $(@D)/log.config 2>&1
 	@echo 'done'
 
-$(BUILDDIR)/$(GMP_VER)/Makefile \
+$(BUILDDIR)/$(gmp_ver)/Makefile \
     : $(GMP_CFG)
 	$(info Configuring $@. Log in $(@D)/log.config)
 	@mkdir -p $(@D)
@@ -480,7 +449,7 @@ $(BUILDDIR)/$(GMP_VER)/Makefile \
 	) > $(@D)/log.config 2>&1
 	@echo 'done'
 
-$(BUILDDIR)/$(MPC_VER)/Makefile \
+$(BUILDDIR)/$(mpc_ver)/Makefile \
     : $(MPC_CFG)
 	$(info Configuring $@. Log in $(@D)/log.config)
 	@mkdir -p $(@D)
@@ -499,11 +468,11 @@ $(BUILDDIR)/$(MPC_VER)/Makefile \
 # Only valid if glibc target -> linux
 # proper destructor handling for c++
 ifneq (,$(findstring linux,$(TARGET)))
-  $(BUILDDIR)/$(GCC_VER)/Makefile : CONFIG += --enable-__cxa_atexit
+  $(BUILDDIR)/$(gcc_ver)/Makefile : CONFIG += --enable-__cxa_atexit
 endif
 
 ifeq ($(ARCH), armhfp)
-  $(BUILDDIR)/$(GCC_VER)/Makefile : CONFIG +=  --with-float=hard
+  $(BUILDDIR)/$(gcc_ver)/Makefile : CONFIG +=  --with-float=hard
 endif
 
 ifneq ($(filter riscv64 ppc64le s390x, $(ARCH)), )
@@ -518,7 +487,7 @@ endif
 # skip native language.
 # and link and assemble with the binutils we created
 # earlier, so --with-gnu*
-$(BUILDDIR)/$(GCC_VER)/Makefile \
+$(BUILDDIR)/$(gcc_ver)/Makefile \
     : $(GCC_CFG)
 	$(info Configuring $@. Log in $(@D)/log.config)
 	mkdir -p $(@D)
@@ -540,17 +509,17 @@ $(BUILDDIR)/$(GCC_VER)/Makefile \
 	@echo 'done'
 
 # need binutils for gcc
-$(GCC) : $(BINUTILS)
+$(gcc) : $(binutils)
 
 # as of 4.3 or so need these for doing config
-$(BUILDDIR)/$(GCC_VER)/Makefile : $(GMP) $(MPFR) $(MPC)
-$(MPFR) : $(GMP)
-$(MPC) : $(GMP) $(MPFR)
+$(BUILDDIR)/$(gcc_ver)/Makefile : $(gmp) $(mpfr) $(mpc)
+$(mpfr) : $(gmp)
+$(mpc) : $(gmp) $(mpfr)
 
 ################################################################################
 # Build gdb but only where host and target match
 ifeq ($(HOST), $(TARGET))
-  $(BUILDDIR)/$(GDB_VER)/Makefile: $(GDB_CFG)
+  $(BUILDDIR)/$(gdb_ver)/Makefile: $(GDB_CFG)
 	$(info Configuring $@. Log in $(@D)/log.config)
 	mkdir -p $(@D)
 	( \
@@ -563,9 +532,9 @@ ifeq ($(HOST), $(TARGET))
 	) > $(@D)/log.config 2>&1
 	@echo 'done'
 
-  $(GDB): $(GCC)
+  $(gdb): $(gcc)
 else
-  $(BUILDDIR)/$(GDB_VER)/Makefile:
+  $(BUILDDIR)/$(gdb_ver)/Makefile:
 	$(info Faking $@, not used when cross-compiling)
 	mkdir -p $(@D)
 	echo "install:" > $@
@@ -574,7 +543,7 @@ endif
 
 ################################################################################
 # very straightforward. just build a ccache. it is only for host.
-$(BUILDDIR)/$(CCACHE_VER)/Makefile \
+$(BUILDDIR)/$(ccache_ver)/Makefile \
     : $(CCACHE_SRC_MARKER)
 	$(info Configuring $@. Log in $(@D)/log.config)
 	@mkdir -p $(@D)
@@ -585,12 +554,12 @@ $(BUILDDIR)/$(CCACHE_VER)/Makefile \
 	) > $(@D)/log.config 2>&1
 	@echo 'done'
 
-GCC_PATCHED = $(TARGETDIR)/gcc-patched
+gccpatch = $(TARGETDIR)/gcc-patched
 
 ################################################################################
 # For some reason cpp is not created as a target-compiler
 ifeq ($(HOST),$(TARGET))
-  $(GCC_PATCHED) : $(GCC) link_libs
+  $(gccpatch) : $(gcc) link_libs
 	@echo -n 'Creating compiler symlinks...'
 	@for f in cpp; do \
 	  if [ ! -e $(PREFIX)/bin/$(TARGET)-$$f ]; \
@@ -618,7 +587,7 @@ ifeq ($(HOST),$(TARGET))
 	done;)
 	@echo 'done'
 else
-  $(GCC_PATCHED) :
+  $(gccpatch) :
 	@echo 'done'
 endif
 
@@ -646,7 +615,7 @@ $(PREFIX)/devkit.info:
 	echo '# This file describes to configure how to interpret the contents of this' >> $@
 	echo '# devkit' >> $@
 	echo '' >> $@
-	echo 'DEVKIT_NAME="$(GCC_VER) - $(LINUX_VERSION)"' >> $@
+	echo 'DEVKIT_NAME="$(gcc_ver) - $(LINUX_VERSION)"' >> $@
 	echo 'DEVKIT_TOOLCHAIN_PATH="$$DEVKIT_ROOT/bin"' >> $@
 	echo 'DEVKIT_SYSROOT="$$DEVKIT_ROOT/$(TARGET)/sysroot"' >> $@
 	echo 'DEVKIT_EXTRA_PATH="$$DEVKIT_ROOT/bin"' >> $@
@@ -682,32 +651,32 @@ ifeq ($(TARGET), $(HOST))
 	@echo 'Creating missing $* soft link'
 	ln -s $(TARGET)-$* $@
 
-  MISSING_LINKS := $(addprefix $(PREFIX)/bin/, \
-      addr2line ar as c++ c++filt dwp elfedit g++ gcc gcc-$(GCC_VER_ONLY) gprof ld ld.bfd \
+  missing-links := $(addprefix $(PREFIX)/bin/, \
+      addr2line ar as c++ c++filt dwp elfedit g++ gcc gcc-$(gcc_ver_only) gprof ld ld.bfd \
       ld.gold nm objcopy objdump ranlib readelf size strings strip)
 endif
 
 # Add link to work around "plugin needed to handle lto object" (JDK-8344272)
-$(PREFIX)/lib/bfd-plugins/liblto_plugin.so: $(PREFIX)/libexec/gcc/$(TARGET)/$(GCC_VER_ONLY)/liblto_plugin.so
+$(PREFIX)/lib/bfd-plugins/liblto_plugin.so: $(PREFIX)/libexec/gcc/$(TARGET)/$(gcc_ver_only)/liblto_plugin.so
 	@echo 'Creating missing $(@F) soft link'
 	@mkdir -p $(@D)
 	ln -s $$(realpath -s --relative-to=$(@D) $<) $@
 
-MISSING_LINKS += $(PREFIX)/lib/bfd-plugins/liblto_plugin.so
+missing-links += $(PREFIX)/lib/bfd-plugins/liblto_plugin.so
 
 ################################################################################
 
-bfdlib : $(BFDLIB)
-binutils : $(BINUTILS)
-rpms : $(RPMS)
-libs : $(LIBS)
+bfdlib : $(bfdlib)
+binutils : $(binutils)
+rpms : $(rpms)
+libs : $(libs)
 sysroot : rpms libs
-gcc : sysroot $(GCC) $(GCC_PATCHED)
-gdb : $(GDB)
-all : binutils gcc bfdlib $(PREFIX)/devkit.info $(MISSING_LINKS) $(SYSROOT_LINKS) \
+gcc : sysroot $(gcc) $(gccpatch)
+gdb : $(gdb)
+all : binutils gcc bfdlib $(PREFIX)/devkit.info $(missing-links) $(SYSROOT_LINKS) \
     $(THESE_MAKEFILES) gdb
 
 # this is only built for host. so separate.
-ccache : $(CCACHE)
+ccache : $(ccache)
 
 .PHONY : gcc all binutils bfdlib link_libs rpms libs sysroot

make/devkit/createAutoconfBundle.sh

@@ -93,7 +93,7 @@ elif test "x$TARGET_PLATFORM" = xlinux_x64; then
   rpm2cpio $OUTPUT_ROOT/m4-$M4_VERSION.el6.x86_64.rpm | cpio -d -i
 elif test "x$TARGET_PLATFORM" = xlinux_x86; then
   M4_VERSION=1.4.13-5
-  wget https://yum.oracle.com/repo/OracleLinux/OL6/latest/i386/getPackage/m4-$M4_VERSION.el6.i686.rpm
+  wget http://yum.oracle.com/repo/OracleLinux/OL6/latest/i386/getPackage/m4-$M4_VERSION.el6.i686.rpm
   cd $IMAGE_DIR
   rpm2cpio $OUTPUT_ROOT/m4-$M4_VERSION.el6.i686.rpm | cpio -d -i
 else

make/hotspot/lib/CompileGtest.gmk

@@ -152,7 +152,7 @@ $(eval $(call SetupJdkExecutable, BUILD_GTEST_LAUNCHER, \
         -I$(GTEST_FRAMEWORK_SRC)/googlemock \
         -I$(GTEST_FRAMEWORK_SRC)/googlemock/include, \
     LD_SET_ORIGIN := false, \
-    LDFLAGS_unix := $(call SetSharedLibraryOrigin), \
+    LDFLAGS_unix := $(call SET_SHARED_LIBRARY_ORIGIN), \
     JDK_LIBS := gtest:libjvm, \
     COPY_DEBUG_SYMBOLS := $(GTEST_COPY_DEBUG_SYMBOLS), \
     ZIP_EXTERNAL_DEBUG_SYMBOLS := false, \

make/hotspot/lib/JvmFeatures.gmk

@@ -57,7 +57,7 @@ ifeq ($(call check-jvm-feature, zero), true)
       -DZERO_LIBARCH='"$(OPENJDK_TARGET_CPU_LEGACY_LIB)"' $(LIBFFI_CFLAGS)
   JVM_LIBS_FEATURES += $(LIBFFI_LIBS)
   ifeq ($(ENABLE_LIBFFI_BUNDLING), true)
-    JVM_LDFLAGS_FEATURES += $(call SetExecutableOrigin,/..)
+    JVM_LDFLAGS_FEATURES += $(call SET_EXECUTABLE_ORIGIN,/..)
   endif
 else
   JVM_EXCLUDE_PATTERNS += /zero/

make/ide/vscode/hotspot/template-workspace.jsonc

@@ -22,7 +22,6 @@
 		// Java extension
 		"jdk.project.jdkhome": "{{OUTPUTDIR}}/jdk",
 		"jdk.java.onSave.organizeImports": false, // prevents unnecessary changes
-		"jdk.serverVmOptions": ["-Xmx2G"], // prevent out of memory
 
 		// Additional conventions
 		"files.associations": {

make/modules/java.base/Lib.gmk

@@ -154,8 +154,6 @@ endif
 
 ################################################################################
 ## Build libsyslookup
-## The LIBDL dependency on Linux is needed to dynamically access libdl symbols,
-## which may be needed as part of resolving some standard symbols
 ################################################################################
 
 $(eval $(call SetupJdkLibrary, BUILD_LIBSYSLOOKUP, \
@@ -198,7 +196,7 @@ ifeq ($(call isTargetOs, linux)+$(call isTargetCpu, x86_64)+$(INCLUDE_COMPILER2)
       OPTIMIZATION := HIGH, \
       CXXFLAGS := -std=c++17, \
       DISABLED_WARNINGS_gcc := unused-variable, \
-      LIBS_linux := $(LIBM), \
+      LIBS_linux := $(LIBDL) $(LIBM), \
   ))
 
   TARGETS += $(BUILD_LIBSIMD_SORT)

make/modules/java.desktop/lib/ClientLibraries.gmk

@@ -51,7 +51,7 @@ $(eval $(call SetupJdkLibrary, BUILD_LIBMLIB_IMAGE, \
         $(LIBMLIB_IMAGE_CFLAGS), \
     DISABLED_WARNINGS_gcc := unused-function, \
     DISABLED_WARNINGS_clang_mlib_ImageCreate.c := unused-function, \
-    LIBS_unix := $(LIBM), \
+    LIBS_unix := $(LIBDL) $(LIBM), \
 ))
 
 TARGETS += $(BUILD_LIBMLIB_IMAGE)
@@ -264,7 +264,7 @@ ifeq ($(ENABLE_HEADLESS_ONLY), false)
       JDK_LIBS_macosx := libosxapp, \
       LIBS := $(GIFLIB_LIBS) $(LIBJPEG_LIBS) $(LIBZ_LIBS) $(PNG_LIBS) $(ICONV_LIBS), \
       LIBS_unix := $(LIBM) $(LIBPTHREAD), \
-      LIBS_linux := $(X_LIBS) -lX11 -lXext, \
+      LIBS_linux := $(LIBDL) $(X_LIBS) -lX11 -lXext, \
       LIBS_macosx := \
           -framework ApplicationServices \
           -framework Cocoa \

make/modules/java.instrument/Lib.gmk

@@ -43,6 +43,8 @@ $(eval $(call SetupJdkLibrary, BUILD_LIBINSTRUMENT, \
     JDK_LIBS := java.base:libjava java.base:libjli java.base:libjvm, \
     LIBS := $(ICONV_LIBS), \
     LIBS_unix := $(LIBZ_LIBS), \
+    LIBS_linux := $(LIBDL), \
+    LIBS_aix := $(LIBDL), \
     LIBS_macosx := \
         -framework ApplicationServices \
         -framework Cocoa \

make/modules/java.scripting/Java.gmk

@@ -27,5 +27,7 @@
 
 DOCLINT += -Xdoclint:all/protected \
     '-Xdoclint/package:java.*,javax.*'
+COPY += .js
+CLEAN += .properties
 
 ################################################################################

make/modules/java.scripting/Launcher.gmk

@@ -0,0 +1,39 @@
+#
+# Copyright (c) 2011, 2025, Oracle and/or its affiliates. All rights reserved.
+# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+#
+# This code is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License version 2 only, as
+# published by the Free Software Foundation.  Oracle designates this
+# particular file as subject to the "Classpath" exception as provided
+# by Oracle in the LICENSE file that accompanied this code.
+#
+# This code is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# version 2 for more details (a copy is included in the LICENSE file that
+# accompanied this code).
+#
+# You should have received a copy of the GNU General Public License version
+# 2 along with this work; if not, write to the Free Software Foundation,
+# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+#
+# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+# or visit www.oracle.com if you need additional information or have any
+# questions.
+#
+
+################################################################################
+
+include LauncherCommon.gmk
+
+################################################################################
+## Build jrunscript
+################################################################################
+
+$(eval $(call SetupBuildLauncher, jrunscript, \
+    MAIN_CLASS := com.sun.tools.script.shell.Main, \
+    JAVA_ARGS := --add-modules ALL-DEFAULT, \
+))
+
+################################################################################

make/modules/jdk.sctp/Lib.gmk

@@ -41,7 +41,7 @@ ifeq ($(call isTargetOs, linux), true)
           java.base:libnio \
           java.base:libnio/ch, \
       JDK_LIBS := java.base:libjava java.base:libnet, \
-      LIBS_linux := $(LIBDL), \
+      LIBS_linux := $(LIBDL) $(LIBPTHREAD), \
   ))
 
   TARGETS += $(BUILD_LIBSCTP)

src/hotspot/cpu/aarch64/aarch64.ad

@@ -2568,6 +2568,10 @@ RegMask Matcher::modL_proj_mask() {
   return RegMask();
 }
 
+const RegMask Matcher::method_handle_invoke_SP_save_mask() {
+  return FP_REG_mask();
+}
+
 bool size_fits_all_mem_uses(AddPNode* addp, int shift) {
   for (DUIterator_Fast imax, i = addp->fast_outs(imax); i < imax; i++) {
     Node* u = addp->fast_out(i);

src/hotspot/cpu/aarch64/bytecodes_aarch64.cpp

@@ -1,12 +1,11 @@
 /*
- * Copyright (c) 2021, 2023, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1998, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.  Oracle designates this
- * particular file as subject to the "Classpath" exception as provided
- * by Oracle in the LICENSE file that accompanied this code.
+ * published by the Free Software Foundation.
  *
  * This code is distributed in the hope that it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
@@ -21,9 +20,9 @@
  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  * or visit www.oracle.com if you need additional information or have any
  * questions.
+ *
  */
-package jdk.internal.net.http.qpack;
 
-public interface InsertionPolicy {
-    boolean shouldUpdateDynamicTable(TableEntry tableEntry);
-}
+#include "interpreter/bytecodes.hpp"
+
+

src/hotspot/cpu/aarch64/bytecodes_aarch64.hpp

@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 1998, 2019, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+#ifndef CPU_AARCH64_BYTECODES_AARCH64_HPP
+#define CPU_AARCH64_BYTECODES_AARCH64_HPP
+
+// No aarch64 specific bytecodes
+
+#endif // CPU_AARCH64_BYTECODES_AARCH64_HPP

src/hotspot/cpu/aarch64/c1_CodeStubs_aarch64.cpp

@@ -216,10 +216,10 @@ void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
 
 void MonitorExitStub::emit_code(LIR_Assembler* ce) {
   __ bind(_entry);
-
-  // lock_reg was destroyed by fast unlocking attempt => recompute it
-  ce->monitor_address(_monitor_ix, _lock_reg);
-
+  if (_compute_lock) {
+    // lock_reg was destroyed by fast unlocking attempt => recompute it
+    ce->monitor_address(_monitor_ix, _lock_reg);
+  }
   ce->store_parameter(_lock_reg->as_register(), 0);
   // note: non-blocking leaf routine => no call info needed
   StubId exit_id;

src/hotspot/cpu/aarch64/c1_FrameMap_aarch64.cpp

@@ -383,6 +383,13 @@ LIR_Opr FrameMap::stack_pointer() {
   return FrameMap::sp_opr;
 }
 
+
+// JSR 292
+LIR_Opr FrameMap::method_handle_invoke_SP_save_opr() {
+  return LIR_OprFact::illegalOpr;  // Not needed on aarch64
+}
+
+
 bool FrameMap::validate_frame() {
   return true;
 }

src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp

@@ -409,7 +409,7 @@ int LIR_Assembler::emit_unwind_handler() {
   MonitorExitStub* stub = nullptr;
   if (method()->is_synchronized()) {
     monitor_address(0, FrameMap::r0_opr);
-    stub = new MonitorExitStub(FrameMap::r0_opr, 0);
+    stub = new MonitorExitStub(FrameMap::r0_opr, true, 0);
     __ unlock_object(r5, r4, r0, r6, *stub->entry());
     __ bind(*stub->continuation());
   }
@@ -2481,6 +2481,7 @@ void LIR_Assembler::emit_lock(LIR_OpLock* op) {
   Register lock = op->lock_opr()->as_register();
   Register temp = op->scratch_opr()->as_register();
   if (op->code() == lir_lock) {
+    assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
     // add debug info for NullPointerException only if one is possible
     int null_check_offset = __ lock_object(hdr, obj, lock, temp, *op->stub()->entry());
     if (op->info() != nullptr) {
@@ -2488,6 +2489,7 @@ void LIR_Assembler::emit_lock(LIR_OpLock* op) {
     }
     // done
   } else if (op->code() == lir_unlock) {
+    assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
     __ unlock_object(hdr, obj, lock, temp, *op->stub()->entry());
   } else {
     Unimplemented();

src/hotspot/cpu/aarch64/c1_MacroAssembler_aarch64.cpp

@@ -59,28 +59,28 @@ void C1_MacroAssembler::float_cmp(bool is_float, int unordered_result,
   }
 }
 
-int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register basic_lock, Register temp, Label& slow_case) {
-  assert_different_registers(hdr, obj, basic_lock, temp, rscratch2);
+int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Register temp, Label& slow_case) {
+  assert_different_registers(hdr, obj, disp_hdr, temp, rscratch2);
   int null_check_offset = -1;
 
   verify_oop(obj);
 
   // save object being locked into the BasicObjectLock
-  str(obj, Address(basic_lock, BasicObjectLock::obj_offset()));
+  str(obj, Address(disp_hdr, BasicObjectLock::obj_offset()));
 
   null_check_offset = offset();
 
-  lightweight_lock(basic_lock, obj, hdr, temp, rscratch2, slow_case);
+  lightweight_lock(disp_hdr, obj, hdr, temp, rscratch2, slow_case);
 
   return null_check_offset;
 }
 
 
-void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register basic_lock, Register temp, Label& slow_case) {
-  assert_different_registers(hdr, obj, basic_lock, temp, rscratch2);
+void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Register temp, Label& slow_case) {
+  assert_different_registers(hdr, obj, disp_hdr, temp, rscratch2);
 
   // load object
-  ldr(obj, Address(basic_lock, BasicObjectLock::obj_offset()));
+  ldr(obj, Address(disp_hdr, BasicObjectLock::obj_offset()));
   verify_oop(obj);
 
   lightweight_unlock(obj, hdr, temp, rscratch2, slow_case);

src/hotspot/cpu/aarch64/c1_MacroAssembler_aarch64.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1999, 2024, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -55,19 +55,19 @@ using MacroAssembler::null_check;
                  Register result);
 
   // locking
-  // hdr       : must be r0, contents destroyed
-  // obj       : must point to the object to lock, contents preserved
-  // basic_lock: must point to the basic lock, contents preserved
-  // temp      : temporary register, must not be rscratch1 or rscratch2
+  // hdr     : must be r0, contents destroyed
+  // obj     : must point to the object to lock, contents preserved
+  // disp_hdr: must point to the displaced header location, contents preserved
+  // temp    : temporary register, must not be rscratch1 or rscratch2
   // returns code offset at which to add null check debug information
-  int lock_object  (Register swap, Register obj, Register basic_lock, Register temp, Label& slow_case);
+  int lock_object  (Register swap, Register obj, Register disp_hdr, Register temp, Label& slow_case);
 
   // unlocking
-  // hdr       : contents destroyed
-  // obj       : must point to the object to lock, contents preserved
-  // basic_lock: must be r0 & must point to the basic lock, contents destroyed
-  // temp      : temporary register, must not be rscratch1 or rscratch2
-  void unlock_object(Register swap, Register obj, Register basic_lock, Register temp, Label& slow_case);
+  // hdr     : contents destroyed
+  // obj     : must point to the object to lock, contents preserved
+  // disp_hdr: must be r0 & must point to the displaced header location, contents destroyed
+  // temp    : temporary register, must not be rscratch1 or rscratch2
+  void unlock_object(Register swap, Register obj, Register lock, Register temp, Label& slow_case);
 
   void initialize_object(
     Register obj,                      // result: pointer to object after successful allocation

src/hotspot/cpu/aarch64/frame_aarch64.cpp

@@ -228,7 +228,8 @@ bool frame::safe_for_sender(JavaThread *thread) {
 
     nmethod* nm = sender_blob->as_nmethod_or_null();
     if (nm != nullptr) {
-      if (nm->is_deopt_entry(sender_pc) || nm->method()->is_method_handle_intrinsic()) {
+      if (nm->is_deopt_mh_entry(sender_pc) || nm->is_deopt_entry(sender_pc) ||
+          nm->method()->is_method_handle_intrinsic()) {
         return false;
       }
     }
@@ -453,6 +454,48 @@ JavaThread** frame::saved_thread_address(const frame& f) {
   return thread_addr;
 }
 
+//------------------------------------------------------------------------------
+// frame::verify_deopt_original_pc
+//
+// Verifies the calculated original PC of a deoptimization PC for the
+// given unextended SP.
+#ifdef ASSERT
+void frame::verify_deopt_original_pc(nmethod* nm, intptr_t* unextended_sp) {
+  frame fr;
+
+  // This is ugly but it's better than to change {get,set}_original_pc
+  // to take an SP value as argument.  And it's only a debugging
+  // method anyway.
+  fr._unextended_sp = unextended_sp;
+
+  address original_pc = nm->get_original_pc(&fr);
+  assert(nm->insts_contains_inclusive(original_pc),
+         "original PC must be in the main code section of the compiled method (or must be immediately following it)");
+}
+#endif
+
+//------------------------------------------------------------------------------
+// frame::adjust_unextended_sp
+#ifdef ASSERT
+void frame::adjust_unextended_sp() {
+  // On aarch64, sites calling method handle intrinsics and lambda forms are treated
+  // as any other call site. Therefore, no special action is needed when we are
+  // returning to any of these call sites.
+
+  if (_cb != nullptr) {
+    nmethod* sender_nm = _cb->as_nmethod_or_null();
+    if (sender_nm != nullptr) {
+      // If the sender PC is a deoptimization point, get the original PC.
+      if (sender_nm->is_deopt_entry(_pc) ||
+          sender_nm->is_deopt_mh_entry(_pc)) {
+        verify_deopt_original_pc(sender_nm, _unextended_sp);
+      }
+    }
+  }
+}
+#endif
+
+
 //------------------------------------------------------------------------------
 // frame::sender_for_interpreter_frame
 frame frame::sender_for_interpreter_frame(RegisterMap* map) const {

src/hotspot/cpu/aarch64/frame_aarch64.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2024, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -141,6 +141,8 @@
     int _offset_unextended_sp; // for use in stack-chunk frames
   };
 
+  void adjust_unextended_sp() NOT_DEBUG_RETURN;
+
   // true means _sp value is correct and we can use it to get the sender's sp
   // of the compiled frame, otherwise, _sp value may be invalid and we can use
   // _fp to get the sender's sp if PreserveFramePointer is enabled.
@@ -150,6 +152,11 @@
     return (intptr_t*) addr_at(offset);
   }
 
+#ifdef ASSERT
+  // Used in frame::sender_for_{interpreter,compiled}_frame
+  static void verify_deopt_original_pc(nmethod* nm, intptr_t* unextended_sp);
+#endif
+
  public:
   // Constructors
 

src/hotspot/cpu/aarch64/frame_aarch64.inline.hpp

@@ -116,6 +116,8 @@ inline void frame::init(intptr_t* sp, intptr_t* fp, address pc) {
 }
 
 inline void frame::setup(address pc) {
+  adjust_unextended_sp();
+
   address original_pc = get_deopt_original_pc();
   if (original_pc != nullptr) {
     _pc = original_pc;
@@ -221,6 +223,7 @@ inline frame::frame(intptr_t* sp, intptr_t* fp) {
   // assert(_pc != nullptr, "no pc?");
 
   _cb = CodeCache::find_blob(_pc);
+  adjust_unextended_sp();
 
   address original_pc = get_deopt_original_pc();
   if (original_pc != nullptr) {

src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp

@@ -86,48 +86,15 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
   }
 }
 
-void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm,
-                                                             DecoratorSet decorators,
-                                                             Register start,
-                                                             Register count,
-                                                             Register scratch,
-                                                             RegSet saved_regs) {
-
-  Label done;
-  Label loop;
-  Label next;
-
-  __ cbz(count, done);
-
-  // Calculate the number of card marks to set. Since the object might start and
-  // end within a card, we need to calculate this via the card table indexes of
-  // the actual start and last addresses covered by the object.
-  // Temporarily use the count register for the last element address.
-  __ lea(count, Address(start, count, Address::lsl(LogBytesPerHeapOop))); // end = start + count << LogBytesPerHeapOop
-  __ sub(count, count, BytesPerHeapOop);                                  // Use last element address for end.
-
-  __ lsr(start, start, CardTable::card_shift());
-  __ lsr(count, count, CardTable::card_shift());
-  __ sub(count, count, start);                                            // Number of bytes to mark - 1.
-
-  // Add card table base offset to start.
-  __ ldr(scratch, Address(rthread, in_bytes(G1ThreadLocalData::card_table_base_offset())));
-  __ add(start, start, scratch);
-
-  __ bind(loop);
-  if (UseCondCardMark) {
-    __ ldrb(scratch, Address(start, count));
-    // Instead of loading clean_card_val and comparing, we exploit the fact that
-    // the LSB of non-clean cards is always 0, and the LSB of clean cards 1.
-    __ tbz(scratch, 0, next);
-  }
-  static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
-  __ strb(zr, Address(start, count));
-  __ bind(next);
-  __ subs(count, count, 1);
-  __ br(Assembler::GE, loop);
-
-  __ bind(done);
+void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
+                                                             Register start, Register count, Register scratch, RegSet saved_regs) {
+  __ push(saved_regs, sp);
+  assert_different_registers(start, count, scratch);
+  assert_different_registers(c_rarg0, count);
+  __ mov(c_rarg0, start);
+  __ mov(c_rarg1, count);
+  __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), 2);
+  __ pop(saved_regs, sp);
 }
 
 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
@@ -232,17 +199,13 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
 
 }
 
-static void generate_post_barrier(MacroAssembler* masm,
-                                  const Register store_addr,
-                                  const Register new_val,
-                                  const Register thread,
-                                  const Register tmp1,
-                                  const Register tmp2,
-                                  Label& done,
-                                  bool new_val_may_be_null) {
-  assert(thread == rthread, "must be");
-  assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg, rscratch1);
-
+static void generate_post_barrier_fast_path(MacroAssembler* masm,
+                                            const Register store_addr,
+                                            const Register new_val,
+                                            const Register tmp1,
+                                            const Register tmp2,
+                                            Label& done,
+                                            bool new_val_may_be_null) {
   // Does store cross heap regions?
   __ eor(tmp1, store_addr, new_val);                     // tmp1 := store address ^ new value
   __ lsr(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes);   // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
@@ -251,19 +214,33 @@ static void generate_post_barrier(MacroAssembler* masm,
   if (new_val_may_be_null) {
     __ cbz(new_val, done);
   }
-  // Storing region crossing non-null.
+  // Storing region crossing non-null, is card young?
   __ lsr(tmp1, store_addr, CardTable::card_shift());     // tmp1 := card address relative to card table base
+  __ load_byte_map_base(tmp2);                           // tmp2 := card table base address
+  __ add(tmp1, tmp1, tmp2);                              // tmp1 := card address
+  __ ldrb(tmp2, Address(tmp1));                          // tmp2 := card
+  __ cmpw(tmp2, (int)G1CardTable::g1_young_card_val());  // tmp2 := card == young_card_val?
+}
 
-  Address card_table_addr(thread, in_bytes(G1ThreadLocalData::card_table_base_offset()));
-  __ ldr(tmp2, card_table_addr);                         // tmp2 := card table base address
-  if (UseCondCardMark) {
-    __ ldrb(rscratch1, Address(tmp1, tmp2));             // rscratch1 := card
-    // Instead of loading clean_card_val and comparing, we exploit the fact that
-    // the LSB of non-clean cards is always 0, and the LSB of clean cards 1.
-    __ tbz(rscratch1, 0, done);
-  }
-  static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
-  __ strb(zr, Address(tmp1, tmp2));                      // *(card address) := dirty_card_val
+static void generate_post_barrier_slow_path(MacroAssembler* masm,
+                                            const Register thread,
+                                            const Register tmp1,
+                                            const Register tmp2,
+                                            Label& done,
+                                            Label& runtime) {
+  __ membar(Assembler::StoreLoad);  // StoreLoad membar
+  __ ldrb(tmp2, Address(tmp1));     // tmp2 := card
+  __ cbzw(tmp2, done);
+  // Storing a region crossing, non-null oop, card is clean.
+  // Dirty card and log.
+  STATIC_ASSERT(CardTable::dirty_card_val() == 0);
+  __ strb(zr, Address(tmp1));       // *(card address) := dirty_card_val
+  generate_queue_test_and_insertion(masm,
+                                    G1ThreadLocalData::dirty_card_queue_index_offset(),
+                                    G1ThreadLocalData::dirty_card_queue_buffer_offset(),
+                                    runtime,
+                                    thread, tmp1, tmp2, rscratch1);
+  __ b(done);
 }
 
 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
@@ -272,8 +249,27 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
                                                   Register thread,
                                                   Register tmp1,
                                                   Register tmp2) {
+  assert(thread == rthread, "must be");
+  assert_different_registers(store_addr, new_val, thread, tmp1, tmp2,
+                             rscratch1);
+  assert(store_addr != noreg && new_val != noreg && tmp1 != noreg
+         && tmp2 != noreg, "expecting a register");
+
   Label done;
-  generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, false /* new_val_may_be_null */);
+  Label runtime;
+
+  generate_post_barrier_fast_path(masm, store_addr, new_val, tmp1, tmp2, done, true /* new_val_may_be_null */);
+  // If card is young, jump to done
+  __ br(Assembler::EQ, done);
+  generate_post_barrier_slow_path(masm, thread, tmp1, tmp2, done, runtime);
+
+  __ bind(runtime);
+  // save the live input values
+  RegSet saved = RegSet::of(store_addr);
+  __ push(saved, sp);
+  __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), tmp1, thread);
+  __ pop(saved, sp);
+
   __ bind(done);
 }
 
@@ -333,10 +329,38 @@ void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
                                                      Register thread,
                                                      Register tmp1,
                                                      Register tmp2,
-                                                     bool new_val_may_be_null) {
-  Label done;
-  generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, new_val_may_be_null);
-  __ bind(done);
+                                                     G1PostBarrierStubC2* stub) {
+  assert(thread == rthread, "must be");
+  assert_different_registers(store_addr, new_val, thread, tmp1, tmp2,
+                             rscratch1);
+  assert(store_addr != noreg && new_val != noreg && tmp1 != noreg
+         && tmp2 != noreg, "expecting a register");
+
+  stub->initialize_registers(thread, tmp1, tmp2);
+
+  bool new_val_may_be_null = (stub->barrier_data() & G1C2BarrierPostNotNull) == 0;
+  generate_post_barrier_fast_path(masm, store_addr, new_val, tmp1, tmp2, *stub->continuation(), new_val_may_be_null);
+  // If card is not young, jump to stub (slow path)
+  __ br(Assembler::NE, *stub->entry());
+
+  __ bind(*stub->continuation());
+}
+
+void G1BarrierSetAssembler::generate_c2_post_barrier_stub(MacroAssembler* masm,
+                                                          G1PostBarrierStubC2* stub) const {
+  Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
+  Label runtime;
+  Register thread = stub->thread();
+  Register tmp1 = stub->tmp1(); // tmp1 holds the card address.
+  Register tmp2 = stub->tmp2();
+  assert(stub->tmp3() == noreg, "not needed in this platform");
+
+  __ bind(*stub->entry());
+  generate_post_barrier_slow_path(masm, thread, tmp1, tmp2, *stub->continuation(), runtime);
+
+  __ bind(runtime);
+  generate_c2_barrier_runtime_call(masm, stub, tmp1, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry));
+  __ b(*stub->continuation());
 }
 
 #endif // COMPILER2
@@ -432,19 +456,20 @@ void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrier
   __ b(*stub->continuation());
 }
 
-#undef __
-
-void G1BarrierSetAssembler::g1_write_barrier_post_c1(MacroAssembler* masm,
-                                                     Register store_addr,
-                                                     Register new_val,
-                                                     Register thread,
-                                                     Register tmp1,
-                                                     Register tmp2) {
-  Label done;
-  generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
-  masm->bind(done);
+void G1BarrierSetAssembler::gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub) {
+  G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
+  __ bind(*stub->entry());
+  assert(stub->addr()->is_register(), "Precondition.");
+  assert(stub->new_val()->is_register(), "Precondition.");
+  Register new_val_reg = stub->new_val()->as_register();
+  __ cbz(new_val_reg, *stub->continuation());
+  ce->store_parameter(stub->addr()->as_pointer_register(), 0);
+  __ far_call(RuntimeAddress(bs->post_barrier_c1_runtime_code_blob()->code_begin()));
+  __ b(*stub->continuation());
 }
 
+#undef __
+
 #define __ sasm->
 
 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
@@ -496,6 +521,74 @@ void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler*
   __ epilogue();
 }
 
+void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler* sasm) {
+  __ prologue("g1_post_barrier", false);
+
+  // arg0: store_address
+  Address store_addr(rfp, 2*BytesPerWord);
+
+  BarrierSet* bs = BarrierSet::barrier_set();
+  CardTableBarrierSet* ctbs = barrier_set_cast<CardTableBarrierSet>(bs);
+  CardTable* ct = ctbs->card_table();
+
+  Label done;
+  Label runtime;
+
+  // At this point we know new_value is non-null and the new_value crosses regions.
+  // Must check to see if card is already dirty
+
+  const Register thread = rthread;
+
+  Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()));
+  Address buffer(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset()));
+
+  const Register card_offset = rscratch2;
+  // LR is free here, so we can use it to hold the byte_map_base.
+  const Register byte_map_base = lr;
+
+  assert_different_registers(card_offset, byte_map_base, rscratch1);
+
+  __ load_parameter(0, card_offset);
+  __ lsr(card_offset, card_offset, CardTable::card_shift());
+  __ load_byte_map_base(byte_map_base);
+  __ ldrb(rscratch1, Address(byte_map_base, card_offset));
+  __ cmpw(rscratch1, (int)G1CardTable::g1_young_card_val());
+  __ br(Assembler::EQ, done);
+
+  assert((int)CardTable::dirty_card_val() == 0, "must be 0");
+
+  __ membar(Assembler::StoreLoad);
+  __ ldrb(rscratch1, Address(byte_map_base, card_offset));
+  __ cbzw(rscratch1, done);
+
+  // storing region crossing non-null, card is clean.
+  // dirty card and log.
+  __ strb(zr, Address(byte_map_base, card_offset));
+
+  // Convert card offset into an address in card_addr
+  Register card_addr = card_offset;
+  __ add(card_addr, byte_map_base, card_addr);
+
+  __ ldr(rscratch1, queue_index);
+  __ cbz(rscratch1, runtime);
+  __ sub(rscratch1, rscratch1, wordSize);
+  __ str(rscratch1, queue_index);
+
+  // Reuse LR to hold buffer_addr
+  const Register buffer_addr = lr;
+
+  __ ldr(buffer_addr, buffer);
+  __ str(card_addr, Address(buffer_addr, rscratch1));
+  __ b(done);
+
+  __ bind(runtime);
+  __ push_call_clobbered_registers();
+  __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
+  __ pop_call_clobbered_registers();
+  __ bind(done);
+  __ epilogue();
+}
+
 #undef __
 
 #endif // COMPILER1

src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2018, 2024, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -32,7 +32,9 @@
 class LIR_Assembler;
 class StubAssembler;
 class G1PreBarrierStub;
+class G1PostBarrierStub;
 class G1PreBarrierStubC2;
+class G1PostBarrierStubC2;
 
 class G1BarrierSetAssembler: public ModRefBarrierSetAssembler {
 protected:
@@ -63,15 +65,10 @@ protected:
 public:
 #ifdef COMPILER1
   void gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub);
+  void gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub);
 
   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
-
-  void g1_write_barrier_post_c1(MacroAssembler* masm,
-                                Register store_addr,
-                                Register new_val,
-                                Register thread,
-                                Register tmp1,
-                                Register tmp2);
+  void generate_c1_post_barrier_runtime_stub(StubAssembler* sasm);
 #endif
 
 #ifdef COMPILER2
@@ -90,7 +87,9 @@ public:
                                 Register thread,
                                 Register tmp1,
                                 Register tmp2,
-                                bool new_val_may_be_null);
+                                G1PostBarrierStubC2* c2_stub);
+  void generate_c2_post_barrier_stub(MacroAssembler* masm,
+                                     G1PostBarrierStubC2* stub) const;
 #endif
 
   void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,

src/hotspot/cpu/aarch64/gc/g1/g1_aarch64.ad

@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2024, 2025, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2024, Oracle and/or its affiliates. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
 // This code is free software; you can redistribute it and/or modify it
@@ -62,13 +62,13 @@ static void write_barrier_post(MacroAssembler* masm,
                                Register new_val,
                                Register tmp1,
                                Register tmp2) {
-  if (!G1BarrierStubC2::needs_post_barrier(node)) {
+  if (!G1PostBarrierStubC2::needs_barrier(node)) {
     return;
   }
   Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
   G1BarrierSetAssembler* g1_asm = static_cast<G1BarrierSetAssembler*>(BarrierSet::barrier_set()->barrier_set_assembler());
-  bool new_val_may_be_null = G1BarrierStubC2::post_new_val_may_be_null(node);
-  g1_asm->g1_write_barrier_post_c2(masm, store_addr, new_val, rthread, tmp1, tmp2, new_val_may_be_null);
+  G1PostBarrierStubC2* const stub = G1PostBarrierStubC2::create(node);
+  g1_asm->g1_write_barrier_post_c2(masm, store_addr, new_val, rthread, tmp1, tmp2, stub);
 }
 
 %}

src/hotspot/cpu/aarch64/gc/shared/barrierSetAssembler_aarch64.cpp

@@ -398,18 +398,14 @@ void BarrierSetAssembler::check_oop(MacroAssembler* masm, Register obj, Register
 OptoReg::Name BarrierSetAssembler::encode_float_vector_register_size(const Node* node, OptoReg::Name opto_reg) {
   switch (node->ideal_reg()) {
     case Op_RegF:
-    case Op_RegI: // RA may place scalar values (Op_RegI/N/L/P) in FP registers when UseFPUForSpilling is enabled
-    case Op_RegN:
       // No need to refine. The original encoding is already fine to distinguish.
-      assert(opto_reg % 4 == 0, "32-bit register should only occupy a single slot");
+      assert(opto_reg % 4 == 0, "Float register should only occupy a single slot");
       break;
     // Use different encoding values of the same fp/vector register to help distinguish different sizes.
     // Such as V16. The OptoReg::name and its corresponding slot value are
     // "V16": 64, "V16_H": 65, "V16_J": 66, "V16_K": 67.
     case Op_RegD:
     case Op_VecD:
-    case Op_RegL:
-    case Op_RegP:
       opto_reg &= ~3;
       opto_reg |= 1;
       break;

src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.hpp

@@ -275,6 +275,7 @@ public:
   Label* entry();
 };
 
+
 class ZStoreBarrierStubC2Aarch64 : public ZStoreBarrierStubC2 {
 private:
   bool _deferred_emit;

src/hotspot/cpu/aarch64/gc/z/z_aarch64.ad

@@ -239,6 +239,7 @@ instruct zCompareAndSwapPAcq(iRegINoSp res, indirect mem, iRegP oldval, iRegP ne
   ins_pipe(pipe_slow);
 %}
 
+
 instruct zCompareAndExchangeP(iRegPNoSp res, indirect mem, iRegP oldval, iRegP newval, iRegPNoSp oldval_tmp, iRegPNoSp newval_tmp, rFlagsReg cr) %{
   match(Set res (CompareAndExchangeP mem (Binary oldval newval)));
   predicate(UseZGC && !needs_acquiring_load_exclusive(n) && n->as_LoadStore()->barrier_data() != 0);

src/hotspot/cpu/aarch64/globalDefinitions_aarch64.hpp

@@ -35,6 +35,8 @@ const bool CCallingConventionRequiresIntsAsLongs = false;
 
 #define SUPPORTS_NATIVE_CX8
 
+#define SUPPORT_MONITOR_COUNT
+
 // Aarch64 was not originally defined to be multi-copy-atomic, but now
 // is.  See: "Simplifying ARM Concurrency: Multicopy-atomic Axiomatic
 // and Operational Models for ARMv8"

src/hotspot/cpu/aarch64/javaFrameAnchor_aarch64.hpp

@@ -39,22 +39,24 @@ public:
   //  3 - restoring an old state (javaCalls)
 
   void clear(void) {
-    // No hardware barriers are necessary. All members are volatile and the profiler
-    // is run from a signal handler and only observers the thread its running on.
-
     // clearing _last_Java_sp must be first
     _last_Java_sp = nullptr;
+    OrderAccess::release();
     _last_Java_fp = nullptr;
     _last_Java_pc = nullptr;
   }
 
   void copy(JavaFrameAnchor* src) {
-    // No hardware barriers are necessary. All members are volatile and the profiler
-    // is run from a signal handler and only observers the thread its running on.
-
+    // In order to make sure the transition state is valid for "this"
     // We must clear _last_Java_sp before copying the rest of the new data
+    //
+    // Hack Alert: Temporary bugfix for 4717480/4721647
+    // To act like previous version (pd_cache_state) don't null _last_Java_sp
+    // unless the value is changing
+    //
     if (_last_Java_sp != src->_last_Java_sp) {
       _last_Java_sp = nullptr;
+      OrderAccess::release();
     }
     _last_Java_fp = src->_last_Java_fp;
     _last_Java_pc = src->_last_Java_pc;

src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp

@@ -634,13 +634,12 @@ void MacroAssembler::set_last_Java_frame(Register last_java_sp,
     last_java_sp = esp;
   }
 
+  str(last_java_sp, Address(rthread, JavaThread::last_Java_sp_offset()));
+
   // last_java_fp is optional
   if (last_java_fp->is_valid()) {
     str(last_java_fp, Address(rthread, JavaThread::last_Java_fp_offset()));
   }
-
-  // We must set sp last.
-  str(last_java_sp, Address(rthread, JavaThread::last_Java_sp_offset()));
 }
 
 void MacroAssembler::set_last_Java_frame(Register last_java_sp,
@@ -5631,6 +5630,38 @@ void MacroAssembler::tlab_allocate(Register obj,
   bs->tlab_allocate(this, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
 }
 
+void MacroAssembler::inc_held_monitor_count(Register tmp) {
+  Address dst(rthread, JavaThread::held_monitor_count_offset());
+#ifdef ASSERT
+  ldr(tmp, dst);
+  increment(tmp);
+  str(tmp, dst);
+  Label ok;
+  tbz(tmp, 63, ok);
+  STOP("assert(held monitor count underflow)");
+  should_not_reach_here();
+  bind(ok);
+#else
+  increment(dst);
+#endif
+}
+
+void MacroAssembler::dec_held_monitor_count(Register tmp) {
+  Address dst(rthread, JavaThread::held_monitor_count_offset());
+#ifdef ASSERT
+  ldr(tmp, dst);
+  decrement(tmp);
+  str(tmp, dst);
+  Label ok;
+  tbz(tmp, 63, ok);
+  STOP("assert(held monitor count underflow)");
+  should_not_reach_here();
+  bind(ok);
+#else
+  decrement(dst);
+#endif
+}
+
 void MacroAssembler::verify_tlab() {
 #ifdef ASSERT
   if (UseTLAB && VerifyOops) {

src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp

@@ -983,6 +983,9 @@ public:
   void push_cont_fastpath(Register java_thread = rthread);
   void pop_cont_fastpath(Register java_thread = rthread);
 
+  void inc_held_monitor_count(Register tmp);
+  void dec_held_monitor_count(Register tmp);
+
   // Round up to a power of two
   void round_to(Register reg, int modulus);
 

src/hotspot/cpu/aarch64/relocInfo_aarch64.cpp

@@ -90,6 +90,7 @@ void Relocation::pd_set_call_destination(address x) {
 
 void trampoline_stub_Relocation::pd_fix_owner_after_move() {
   NativeCall* call = nativeCall_at(owner());
+  assert(call->raw_destination() == owner(), "destination should be empty");
   address trampoline = addr();
   address dest = nativeCallTrampolineStub_at(trampoline)->destination();
   if (!Assembler::reachable_from_branch_at(owner(), dest)) {

src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp

@@ -683,12 +683,12 @@ void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
                                             int comp_args_on_stack,
                                             const BasicType *sig_bt,
                                             const VMRegPair *regs,
-                                            address entry_address[AdapterBlob::ENTRY_COUNT]) {
-  entry_address[AdapterBlob::I2C] = __ pc();
+                                            AdapterHandlerEntry* handler) {
+  address i2c_entry = __ pc();
 
   gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
 
-  entry_address[AdapterBlob::C2I_Unverified] = __ pc();
+  address c2i_unverified_entry = __ pc();
   Label skip_fixup;
 
   Register data = rscratch2;
@@ -718,10 +718,10 @@ void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
     __ block_comment("} c2i_unverified_entry");
   }
 
-  entry_address[AdapterBlob::C2I] = __ pc();
+  address c2i_entry = __ pc();
 
   // Class initialization barrier for static methods
-  entry_address[AdapterBlob::C2I_No_Clinit_Check] = nullptr;
+  address c2i_no_clinit_check_entry = nullptr;
   if (VM_Version::supports_fast_class_init_checks()) {
     Label L_skip_barrier;
 
@@ -736,13 +736,15 @@ void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
     __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
 
     __ bind(L_skip_barrier);
-    entry_address[AdapterBlob::C2I_No_Clinit_Check] = __ pc();
+    c2i_no_clinit_check_entry = __ pc();
   }
 
   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
   bs->c2i_entry_barrier(masm);
 
   gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
+
+  handler->set_entry_points(i2c_entry, c2i_entry, c2i_unverified_entry, c2i_no_clinit_check_entry);
   return;
 }
 
@@ -985,8 +987,11 @@ static void fill_continuation_entry(MacroAssembler* masm) {
 
   __ ldr(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
   __ str(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
+  __ ldr(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset()));
+  __ str(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset()));
 
   __ str(zr, Address(rthread, JavaThread::cont_fastpath_offset()));
+  __ str(zr, Address(rthread, JavaThread::held_monitor_count_offset()));
 }
 
 // on entry, sp points to the ContinuationEntry
@@ -1002,6 +1007,50 @@ static void continuation_enter_cleanup(MacroAssembler* masm) {
 #endif
   __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
   __ str(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
+
+  if (CheckJNICalls) {
+    // Check if this is a virtual thread continuation
+    Label L_skip_vthread_code;
+    __ ldrw(rscratch1, Address(sp, ContinuationEntry::flags_offset()));
+    __ cbzw(rscratch1, L_skip_vthread_code);
+
+    // If the held monitor count is > 0 and this vthread is terminating then
+    // it failed to release a JNI monitor. So we issue the same log message
+    // that JavaThread::exit does.
+    __ ldr(rscratch1, Address(rthread, JavaThread::jni_monitor_count_offset()));
+    __ cbz(rscratch1, L_skip_vthread_code);
+
+    // Save return value potentially containing the exception oop in callee-saved R19.
+    __ mov(r19, r0);
+    __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::log_jni_monitor_still_held));
+    // Restore potential return value.
+    __ mov(r0, r19);
+
+    // For vthreads we have to explicitly zero the JNI monitor count of the carrier
+    // on termination. The held count is implicitly zeroed below when we restore from
+    // the parent held count (which has to be zero).
+    __ str(zr, Address(rthread, JavaThread::jni_monitor_count_offset()));
+
+    __ bind(L_skip_vthread_code);
+  }
+#ifdef ASSERT
+  else {
+    // Check if this is a virtual thread continuation
+    Label L_skip_vthread_code;
+    __ ldrw(rscratch1, Address(sp, ContinuationEntry::flags_offset()));
+    __ cbzw(rscratch1, L_skip_vthread_code);
+
+    // See comment just above. If not checking JNI calls the JNI count is only
+    // needed for assertion checking.
+    __ str(zr, Address(rthread, JavaThread::jni_monitor_count_offset()));
+
+    __ bind(L_skip_vthread_code);
+  }
+#endif
+
+  __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset()));
+  __ str(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset()));
+
   __ ldr(rscratch2, Address(sp, ContinuationEntry::parent_offset()));
   __ str(rscratch2, Address(rthread, JavaThread::cont_entry_offset()));
   __ add(rfp, sp, (int)ContinuationEntry::size());
@@ -1714,6 +1763,9 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
   Label lock_done;
 
   if (method->is_synchronized()) {
+    Label count;
+    const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
+
     // Get the handle (the 2nd argument)
     __ mov(oop_handle_reg, c_rarg1);
 

src/hotspot/cpu/aarch64/vm_version_aarch64.cpp

@@ -1,7 +1,6 @@
 /*
  * Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2015, 2020, Red Hat Inc. All rights reserved.
- * Copyright 2025 Arm Limited and/or its affiliates.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -223,13 +222,10 @@ void VM_Version::initialize() {
   // Neoverse
   //   N1: 0xd0c
   //   N2: 0xd49
-  //   N3: 0xd8e
   //   V1: 0xd40
   //   V2: 0xd4f
-  //   V3: 0xd84
   if (_cpu == CPU_ARM && (model_is(0xd0c) || model_is(0xd49) ||
-                          model_is(0xd40) || model_is(0xd4f) ||
-                          model_is(0xd8e) || model_is(0xd84))) {
+                          model_is(0xd40) || model_is(0xd4f))) {
     if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) {
       FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true);
     }
@@ -264,9 +260,7 @@ void VM_Version::initialize() {
   // Neoverse
   //   V1: 0xd40
   //   V2: 0xd4f
-  //   V3: 0xd84
-  if (_cpu == CPU_ARM &&
-      (model_is(0xd40) || model_is(0xd4f) || model_is(0xd84))) {
+  if (_cpu == CPU_ARM && (model_is(0xd40) || model_is(0xd4f))) {
     if (FLAG_IS_DEFAULT(UseCryptoPmullForCRC32)) {
       FLAG_SET_DEFAULT(UseCryptoPmullForCRC32, true);
     }

src/hotspot/cpu/arm/arm.ad

@@ -1154,6 +1154,10 @@ RegMask Matcher::modL_proj_mask() {
   return RegMask();
 }
 
+const RegMask Matcher::method_handle_invoke_SP_save_mask() {
+  return FP_REGP_mask();
+}
+
 bool maybe_far_call(const CallNode *n) {
   return !MacroAssembler::_reachable_from_cache(n->as_Call()->entry_point());
 }
@@ -1244,6 +1248,23 @@ encode %{
     __ set_inst_mark(mark);
   %}
 
+  enc_class preserve_SP %{
+    // preserve mark
+    address mark = __ inst_mark();
+    DEBUG_ONLY(int off0 = __ offset());
+    // FP is preserved across all calls, even compiled calls.
+    // Use it to preserve SP in places where the callee might change the SP.
+    __ mov(Rmh_SP_save, SP);
+    DEBUG_ONLY(int off1 = __ offset());
+    assert(off1 - off0 == 4, "correct size prediction");
+    // restore mark
+    __ set_inst_mark(mark);
+  %}
+
+  enc_class restore_SP %{
+    __ mov(SP, Rmh_SP_save);
+  %}
+
   enc_class Java_Dynamic_Call (method meth) %{
     Register R8_ic_reg = reg_to_register_object(Matcher::inline_cache_reg_encode());
     assert(R8_ic_reg == Ricklass, "should be");
@@ -8778,6 +8799,7 @@ instruct safePoint_poll(iRegP poll, R12RegI tmp, flagsReg icc) %{
 // Call Java Static Instruction
 instruct CallStaticJavaDirect( method meth ) %{
   match(CallStaticJava);
+  predicate(! ((CallStaticJavaNode*)n)->is_method_handle_invoke());
   effect(USE meth);
 
   ins_cost(CALL_COST);
@@ -8786,6 +8808,20 @@ instruct CallStaticJavaDirect( method meth ) %{
   ins_pipe(simple_call);
 %}
 
+// Call Java Static Instruction (method handle version)
+instruct CallStaticJavaHandle( method meth ) %{
+  match(CallStaticJava);
+  predicate(((CallStaticJavaNode*)n)->is_method_handle_invoke());
+  effect(USE meth);
+  // FP is saved by all callees (for interpreter stack correction).
+  // We use it here for a similar purpose, in {preserve,restore}_FP.
+
+  ins_cost(CALL_COST);
+  format %{ "CALL,static/MethodHandle ==> " %}
+  ins_encode( SetInstMark, preserve_SP, Java_Static_Call( meth ), restore_SP, call_epilog, ClearInstMark );
+  ins_pipe(simple_call);
+%}
+
 // Call Java Dynamic Instruction
 instruct CallDynamicJavaDirect( method meth ) %{
   match(CallDynamicJava);

src/hotspot/cpu/arm/arm_32.ad

@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2008, 2025, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2008, 2024, Oracle and/or its affiliates. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
 // This code is free software; you can redistribute it and/or modify it
@@ -432,7 +432,8 @@ OptoRegPair c2::return_value(int ideal_reg) {
 
 int MachCallStaticJavaNode::ret_addr_offset() {
   bool far = (_method == nullptr) ? maybe_far_call(this) : !cache_reachable();
-  return (far ? 3 : 1) * NativeInstruction::instruction_size;
+  return ((far ? 3 : 1) + (_method_handle_invoke ? 1 : 0)) *
+    NativeInstruction::instruction_size;
 }
 
 int MachCallDynamicJavaNode::ret_addr_offset() {

src/hotspot/cpu/arm/c1_CodeStubs_arm.cpp

@@ -200,10 +200,9 @@ void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
 
 void MonitorExitStub::emit_code(LIR_Assembler* ce) {
   __ bind(_entry);
-
-  // lock_reg was destroyed by fast unlocking attempt => recompute it
-  ce->monitor_address(_monitor_ix, _lock_reg);
-
+  if (_compute_lock) {
+    ce->monitor_address(_monitor_ix, _lock_reg);
+  }
   const Register lock_reg = _lock_reg->as_pointer_register();
 
   ce->verify_reserved_argument_area_size(1);

src/hotspot/cpu/arm/c1_FrameMap_arm.cpp

@@ -174,6 +174,11 @@ LIR_Opr FrameMap::stack_pointer() {
   return FrameMap::SP_opr;
 }
 
+LIR_Opr FrameMap::method_handle_invoke_SP_save_opr() {
+  assert(Rmh_SP_save == FP, "Fix register used for saving SP for MethodHandle calls");
+  return FP_opr;
+}
+
 bool FrameMap::validate_frame() {
   int max_offset = in_bytes(framesize_in_bytes());
   int java_index = 0;

src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp

@@ -245,7 +245,7 @@ int LIR_Assembler::emit_unwind_handler() {
   MonitorExitStub* stub = nullptr;
   if (method()->is_synchronized()) {
     monitor_address(0, FrameMap::R0_opr);
-    stub = new MonitorExitStub(FrameMap::R0_opr, 0);
+    stub = new MonitorExitStub(FrameMap::R0_opr, true, 0);
     __ unlock_object(R2, R1, R0, *stub->entry());
     __ bind(*stub->continuation());
   }
@@ -2427,6 +2427,7 @@ void LIR_Assembler::emit_lock(LIR_OpLock* op) {
   Register lock = op->lock_opr()->as_pointer_register();
 
   if (op->code() == lir_lock) {
+    assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
     int null_check_offset = __ lock_object(hdr, obj, lock, *op->stub()->entry());
     if (op->info() != nullptr) {
       add_debug_info_for_null_check(null_check_offset, op->info());

src/hotspot/cpu/arm/c1_MacroAssembler_arm.cpp

@@ -176,17 +176,17 @@ void C1_MacroAssembler::allocate_array(Register obj, Register len,
   initialize_object(obj, tmp1, klass, len, tmp2, tmp3, header_size_in_bytes, -1, /* is_tlab_allocated */ UseTLAB);
 }
 
-int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register basic_lock, Label& slow_case) {
+int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
   int null_check_offset = 0;
 
   const Register tmp2 = Rtemp; // Rtemp should be free at c1 LIR level
-  assert_different_registers(hdr, obj, basic_lock, tmp2);
+  assert_different_registers(hdr, obj, disp_hdr, tmp2);
 
   assert(BasicObjectLock::lock_offset() == 0, "adjust this code");
   assert(oopDesc::mark_offset_in_bytes() == 0, "Required by atomic instructions");
 
   // save object being locked into the BasicObjectLock
-  str(obj, Address(basic_lock, BasicObjectLock::obj_offset()));
+  str(obj, Address(disp_hdr, BasicObjectLock::obj_offset()));
 
   null_check_offset = offset();
 
@@ -197,26 +197,26 @@ int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register basic_lo
     b(slow_case, ne);
   }
 
-  Register t1 = basic_lock; // Needs saving, probably
-  Register t2 = hdr;        // blow
-  Register t3 = Rtemp;      // blow
+  Register t1 = disp_hdr; // Needs saving, probably
+  Register t2 = hdr;      // blow
+  Register t3 = Rtemp;    // blow
 
   lightweight_lock(obj, t1, t2, t3, 1 /* savemask - save t1 */, slow_case);
   // Success: fall through
   return null_check_offset;
 }
 
-void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register basic_lock, Label& slow_case) {
-  assert_different_registers(hdr, obj, basic_lock, Rtemp);
+void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
+  assert_different_registers(hdr, obj, disp_hdr, Rtemp);
 
   assert(BasicObjectLock::lock_offset() == 0, "adjust this code");
   assert(oopDesc::mark_offset_in_bytes() == 0, "Required by atomic instructions");
 
-  ldr(obj, Address(basic_lock, BasicObjectLock::obj_offset()));
+  ldr(obj, Address(disp_hdr, BasicObjectLock::obj_offset()));
 
-  Register t1 = basic_lock; // Needs saving, probably
-  Register t2 = hdr;        // blow
-  Register t3 = Rtemp;      // blow
+  Register t1 = disp_hdr; // Needs saving, probably
+  Register t2 = hdr;      // blow
+  Register t3 = Rtemp;    // blow
 
   lightweight_unlock(obj, t1, t2, t3, 1 /* savemask - save t1 */, slow_case);
   // Success: fall through

src/hotspot/cpu/arm/c1_MacroAssembler_arm.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2008, 2023, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -59,9 +59,9 @@
     max_array_allocation_length = 0x01000000
   };
 
-  int lock_object(Register hdr, Register obj, Register basic_lock, Label& slow_case);
+  int lock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case);
 
-  void unlock_object(Register hdr, Register obj, Register basic_lock, Label& slow_case);
+  void unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case);
 
   // This platform only uses signal-based null checks. The Label is not needed.
   void null_check(Register r, Label *Lnull = nullptr) { MacroAssembler::null_check(r); }

src/hotspot/cpu/arm/c1_Runtime1_arm.cpp

@@ -275,6 +275,14 @@ OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address targe
 }
 
 
+static void restore_sp_for_method_handle(StubAssembler* sasm) {
+  // Restore SP from its saved reg (FP) if the exception PC is a MethodHandle call site.
+  __ ldr_s32(Rtemp, Address(Rthread, JavaThread::is_method_handle_return_offset()));
+  __ cmp(Rtemp, 0);
+  __ mov(SP, Rmh_SP_save, ne);
+}
+
+
 OopMapSet* Runtime1::generate_handle_exception(StubId id, StubAssembler* sasm) {
   __ block_comment("generate_handle_exception");
 
@@ -331,6 +339,7 @@ OopMapSet* Runtime1::generate_handle_exception(StubId id, StubAssembler* sasm) {
     break;
   case StubId::c1_handle_exception_from_callee_id:
     restore_live_registers_without_return(sasm); // must not jump immediately to handler
+    restore_sp_for_method_handle(sasm);
     __ ret();
     break;
   default:  ShouldNotReachHere();
@@ -363,6 +372,9 @@ void Runtime1::generate_unwind_exception(StubAssembler* sasm) {
   // Jump to handler
   __ verify_not_null_oop(Rexception_obj);
 
+  // JSR292 extension
+  restore_sp_for_method_handle(sasm);
+
   __ jump(R0);
 }
 

src/hotspot/cpu/arm/frame_arm.cpp

@@ -329,6 +329,56 @@ JavaThread** frame::saved_thread_address(const frame& f) {
   return nullptr;
 }
 
+//------------------------------------------------------------------------------
+// frame::verify_deopt_original_pc
+//
+// Verifies the calculated original PC of a deoptimization PC for the
+// given unextended SP.  The unextended SP might also be the saved SP
+// for MethodHandle call sites.
+#ifdef ASSERT
+void frame::verify_deopt_original_pc(nmethod* nm, intptr_t* unextended_sp, bool is_method_handle_return) {
+  frame fr;
+
+  // This is ugly but it's better than to change {get,set}_original_pc
+  // to take an SP value as argument.  And it's only a debugging
+  // method anyway.
+  fr._unextended_sp = unextended_sp;
+
+  address original_pc = nm->get_original_pc(&fr);
+  assert(nm->insts_contains_inclusive(original_pc),
+         "original PC must be in the main code section of the compiled method (or must be immediately following it)");
+  assert(nm->is_method_handle_return(original_pc) == is_method_handle_return, "must be");
+}
+#endif
+
+//------------------------------------------------------------------------------
+// frame::adjust_unextended_sp
+void frame::adjust_unextended_sp() {
+  // same as on x86
+
+  // If we are returning to a compiled MethodHandle call site, the
+  // saved_fp will in fact be a saved value of the unextended SP.  The
+  // simplest way to tell whether we are returning to such a call site
+  // is as follows:
+
+  nmethod* sender_nm = (_cb == nullptr) ? nullptr : _cb->as_nmethod_or_null();
+  if (sender_nm != nullptr) {
+    // If the sender PC is a deoptimization point, get the original
+    // PC.  For MethodHandle call site the unextended_sp is stored in
+    // saved_fp.
+    if (sender_nm->is_deopt_mh_entry(_pc)) {
+      DEBUG_ONLY(verify_deopt_mh_original_pc(sender_nm, _fp));
+      _unextended_sp = _fp;
+    }
+    else if (sender_nm->is_deopt_entry(_pc)) {
+      DEBUG_ONLY(verify_deopt_original_pc(sender_nm, _unextended_sp));
+    }
+    else if (sender_nm->is_method_handle_return(_pc)) {
+      _unextended_sp = _fp;
+    }
+  }
+}
+
 //------------------------------------------------------------------------------
 // frame::update_map_with_saved_link
 void frame::update_map_with_saved_link(RegisterMap* map, intptr_t** link_addr) {

src/hotspot/cpu/arm/frame_arm.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2008, 2024, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -85,11 +85,20 @@
   // original sp.
 
   intptr_t* _unextended_sp;
+  void adjust_unextended_sp();
 
   intptr_t* ptr_at_addr(int offset) const {
     return (intptr_t*) addr_at(offset);
   }
 
+#ifdef ASSERT
+  // Used in frame::sender_for_{interpreter,compiled}_frame
+  static void verify_deopt_original_pc(nmethod* nm, intptr_t* unextended_sp, bool is_method_handle_return = false);
+  static void verify_deopt_mh_original_pc(nmethod* nm, intptr_t* unextended_sp) {
+    verify_deopt_original_pc(nm, unextended_sp, true);
+  }
+#endif
+
  public:
   // Constructors
 

src/hotspot/cpu/arm/frame_arm.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2008, 2024, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -112,6 +112,8 @@ inline void frame::init(intptr_t* sp, intptr_t* unextended_sp, intptr_t* fp, add
 }
 
 inline void frame::setup(address pc) {
+  adjust_unextended_sp();
+
   address original_pc = get_deopt_original_pc();
   if (original_pc != nullptr) {
     _pc = original_pc;

src/hotspot/cpu/arm/gc/g1/g1BarrierSetAssembler_arm.cpp

@@ -198,18 +198,15 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
   __ bind(done);
 }
 
-static void generate_post_barrier(MacroAssembler* masm,
-                                  const Register store_addr,
-                                  const Register new_val,
-                                  const Register thread,
-                                  const Register tmp1,
-                                  const Register tmp2,
-                                  Label& done,
-                                  bool new_val_may_be_null) {
-  assert(thread == Rthread, "must be");
-  assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg);
-
+static void generate_post_barrier_fast_path(MacroAssembler* masm,
+                                            const Register store_addr,
+                                            const Register new_val,
+                                            const Register tmp1,
+                                            const Register tmp2,
+                                            Label& done,
+                                            bool new_val_may_be_null) {
   // Does store cross heap regions?
+
   __ eor(tmp1, store_addr, new_val);
   __ movs(tmp1, AsmOperand(tmp1, lsr, G1HeapRegion::LogOfHRGrainBytes));
   __ b(done, eq);
@@ -218,34 +215,76 @@ static void generate_post_barrier(MacroAssembler* masm,
   if (new_val_may_be_null) {
     __ cbz(new_val, done);
   }
+  // storing region crossing non-null, is card already dirty?
+  const Register card_addr = tmp1;
 
-  // storing region crossing non-null, is card already non-clean?
-  Address card_table_addr(thread, in_bytes(G1ThreadLocalData::card_table_base_offset()));
-  __ ldr(tmp2, card_table_addr);
-  __ add(tmp1, tmp2, AsmOperand(store_addr, lsr, CardTable::card_shift()));
+  CardTableBarrierSet* ct = barrier_set_cast<CardTableBarrierSet>(BarrierSet::barrier_set());
+  __ mov_address(tmp2, (address)ct->card_table()->byte_map_base());
+  __ add(card_addr, tmp2, AsmOperand(store_addr, lsr, CardTable::card_shift()));
 
-  if (UseCondCardMark) {
-    __ ldrb(tmp2, Address(tmp1));
-    // Instead of loading clean_card_val and comparing, we exploit the fact that
-    // the LSB of non-clean cards is always 0, and the LSB of clean cards 1.
-    __ tbz(tmp2, 0, done);
-  }
-
-  static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zero_register()");
-  __ zero_register(tmp2);
-  __ strb(tmp2, Address(tmp1));                   // *(card address) := dirty_card_val
+  __ ldrb(tmp2, Address(card_addr));
+  __ cmp(tmp2, (int)G1CardTable::g1_young_card_val());
 }
 
+static void generate_post_barrier_slow_path(MacroAssembler* masm,
+                                            const Register thread,
+                                            const Register tmp1,
+                                            const Register tmp2,
+                                            const Register tmp3,
+                                            Label& done,
+                                            Label& runtime) {
+  __ membar(MacroAssembler::Membar_mask_bits(MacroAssembler::StoreLoad), tmp2);
+  assert(CardTable::dirty_card_val() == 0, "adjust this code");
+  // card_addr is loaded by generate_post_barrier_fast_path
+  const Register card_addr = tmp1;
+  __ ldrb(tmp2, Address(card_addr));
+  __ cbz(tmp2, done);
+
+  // storing a region crossing, non-null oop, card is clean.
+  // dirty card and log.
+
+  __ strb(__ zero_register(tmp2), Address(card_addr));
+  generate_queue_test_and_insertion(masm,
+                                    G1ThreadLocalData::dirty_card_queue_index_offset(),
+                                    G1ThreadLocalData::dirty_card_queue_buffer_offset(),
+                                    runtime,
+                                    thread, card_addr, tmp2, tmp3);
+  __ b(done);
+}
+
+
 // G1 post-barrier.
 // Blows all volatile registers R0-R3,  LR).
 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
-                                                  Register store_addr,
-                                                  Register new_val,
-                                                  Register tmp1,
-                                                  Register tmp2,
-                                                  Register tmp3) {
+                                           Register store_addr,
+                                           Register new_val,
+                                           Register tmp1,
+                                           Register tmp2,
+                                           Register tmp3) {
   Label done;
-  generate_post_barrier(masm, store_addr, new_val, Rthread, tmp1, tmp2, done, true /* new_val_may_be_null */);
+  Label runtime;
+
+  generate_post_barrier_fast_path(masm, store_addr, new_val, tmp1, tmp2, done, true /* new_val_may_be_null */);
+  // If card is young, jump to done
+  // card_addr and card are loaded by generate_post_barrier_fast_path
+  const Register card      = tmp2;
+  const Register card_addr = tmp1;
+   __ b(done, eq);
+  generate_post_barrier_slow_path(masm, Rthread, card_addr, tmp2, tmp3, done, runtime);
+
+  __ bind(runtime);
+
+  RegisterSet set = RegisterSet(store_addr) | RegisterSet(R0, R3) | RegisterSet(R12);
+  __ push(set);
+
+  if (card_addr != R0) {
+    __ mov(R0, card_addr);
+  }
+  __ mov(R1, Rthread);
+  __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), R0, R1);
+
+  __ pop(set);
+
   __ bind(done);
 }
 
@@ -305,10 +344,35 @@ void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
                                                      Register tmp1,
                                                      Register tmp2,
                                                      Register tmp3,
-                                                     bool new_val_may_be_null) {
-  Label done;
-  generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, new_val_may_be_null);
-  __ bind(done);
+                                                     G1PostBarrierStubC2* stub) {
+  assert(thread == Rthread, "must be");
+  assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg);
+
+  stub->initialize_registers(thread, tmp1, tmp2, tmp3);
+
+  bool new_val_may_be_null = (stub->barrier_data() & G1C2BarrierPostNotNull) == 0;
+  generate_post_barrier_fast_path(masm, store_addr, new_val, tmp1, tmp2, *stub->continuation(), new_val_may_be_null);
+  // If card is not young, jump to stub (slow path)
+  __ b(*stub->entry(), ne);
+
+  __ bind(*stub->continuation());
+}
+
+void G1BarrierSetAssembler::generate_c2_post_barrier_stub(MacroAssembler* masm,
+                                                          G1PostBarrierStubC2* stub) const {
+  Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
+  Label runtime;
+  Register thread = stub->thread();
+  Register tmp1 = stub->tmp1(); // tmp1 holds the card address.
+  Register tmp2 = stub->tmp2();
+  Register tmp3 = stub->tmp3();
+
+  __ bind(*stub->entry());
+  generate_post_barrier_slow_path(masm, thread, tmp1, tmp2, tmp3,  *stub->continuation(), runtime);
+
+  __ bind(runtime);
+  generate_c2_barrier_runtime_call(masm, stub, tmp1, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), tmp2);
+  __ b(*stub->continuation());
 }
 
 #endif // COMPILER2
@@ -399,19 +463,20 @@ void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrier
   __ b(*stub->continuation());
 }
 
-#undef __
-
-void G1BarrierSetAssembler::g1_write_barrier_post_c1(MacroAssembler* masm,
-                                                     Register store_addr,
-                                                     Register new_val,
-                                                     Register thread,
-                                                     Register tmp1,
-                                                     Register tmp2) {
-  Label done;
-  generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
-  masm->bind(done);
+void G1BarrierSetAssembler::gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub) {
+  G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
+  __ bind(*stub->entry());
+  assert(stub->addr()->is_register(), "Precondition.");
+  assert(stub->new_val()->is_register(), "Precondition.");
+  Register new_val_reg = stub->new_val()->as_register();
+  __ cbz(new_val_reg, *stub->continuation());
+  ce->verify_reserved_argument_area_size(1);
+  __ str(stub->addr()->as_pointer_register(), Address(SP));
+  __ call(bs->post_barrier_c1_runtime_code_blob()->code_begin(), relocInfo::runtime_call_type);
+  __ b(*stub->continuation());
 }
 
+#undef __
 #define __ sasm->
 
 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
@@ -471,6 +536,102 @@ void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler*
   __ b(done);
 }
 
+void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler* sasm) {
+  // Input:
+  // - store_addr, pushed on the stack
+
+  __ set_info("g1_post_barrier_slow_id", false);
+
+  Label done;
+  Label recheck;
+  Label runtime;
+
+  Address queue_index(Rthread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()));
+  Address buffer(Rthread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset()));
+
+  AddressLiteral cardtable(ci_card_table_address_as<address>(), relocInfo::none);
+
+  // save at least the registers that need saving if the runtime is called
+  const RegisterSet saved_regs = RegisterSet(R0,R3) | RegisterSet(R12) | RegisterSet(LR);
+  const int nb_saved_regs = 6;
+  assert(nb_saved_regs == saved_regs.size(), "fix nb_saved_regs");
+  __ push(saved_regs);
+
+  const Register r_card_addr_0 = R0; // must be R0 for the slow case
+  const Register r_obj_0 = R0;
+  const Register r_card_base_1 = R1;
+  const Register r_tmp2 = R2;
+  const Register r_index_2 = R2;
+  const Register r_buffer_3 = R3;
+  const Register tmp1 = Rtemp;
+
+  __ ldr(r_obj_0, Address(SP, nb_saved_regs*wordSize));
+  // Note: there is a comment in x86 code about not using
+  // ExternalAddress / lea, due to relocation not working
+  // properly for that address. Should be OK for arm, where we
+  // explicitly specify that 'cardtable' has a relocInfo::none
+  // type.
+  __ lea(r_card_base_1, cardtable);
+  __ add(r_card_addr_0, r_card_base_1, AsmOperand(r_obj_0, lsr, CardTable::card_shift()));
+
+  // first quick check without barrier
+  __ ldrb(r_tmp2, Address(r_card_addr_0));
+
+  __ cmp(r_tmp2, (int)G1CardTable::g1_young_card_val());
+  __ b(recheck, ne);
+
+  __ bind(done);
+
+  __ pop(saved_regs);
+
+  __ ret();
+
+  __ bind(recheck);
+
+  __ membar(MacroAssembler::Membar_mask_bits(MacroAssembler::StoreLoad), tmp1);
+
+  // reload card state after the barrier that ensures the stored oop was visible
+  __ ldrb(r_tmp2, Address(r_card_addr_0));
+
+  assert(CardTable::dirty_card_val() == 0, "adjust this code");
+  __ cbz(r_tmp2, done);
+
+  // storing region crossing non-null, card is clean.
+  // dirty card and log.
+
+  assert(0 == (int)CardTable::dirty_card_val(), "adjust this code");
+  if ((ci_card_table_address_as<intptr_t>() & 0xff) == 0) {
+    // Card table is aligned so the lowest byte of the table address base is zero.
+    __ strb(r_card_base_1, Address(r_card_addr_0));
+  } else {
+    __ strb(__ zero_register(r_tmp2), Address(r_card_addr_0));
+  }
+
+  __ ldr(r_index_2, queue_index);
+  __ ldr(r_buffer_3, buffer);
+
+  __ subs(r_index_2, r_index_2, wordSize);
+  __ b(runtime, lt); // go to runtime if now negative
+
+  __ str(r_index_2, queue_index);
+
+  __ str(r_card_addr_0, Address(r_buffer_3, r_index_2));
+
+  __ b(done);
+
+  __ bind(runtime);
+
+  __ save_live_registers();
+
+  assert(r_card_addr_0 == c_rarg0, "card_addr should be in R0");
+  __ mov(c_rarg1, Rthread);
+  __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), c_rarg0, c_rarg1);
+
+  __ restore_live_registers_without_return();
+
+  __ b(done);
+}
+
 #undef __
 
 #endif // COMPILER1

src/hotspot/cpu/arm/gc/g1/g1BarrierSetAssembler_arm.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2018, 2024, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -32,7 +32,9 @@
 class LIR_Assembler;
 class StubAssembler;
 class G1PreBarrierStub;
+class G1PostBarrierStub;
 class G1PreBarrierStubC2;
+class G1PostBarrierStubC2;
 
 class G1BarrierSetAssembler: public ModRefBarrierSetAssembler {
 protected:
@@ -64,15 +66,10 @@ public:
 #ifdef COMPILER1
 public:
   void gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub);
+  void gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub);
 
   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
-
-  void g1_write_barrier_post_c1(MacroAssembler* masm,
-                                Register store_addr,
-                                Register new_val,
-                                Register thread,
-                                Register tmp1,
-                                Register tmp2);
+  void generate_c1_post_barrier_runtime_stub(StubAssembler* sasm);
 #endif
 
 #ifdef COMPILER2
@@ -92,7 +89,9 @@ public:
                                 Register tmp1,
                                 Register tmp2,
                                 Register tmp3,
-                                bool new_val_may_be_null);
+                                G1PostBarrierStubC2* c2_stub);
+  void generate_c2_post_barrier_stub(MacroAssembler* masm,
+                                     G1PostBarrierStubC2* stub) const;
 #endif
 
 };

src/hotspot/cpu/arm/gc/g1/g1_arm.ad

@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2024, 2025, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2024, Oracle and/or its affiliates. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
 // This code is free software; you can redistribute it and/or modify it
@@ -63,13 +63,13 @@ static void write_barrier_post(MacroAssembler* masm,
                                Register tmp1,
                                Register tmp2,
                                Register tmp3) {
-  if (!G1BarrierStubC2::needs_post_barrier(node)) {
+  if (!G1PostBarrierStubC2::needs_barrier(node)) {
     return;
   }
   Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
   G1BarrierSetAssembler* g1_asm = static_cast<G1BarrierSetAssembler*>(BarrierSet::barrier_set()->barrier_set_assembler());
-  bool new_val_may_be_null = G1BarrierStubC2::post_new_val_may_be_null(node);
-  g1_asm->g1_write_barrier_post_c2(masm, store_addr, new_val, Rthread, tmp1, tmp2, tmp3, new_val_may_be_null);
+  G1PostBarrierStubC2* const stub = G1PostBarrierStubC2::create(node);
+  g1_asm->g1_write_barrier_post_c2(masm, store_addr, new_val, Rthread, tmp1, tmp2, tmp3, stub);
 }
 
 %}

src/hotspot/cpu/arm/register_arm.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2008, 2024, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -364,6 +364,7 @@ class VFPSystemRegisterImpl : public AbstractRegisterImpl {
 //  This does not seem to conflict with Rexception_pc
 //  In case of issues, R3 might be OK but adapters calling the runtime would have to save it
 #define R5_mh            R5 // MethodHandle register, used during the call setup
+#define Rmh_SP_save      FP // for C1
 
 /*
  * C++ Interpreter Register Defines

src/hotspot/cpu/arm/runtime_arm.cpp

@@ -264,6 +264,11 @@ ExceptionBlob* OptoRuntime::generate_exception_blob() {
 
   __ raw_pop(FP, LR);
 
+  // Restore SP from its saved reg (FP) if the exception PC is a MethodHandle call site.
+  __ ldr(Rtemp, Address(Rthread, JavaThread::is_method_handle_return_offset()));
+  __ cmp(Rtemp, 0);
+  __ mov(SP, Rmh_SP_save, ne);
+
   // R0 contains handler address
   // Since this may be the deopt blob we must set R5 to look like we returned
   // from the original pc that threw the exception

src/hotspot/cpu/arm/sharedRuntime_arm.cpp

@@ -617,11 +617,11 @@ void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
                                             int comp_args_on_stack,
                                             const BasicType *sig_bt,
                                             const VMRegPair *regs,
-                                            address entry_address[AdapterBlob::ENTRY_COUNT]) {
-  entry_address[AdapterBlob::I2C] = __ pc();
+                                            AdapterHandlerEntry* handler) {
+  address i2c_entry = __ pc();
   gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
 
-  entry_address[AdapterBlob::C2I_Unverified] = __ pc();
+  address c2i_unverified_entry = __ pc();
   Label skip_fixup;
   const Register receiver       = R0;
   const Register holder_klass   = Rtemp; // XXX should be OK for C2 but not 100% sure
@@ -634,9 +634,10 @@ void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
   __ b(skip_fixup, eq);
   __ jump(SharedRuntime::get_ic_miss_stub(), relocInfo::runtime_call_type, noreg, ne);
 
-  entry_address[AdapterBlob::C2I] = __ pc();
-  entry_address[AdapterBlob::C2I_No_Clinit_Check] = nullptr;
+  address c2i_entry = __ pc();
   gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
+
+  handler->set_entry_points(i2c_entry, c2i_entry, c2i_unverified_entry, nullptr);
   return;
 }
 
@@ -1128,7 +1129,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
 
   const Register sync_handle = R5;
   const Register sync_obj    = R6;
-  const Register basic_lock  = altFP_7_11;
+  const Register disp_hdr    = altFP_7_11;
   const Register tmp         = R8;
 
   Label slow_lock, lock_done, fast_lock;
@@ -1139,7 +1140,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
     __ mov(sync_handle, R1);
 
     log_trace(fastlock)("SharedRuntime lock fast");
-    __ lightweight_lock(sync_obj /* object */, basic_lock /* t1 */, tmp /* t2 */, Rtemp /* t3 */,
+    __ lightweight_lock(sync_obj /* object */, disp_hdr /* t1 */, tmp /* t2 */, Rtemp /* t3 */,
                         0x7 /* savemask */, slow_lock);
       // Fall through to lock_done
     __ bind(lock_done);
@@ -1254,7 +1255,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
 
     // last_Java_frame is already set, so do call_VM manually; no exception can occur
     __ mov(R0, sync_obj);
-    __ mov(R1, basic_lock);
+    __ mov(R1, disp_hdr);
     __ mov(R2, Rthread);
     __ call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C));
 
@@ -1269,12 +1270,12 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
 
     // Clear pending exception before reentering VM.
     // Can store the oop in register since it is a leaf call.
-    assert_different_registers(Rtmp_save1, sync_obj, basic_lock);
+    assert_different_registers(Rtmp_save1, sync_obj, disp_hdr);
     __ ldr(Rtmp_save1, Address(Rthread, Thread::pending_exception_offset()));
     Register zero = __ zero_register(Rtemp);
     __ str(zero, Address(Rthread, Thread::pending_exception_offset()));
     __ mov(R0, sync_obj);
-    __ mov(R1, basic_lock);
+    __ mov(R1, disp_hdr);
     __ mov(R2, Rthread);
     __ call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C));
     __ str(Rtmp_save1, Address(Rthread, Thread::pending_exception_offset()));

src/hotspot/cpu/ppc/c1_CodeStubs_ppc.cpp

@@ -268,10 +268,9 @@ void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
 
 void MonitorExitStub::emit_code(LIR_Assembler* ce) {
   __ bind(_entry);
-
-  // lock_reg was destroyed by fast unlocking attempt => recompute it
-  ce->monitor_address(_monitor_ix, _lock_reg);
-
+  if (_compute_lock) {
+    ce->monitor_address(_monitor_ix, _lock_reg);
+  }
   address stub = Runtime1::entry_for(ce->compilation()->has_fpu_code() ? StubId::c1_monitorexit_id : StubId::c1_monitorexit_nofpu_id);
   //__ load_const_optimized(R0, stub);
   __ add_const_optimized(R0, R29_TOC, MacroAssembler::offset_to_global_toc(stub));

src/hotspot/cpu/ppc/c1_FrameMap_ppc.cpp

@@ -374,6 +374,15 @@ LIR_Opr FrameMap::stack_pointer() {
   return SP_opr;
 }
 
+
+// JSR 292
+// On PPC64, there is no need to save the SP, because neither
+// method handle intrinsics, nor compiled lambda forms modify it.
+LIR_Opr FrameMap::method_handle_invoke_SP_save_opr() {
+  return LIR_OprFact::illegalOpr;
+}
+
+
 bool FrameMap::validate_frame() {
   int max_offset = in_bytes(framesize_in_bytes());
   int java_index = 0;

src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp

@@ -227,7 +227,7 @@ int LIR_Assembler::emit_unwind_handler() {
   MonitorExitStub* stub = nullptr;
   if (method()->is_synchronized()) {
     monitor_address(0, FrameMap::R4_opr);
-    stub = new MonitorExitStub(FrameMap::R4_opr, 0);
+    stub = new MonitorExitStub(FrameMap::R4_opr, true, 0);
     __ unlock_object(R5, R6, R4, *stub->entry());
     __ bind(*stub->continuation());
   }
@@ -2614,6 +2614,7 @@ void LIR_Assembler::emit_lock(LIR_OpLock* op) {
   // Obj may not be an oop.
   if (op->code() == lir_lock) {
     MonitorEnterStub* stub = (MonitorEnterStub*)op->stub();
+    assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
     // Add debug info for NullPointerException only if one is possible.
     if (op->info() != nullptr) {
       if (!os::zero_page_read_protected() || !ImplicitNullChecks) {
@@ -2625,6 +2626,7 @@ void LIR_Assembler::emit_lock(LIR_OpLock* op) {
     __ lock_object(hdr, obj, lock, op->scratch_opr()->as_register(), *op->stub()->entry());
   } else {
     assert (op->code() == lir_unlock, "Invalid code, expected lir_unlock");
+    assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
     __ unlock_object(hdr, obj, lock, *op->stub()->entry());
   }
   __ bind(*op->stub()->continuation());

src/hotspot/cpu/ppc/gc/g1/g1BarrierSetAssembler_ppc.cpp

@@ -28,6 +28,7 @@
 #include "gc/g1/g1BarrierSetAssembler.hpp"
 #include "gc/g1/g1BarrierSetRuntime.hpp"
 #include "gc/g1/g1CardTable.hpp"
+#include "gc/g1/g1DirtyCardQueue.hpp"
 #include "gc/g1/g1HeapRegion.hpp"
 #include "gc/g1/g1SATBMarkQueueSet.hpp"
 #include "gc/g1/g1ThreadLocalData.hpp"
@@ -229,52 +230,78 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm, Decorator
   __ bind(filtered);
 }
 
-static void generate_post_barrier(MacroAssembler* masm,
-                                  const Register store_addr,
-                                  const Register new_val,
-                                  const Register thread,
-                                  const Register tmp1,
-                                  const Register tmp2,
-                                  Label& done,
-                                  bool new_val_may_be_null) {
-  assert_different_registers(store_addr, new_val, tmp1, R0);
-  assert_different_registers(store_addr, tmp1, tmp2, R0);
+static void generate_region_crossing_test(MacroAssembler* masm, const Register store_addr, const Register new_val) {
+  __ xorr(R0, store_addr, new_val);                  // tmp1 := store address ^ new value
+  __ srdi_(R0, R0, G1HeapRegion::LogOfHRGrainBytes); // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
+}
 
-  __ xorr(R0, store_addr, new_val);                          // R0 := store address ^ new value
-  __ srdi_(R0, R0, G1HeapRegion::LogOfHRGrainBytes);         // R0 := ((store address ^ new value) >> LogOfHRGrainBytes)
-  __ beq(CR0, done);
+static Address generate_card_young_test(MacroAssembler* masm, const Register store_addr, const Register tmp1, const Register tmp2) {
+  CardTableBarrierSet* ct = barrier_set_cast<CardTableBarrierSet>(BarrierSet::barrier_set());
+  __ load_const_optimized(tmp1, (address)(ct->card_table()->byte_map_base()), tmp2);
+  __ srdi(tmp2, store_addr, CardTable::card_shift());        // tmp1 := card address relative to card table base
+  __ lbzx(R0, tmp1, tmp2);                                   // tmp1 := card address
+  __ cmpwi(CR0, R0, (int)G1CardTable::g1_young_card_val());
+  return Address(tmp1, tmp2); // return card address
+}
 
-  // Crosses regions, storing null?
-  if (!new_val_may_be_null) {
-#ifdef ASSERT
-    __ cmpdi(CR0, new_val, 0);
-    __ asm_assert_ne("null oop not allowed (G1 post)");      // Checked by caller.
-#endif
-  } else {
-    __ cmpdi(CR0, new_val, 0);
-    __ beq(CR0, done);
-  }
-
-  __ ld(tmp1, G1ThreadLocalData::card_table_base_offset(), thread);
-  __ srdi(tmp2, store_addr, CardTable::card_shift());        // tmp2 := card address relative to card table base
-  if (UseCondCardMark) {
-    __ lbzx(R0, tmp1, tmp2);
-    __ cmpwi(CR0, R0, (int)G1CardTable::clean_card_val());
-    __ bne(CR0, done);
-  }
-
-  __ li(R0, G1CardTable::dirty_card_val());
-  __ stbx(R0, tmp1, tmp2);
+static void generate_card_dirty_test(MacroAssembler* masm, Address card_addr) {
+  __ membar(Assembler::StoreLoad);                        // Must reload after StoreLoad membar due to concurrent refinement
+  __ lbzx(R0, card_addr.base(), card_addr.index());       // tmp2 := card
+  __ cmpwi(CR0, R0, (int)G1CardTable::dirty_card_val()); // tmp2 := card == dirty_card_val?
 }
 
 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm, DecoratorSet decorators,
                                                   Register store_addr, Register new_val,
-                                                  Register tmp1, Register tmp2) {
+                                                  Register tmp1, Register tmp2, Register tmp3,
+                                                  MacroAssembler::PreservationLevel preservation_level) {
   bool not_null = (decorators & IS_NOT_NULL) != 0;
 
-  Label done;
-  generate_post_barrier(masm, store_addr, new_val, R16_thread, tmp1, tmp2, done, !not_null);
-  __ bind(done);
+  Label runtime, filtered;
+  assert_different_registers(store_addr, new_val, tmp1, tmp2);
+
+  CardTableBarrierSet* ct = barrier_set_cast<CardTableBarrierSet>(BarrierSet::barrier_set());
+
+  generate_region_crossing_test(masm, store_addr, new_val);
+  __ beq(CR0, filtered);
+
+  // Crosses regions, storing null?
+  if (not_null) {
+#ifdef ASSERT
+    __ cmpdi(CR0, new_val, 0);
+    __ asm_assert_ne("null oop not allowed (G1 post)"); // Checked by caller.
+#endif
+  } else {
+    __ cmpdi(CR0, new_val, 0);
+    __ beq(CR0, filtered);
+  }
+
+  Address card_addr = generate_card_young_test(masm, store_addr, tmp1, tmp2);
+  __ beq(CR0, filtered);
+
+  generate_card_dirty_test(masm, card_addr);
+  __ beq(CR0, filtered);
+
+  __ li(R0, (int)G1CardTable::dirty_card_val());
+  __ stbx(R0, card_addr.base(), card_addr.index()); // *(card address) := dirty_card_val
+
+  Register Rcard_addr = tmp3;
+  __ add(Rcard_addr, card_addr.base(), card_addr.index()); // This is the address which needs to get enqueued.
+
+  generate_queue_insertion(masm,
+                           G1ThreadLocalData::dirty_card_queue_index_offset(),
+                           G1ThreadLocalData::dirty_card_queue_buffer_offset(),
+                           runtime, Rcard_addr, tmp1);
+  __ b(filtered);
+
+  __ bind(runtime);
+
+  assert(preservation_level == MacroAssembler::PRESERVATION_NONE,
+         "g1_write_barrier_post doesn't support preservation levels higher than PRESERVATION_NONE");
+
+  // Save the live input values.
+  __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), Rcard_addr, R16_thread);
+
+  __ bind(filtered);
 }
 
 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
@@ -306,7 +333,8 @@ void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet deco
     }
     g1_write_barrier_post(masm, decorators,
                           base, val,
-                          tmp1, tmp2);
+                          tmp1, tmp2, tmp3,
+                          preservation_level);
   }
 }
 
@@ -429,29 +457,70 @@ void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
                                                      Register new_val,
                                                      Register tmp1,
                                                      Register tmp2,
-                                                     bool new_val_may_be_null,
+                                                     G1PostBarrierStubC2* stub,
                                                      bool decode_new_val) {
   assert_different_registers(store_addr, new_val, tmp1, R0);
   assert_different_registers(store_addr, tmp1, tmp2, R0);
 
-  Label done;
+  stub->initialize_registers(R16_thread, tmp1, tmp2);
 
+  bool null_check_required = (stub->barrier_data() & G1C2BarrierPostNotNull) == 0;
   Register new_val_decoded = new_val;
 
   if (decode_new_val) {
     assert(UseCompressedOops, "or should not be here");
-    if (new_val_may_be_null && CompressedOops::base() != nullptr) {
+    if (null_check_required && CompressedOops::base() != nullptr) {
       // We prefer doing the null check after the region crossing check.
       // Only compressed oop modes with base != null require a null check here.
       __ cmpwi(CR0, new_val, 0);
-      __ beq(CR0, done);
-      new_val_may_be_null = false;
+      __ beq(CR0, *stub->continuation());
+      null_check_required = false;
     }
     new_val_decoded = __ decode_heap_oop_not_null(tmp2, new_val);
   }
 
-  generate_post_barrier(masm, store_addr, new_val_decoded, R16_thread, tmp1, tmp2, done, new_val_may_be_null);
-  __ bind(done);
+  generate_region_crossing_test(masm, store_addr, new_val_decoded);
+  __ beq(CR0, *stub->continuation());
+
+  // crosses regions, storing null?
+  if (null_check_required) {
+    __ cmpdi(CR0, new_val_decoded, 0);
+    __ beq(CR0, *stub->continuation());
+  }
+
+  Address card_addr = generate_card_young_test(masm, store_addr, tmp1, tmp2);
+  assert(card_addr.base() == tmp1 && card_addr.index() == tmp2, "needed by post barrier stub");
+  __ bc_far_optimized(Assembler::bcondCRbiIs0, __ bi0(CR0, Assembler::equal), *stub->entry());
+
+  __ bind(*stub->continuation());
+}
+
+void G1BarrierSetAssembler::generate_c2_post_barrier_stub(MacroAssembler* masm,
+                                                          G1PostBarrierStubC2* stub) const {
+  Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
+  Label runtime;
+  Address card_addr(stub->tmp1(), stub->tmp2()); // See above.
+
+  __ bind(*stub->entry());
+
+  generate_card_dirty_test(masm, card_addr);
+  __ bc_far_optimized(Assembler::bcondCRbiIs1, __ bi0(CR0, Assembler::equal), *stub->continuation());
+
+  __ li(R0, (int)G1CardTable::dirty_card_val());
+  __ stbx(R0, card_addr.base(), card_addr.index()); // *(card address) := dirty_card_val
+
+  Register Rcard_addr = stub->tmp1();
+  __ add(Rcard_addr, card_addr.base(), card_addr.index()); // This is the address which needs to get enqueued.
+
+  generate_queue_insertion(masm,
+                           G1ThreadLocalData::dirty_card_queue_index_offset(),
+                           G1ThreadLocalData::dirty_card_queue_buffer_offset(),
+                           runtime, Rcard_addr, stub->tmp2());
+  __ b(*stub->continuation());
+
+  __ bind(runtime);
+  generate_c2_barrier_runtime_call(masm, stub, Rcard_addr, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry));
+  __ b(*stub->continuation());
 }
 
 #endif // COMPILER2
@@ -489,19 +558,28 @@ void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrier
   __ b(*stub->continuation());
 }
 
-#undef __
+void G1BarrierSetAssembler::gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub) {
+  G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
+  __ bind(*stub->entry());
 
-void G1BarrierSetAssembler::g1_write_barrier_post_c1(MacroAssembler* masm,
-                                                     Register store_addr,
-                                                     Register new_val,
-                                                     Register thread,
-                                                     Register tmp1,
-                                                     Register tmp2) {
-  Label done;
-  generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
-  masm->bind(done);
+  assert(stub->addr()->is_register(), "Precondition.");
+  assert(stub->new_val()->is_register(), "Precondition.");
+  Register addr_reg = stub->addr()->as_pointer_register();
+  Register new_val_reg = stub->new_val()->as_register();
+
+  __ cmpdi(CR0, new_val_reg, 0);
+  __ bc_far_optimized(Assembler::bcondCRbiIs1, __ bi0(CR0, Assembler::equal), *stub->continuation());
+
+  address c_code = bs->post_barrier_c1_runtime_code_blob()->code_begin();
+  //__ load_const_optimized(R0, c_code);
+  __ add_const_optimized(R0, R29_TOC, MacroAssembler::offset_to_global_toc(c_code));
+  __ mtctr(R0);
+  __ mr(R0, addr_reg); // Pass addr in R0.
+  __ bctrl();
+  __ b(*stub->continuation());
 }
 
+#undef __
 #define __ sasm->
 
 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
@@ -564,6 +642,86 @@ void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler*
   __ b(restart);
 }
 
+void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler* sasm) {
+  G1BarrierSet* bs = barrier_set_cast<G1BarrierSet>(BarrierSet::barrier_set());
+
+  __ set_info("g1_post_barrier_slow_id", false);
+
+  // Using stack slots: spill addr, spill tmp2
+  const int stack_slots = 2;
+  Register tmp = R0;
+  Register addr = R14;
+  Register tmp2 = R15;
+  CardTable::CardValue* byte_map_base = bs->card_table()->byte_map_base();
+
+  Label restart, refill, ret;
+
+  // Spill
+  __ std(addr, -8, R1_SP);
+  __ std(tmp2, -16, R1_SP);
+
+  __ srdi(addr, R0, CardTable::card_shift()); // Addr is passed in R0.
+  __ load_const_optimized(/*cardtable*/ tmp2, byte_map_base, tmp);
+  __ add(addr, tmp2, addr);
+  __ lbz(tmp, 0, addr); // tmp := [addr + cardtable]
+
+  // Return if young card.
+  __ cmpwi(CR0, tmp, G1CardTable::g1_young_card_val());
+  __ beq(CR0, ret);
+
+  // Return if sequential consistent value is already dirty.
+  __ membar(Assembler::StoreLoad);
+  __ lbz(tmp, 0, addr); // tmp := [addr + cardtable]
+
+  __ cmpwi(CR0, tmp, G1CardTable::dirty_card_val());
+  __ beq(CR0, ret);
+
+  // Not dirty.
+
+  // First, dirty it.
+  __ li(tmp, G1CardTable::dirty_card_val());
+  __ stb(tmp, 0, addr);
+
+  int dirty_card_q_index_byte_offset = in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset());
+  int dirty_card_q_buf_byte_offset = in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset());
+
+  __ bind(restart);
+
+  // Get the index into the update buffer. G1DirtyCardQueue::_index is
+  // a size_t so ld_ptr is appropriate here.
+  __ ld(tmp2, dirty_card_q_index_byte_offset, R16_thread);
+
+  // index == 0?
+  __ cmpdi(CR0, tmp2, 0);
+  __ beq(CR0, refill);
+
+  __ ld(tmp, dirty_card_q_buf_byte_offset, R16_thread);
+  __ addi(tmp2, tmp2, -oopSize);
+
+  __ std(tmp2, dirty_card_q_index_byte_offset, R16_thread);
+  __ add(tmp2, tmp, tmp2);
+  __ std(addr, 0, tmp2); // [_buf + index] := <address_of_card>
+
+  // Restore temp registers and return-from-leaf.
+  __ bind(ret);
+  __ ld(tmp2, -16, R1_SP);
+  __ ld(addr, -8, R1_SP);
+  __ blr();
+
+  __ bind(refill);
+  const int nbytes_save = (MacroAssembler::num_volatile_regs + stack_slots) * BytesPerWord;
+  __ save_volatile_gprs(R1_SP, -nbytes_save); // except R0
+  __ mflr(R0);
+  __ std(R0, _abi0(lr), R1_SP);
+  __ push_frame_reg_args(nbytes_save, R0); // dummy frame for C call
+  __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1DirtyCardQueueSet::handle_zero_index_for_thread), R16_thread);
+  __ pop_frame();
+  __ ld(R0, _abi0(lr), R1_SP);
+  __ mtlr(R0);
+  __ restore_volatile_gprs(R1_SP, -nbytes_save); // except R0
+  __ b(restart);
+}
+
 #undef __
 
 #endif // COMPILER1

src/hotspot/cpu/ppc/gc/g1/g1BarrierSetAssembler_ppc.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2018, 2024, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2018, 2021 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -37,7 +37,9 @@
 class LIR_Assembler;
 class StubAssembler;
 class G1PreBarrierStub;
+class G1PostBarrierStub;
 class G1PreBarrierStubC2;
+class G1PostBarrierStubC2;
 
 class G1BarrierSetAssembler: public ModRefBarrierSetAssembler {
 protected:
@@ -54,7 +56,8 @@ protected:
                             MacroAssembler::PreservationLevel preservation_level);
   void g1_write_barrier_post(MacroAssembler* masm, DecoratorSet decorators,
                              Register store_addr, Register new_val,
-                             Register tmp1, Register tmp2);
+                             Register tmp1, Register tmp2, Register tmp3,
+                             MacroAssembler::PreservationLevel preservation_level);
 
   virtual void oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
                             Register base, RegisterOrConstant ind_or_offs, Register val,
@@ -76,21 +79,17 @@ public:
                                 Register new_val,
                                 Register tmp1,
                                 Register tmp2,
-                                bool new_val_may_be_null,
+                                G1PostBarrierStubC2* c2_stub,
                                 bool decode_new_val);
+  void generate_c2_post_barrier_stub(MacroAssembler* masm,
+                                     G1PostBarrierStubC2* stub) const;
 #endif
 #ifdef COMPILER1
   void gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub);
+  void gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub);
 
   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
-
-  void g1_write_barrier_post_c1(MacroAssembler* masm,
-                                Register store_addr,
-                                Register new_val,
-                                Register thread,
-                                Register tmp1,
-                                Register tmp2);
-
+  void generate_c1_post_barrier_runtime_stub(StubAssembler* sasm);
 #endif
 
   virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,

src/hotspot/cpu/ppc/gc/g1/g1_ppc.ad

@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2024, 2025, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2025, Oracle and/or its affiliates. All rights reserved.
 // Copyright (c) 2025 SAP SE. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
@@ -64,13 +64,13 @@ static void post_write_barrier(MacroAssembler* masm,
                                Register tmp1,
                                Register tmp2,
                                bool decode_new_val = false) {
-  if (!G1BarrierStubC2::needs_post_barrier(node)) {
+  if (!G1PostBarrierStubC2::needs_barrier(node)) {
     return;
   }
   Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
   G1BarrierSetAssembler* g1_asm = static_cast<G1BarrierSetAssembler*>(BarrierSet::barrier_set()->barrier_set_assembler());
-  bool new_val_may_be_null = G1BarrierStubC2::post_new_val_may_be_null(node);
-  g1_asm->g1_write_barrier_post_c2(masm, store_addr, new_val, tmp1, tmp2, new_val_may_be_null, decode_new_val);
+  G1PostBarrierStubC2* const stub = G1PostBarrierStubC2::create(node);
+  g1_asm->g1_write_barrier_post_c2(masm, store_addr, new_val, tmp1, tmp2, stub, decode_new_val);
 }
 
 %}

src/hotspot/cpu/ppc/gc/z/zBarrierSetAssembler_ppc.cpp

@@ -114,6 +114,7 @@ public:
   }
 };
 
+
 void ZBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
                                    Register base, RegisterOrConstant ind_or_offs, Register dst,
                                    Register tmp1, Register tmp2,
@@ -560,6 +561,7 @@ void ZBarrierSetAssembler::generate_conjoint_oop_copy(MacroAssembler* masm, bool
   copy_store_at_slow(masm, R4_ARG2, tmp, store_bad, store_good, dest_uninitialized);
 }
 
+
 // Verify a colored pointer.
 void ZBarrierSetAssembler::check_oop(MacroAssembler *masm, Register obj, const char* msg) {
   if (!VerifyOops) {
@@ -581,6 +583,7 @@ void ZBarrierSetAssembler::check_oop(MacroAssembler *masm, Register obj, const c
   __ bind(done);
 }
 
+
 void ZBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register dst, Register jni_env,
                                                          Register obj, Register tmp, Label& slowpath) {
   __ block_comment("try_resolve_jobject_in_native (zgc) {");

src/hotspot/cpu/ppc/globalDefinitions_ppc.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1999, 2024, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2012, 2016 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -43,6 +43,8 @@ const bool CCallingConventionRequiresIntsAsLongs = true;
 
 #define SUPPORTS_NATIVE_CX8
 
+#define SUPPORT_MONITOR_COUNT
+
 // PPC64 is not specified as multi-copy-atomic
 // So we must not #define CPU_MULTI_COPY_ATOMIC
 

src/hotspot/cpu/ppc/nativeInst_ppc.cpp

@@ -402,7 +402,7 @@ void NativePostCallNop::make_deopt() {
 bool NativePostCallNop::patch(int32_t oopmap_slot, int32_t cb_offset) {
   int32_t i2, i1;
   assert(is_aligned(cb_offset, 4), "cb offset alignment does not match instruction alignment");
-  assert(!decode(i1, i2) || NMethodRelocation, "already patched");
+  assert(!decode(i1, i2), "already patched");
 
   cb_offset = cb_offset >> 2;
   if (((oopmap_slot & ppc_oopmap_slot_mask) != oopmap_slot) || ((cb_offset & ppc_cb_offset_mask) != cb_offset)) {

src/hotspot/cpu/ppc/ppc.ad

@@ -2473,6 +2473,10 @@ RegMask Matcher::modL_proj_mask() {
   return RegMask();
 }
 
+const RegMask Matcher::method_handle_invoke_SP_save_mask() {
+  return RegMask();
+}
+
 %}
 
 //----------ENCODING BLOCK-----------------------------------------------------
@@ -3430,6 +3434,7 @@ encode %{
 
     // Create the call node.
     CallDynamicJavaDirectSchedNode *call = new CallDynamicJavaDirectSchedNode();
+    call->_method_handle_invoke = _method_handle_invoke;
     call->_vtable_index      = _vtable_index;
     call->_method            = _method;
     call->_optimized_virtual = _optimized_virtual;

src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp

@@ -1199,11 +1199,16 @@ void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
                                             int comp_args_on_stack,
                                             const BasicType *sig_bt,
                                             const VMRegPair *regs,
-                                            address entry_address[AdapterBlob::ENTRY_COUNT]) {
+                                            AdapterHandlerEntry* handler) {
+  address i2c_entry;
+  address c2i_unverified_entry;
+  address c2i_entry;
+
+
   // entry: i2c
 
   __ align(CodeEntryAlignment);
-  entry_address[AdapterBlob::I2C] = __ pc();
+  i2c_entry = __ pc();
   gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
 
 
@@ -1211,7 +1216,7 @@ void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
 
   __ align(CodeEntryAlignment);
   BLOCK_COMMENT("c2i unverified entry");
-  entry_address[AdapterBlob::C2I_Unverified] = __ pc();
+  c2i_unverified_entry = __ pc();
 
   // inline_cache contains a CompiledICData
   const Register ic             = R19_inline_cache_reg;
@@ -1239,10 +1244,10 @@ void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
 
   // entry: c2i
 
-  entry_address[AdapterBlob::C2I] = __ pc();
+  c2i_entry = __ pc();
 
   // Class initialization barrier for static methods
-  entry_address[AdapterBlob::C2I_No_Clinit_Check] = nullptr;
+  address c2i_no_clinit_check_entry = nullptr;
   if (VM_Version::supports_fast_class_init_checks()) {
     Label L_skip_barrier;
 
@@ -1261,13 +1266,15 @@ void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
     __ bctr();
 
     __ bind(L_skip_barrier);
-    entry_address[AdapterBlob::C2I_No_Clinit_Check] = __ pc();
+    c2i_no_clinit_check_entry = __ pc();
   }
 
   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
   bs->c2i_entry_barrier(masm, /* tmp register*/ ic_klass, /* tmp register*/ receiver_klass, /* tmp register*/ code);
 
   gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, call_interpreter, ientry);
+
+  handler->set_entry_points(i2c_entry, c2i_entry, c2i_unverified_entry, c2i_no_clinit_check_entry);
   return;
 }
 
@@ -1639,6 +1646,7 @@ static void fill_continuation_entry(MacroAssembler* masm, Register reg_cont_obj,
   assert_different_registers(reg_cont_obj, reg_flags);
   Register zero = R8_ARG6;
   Register tmp2 = R9_ARG7;
+  Register tmp3 = R10_ARG8;
 
   DEBUG_ONLY(__ block_comment("fill {"));
 #ifdef ASSERT
@@ -1654,9 +1662,12 @@ static void fill_continuation_entry(MacroAssembler* masm, Register reg_cont_obj,
   __ stw(zero, in_bytes(ContinuationEntry::pin_count_offset()), R1_SP);
 
   __ ld_ptr(tmp2, JavaThread::cont_fastpath_offset(), R16_thread);
+  __ ld(tmp3, in_bytes(JavaThread::held_monitor_count_offset()), R16_thread);
   __ st_ptr(tmp2, ContinuationEntry::parent_cont_fastpath_offset(), R1_SP);
+  __ std(tmp3, in_bytes(ContinuationEntry::parent_held_monitor_count_offset()), R1_SP);
 
   __ st_ptr(zero, JavaThread::cont_fastpath_offset(), R16_thread);
+  __ std(zero, in_bytes(JavaThread::held_monitor_count_offset()), R16_thread);
   DEBUG_ONLY(__ block_comment("} fill"));
 }
 
@@ -1677,6 +1688,7 @@ static void fill_continuation_entry(MacroAssembler* masm, Register reg_cont_obj,
 static void continuation_enter_cleanup(MacroAssembler* masm) {
   Register tmp1 = R8_ARG6;
   Register tmp2 = R9_ARG7;
+  Register tmp3 = R10_ARG8;
 
 #ifdef ASSERT
   __ block_comment("clean {");
@@ -1687,8 +1699,57 @@ static void continuation_enter_cleanup(MacroAssembler* masm) {
 
   __ ld_ptr(tmp1, ContinuationEntry::parent_cont_fastpath_offset(), R1_SP);
   __ st_ptr(tmp1, JavaThread::cont_fastpath_offset(), R16_thread);
-  __ ld_ptr(tmp2, ContinuationEntry::parent_offset(), R1_SP);
-  __ st_ptr(tmp2, JavaThread::cont_entry_offset(), R16_thread);
+
+  if (CheckJNICalls) {
+    // Check if this is a virtual thread continuation
+    Label L_skip_vthread_code;
+    __ lwz(R0, in_bytes(ContinuationEntry::flags_offset()), R1_SP);
+    __ cmpwi(CR0, R0, 0);
+    __ beq(CR0, L_skip_vthread_code);
+
+    // If the held monitor count is > 0 and this vthread is terminating then
+    // it failed to release a JNI monitor. So we issue the same log message
+    // that JavaThread::exit does.
+    __ ld(R0, in_bytes(JavaThread::jni_monitor_count_offset()), R16_thread);
+    __ cmpdi(CR0, R0, 0);
+    __ beq(CR0, L_skip_vthread_code);
+
+    // Save return value potentially containing the exception oop
+    Register ex_oop = R15_esp;   // nonvolatile register
+    __ mr(ex_oop, R3_RET);
+    __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::log_jni_monitor_still_held));
+    // Restore potental return value
+    __ mr(R3_RET, ex_oop);
+
+    // For vthreads we have to explicitly zero the JNI monitor count of the carrier
+    // on termination. The held count is implicitly zeroed below when we restore from
+    // the parent held count (which has to be zero).
+    __ li(tmp1, 0);
+    __ std(tmp1, in_bytes(JavaThread::jni_monitor_count_offset()), R16_thread);
+
+    __ bind(L_skip_vthread_code);
+  }
+#ifdef ASSERT
+  else {
+    // Check if this is a virtual thread continuation
+    Label L_skip_vthread_code;
+    __ lwz(R0, in_bytes(ContinuationEntry::flags_offset()), R1_SP);
+    __ cmpwi(CR0, R0, 0);
+    __ beq(CR0, L_skip_vthread_code);
+
+    // See comment just above. If not checking JNI calls the JNI count is only
+    // needed for assertion checking.
+    __ li(tmp1, 0);
+    __ std(tmp1, in_bytes(JavaThread::jni_monitor_count_offset()), R16_thread);
+
+    __ bind(L_skip_vthread_code);
+  }
+#endif
+
+  __ ld(tmp2, in_bytes(ContinuationEntry::parent_held_monitor_count_offset()), R1_SP);
+  __ ld_ptr(tmp3, ContinuationEntry::parent_offset(), R1_SP);
+  __ std(tmp2, in_bytes(JavaThread::held_monitor_count_offset()), R16_thread);
+  __ st_ptr(tmp3, JavaThread::cont_entry_offset(), R16_thread);
   DEBUG_ONLY(__ block_comment("} clean"));
 }
 

src/hotspot/cpu/riscv/assembler_riscv.hpp

@@ -914,17 +914,6 @@ protected:
 
  public:
 
-  static uint32_t encode_csrrw(Register Rd, const uint32_t csr, Register Rs1) {
-    guarantee(is_uimm12(csr), "csr is invalid");
-    uint32_t insn = 0;
-    patch((address)&insn, 6, 0, 0b1110011);
-    patch((address)&insn, 14, 12, 0b001);
-    patch_reg((address)&insn, 7, Rd);
-    patch_reg((address)&insn, 15, Rs1);
-    patch((address)&insn, 31, 20, csr);
-    return insn;
-  }
-
   static uint32_t encode_jal(Register Rd, const int32_t offset) {
     guarantee(is_simm21(offset) && ((offset % 2) == 0), "offset is invalid.");
     uint32_t insn = 0;
@@ -3704,15 +3693,19 @@ public:
 // --------------------------
 // Upper Immediate Instruction
 // --------------------------
-  void lui(Register Rd, int32_t imm) {
-    /* lui -> c.lui */
-    if (do_compress() && (Rd != x0 && Rd != x2 && imm != 0 && is_simm18(imm))) {
-      c_lui(Rd, imm);
-      return;
-    }
-    _lui(Rd, imm);
+#define INSN(NAME)                                                                           \
+  void NAME(Register Rd, int32_t imm) {                                                      \
+    /* lui -> c.lui */                                                                       \
+    if (do_compress() && (Rd != x0 && Rd != x2 && imm != 0 && is_simm18(imm))) {             \
+      c_lui(Rd, imm);                                                                        \
+      return;                                                                                \
+    }                                                                                        \
+    _lui(Rd, imm);                                                                           \
   }
 
+  INSN(lui);
+
+#undef INSN
 
 // Cache Management Operations
 // These instruction may be turned off for user space.

src/hotspot/cpu/riscv/c1_CodeStubs_riscv.cpp

@@ -204,10 +204,10 @@ void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
 
 void MonitorExitStub::emit_code(LIR_Assembler* ce) {
   __ bind(_entry);
-
-  // lock_reg was destroyed by fast unlocking attempt => recompute it
-  ce->monitor_address(_monitor_ix, _lock_reg);
-
+  if (_compute_lock) {
+    // lock_reg was destroyed by fast unlocking attempt => recompute it
+    ce->monitor_address(_monitor_ix, _lock_reg);
+  }
   ce->store_parameter(_lock_reg->as_register(), 0);
   // note: non-blocking leaf routine => no call info needed
   StubId exit_id;

src/hotspot/cpu/riscv/c1_FrameMap_riscv.cpp

@@ -377,6 +377,11 @@ LIR_Opr FrameMap::stack_pointer() {
   return FrameMap::sp_opr;
 }
 
+// JSR 292
+LIR_Opr FrameMap::method_handle_invoke_SP_save_opr() {
+  return LIR_OprFact::illegalOpr;  // Not needed on riscv
+}
+
 bool FrameMap::validate_frame() {
   return true;
 }

src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp

@@ -338,7 +338,7 @@ int LIR_Assembler::emit_unwind_handler() {
   MonitorExitStub* stub = nullptr;
   if (method()->is_synchronized()) {
     monitor_address(0, FrameMap::r10_opr);
-    stub = new MonitorExitStub(FrameMap::r10_opr, 0);
+    stub = new MonitorExitStub(FrameMap::r10_opr, true, 0);
     __ unlock_object(x15, x14, x10, x16, *stub->entry());
     __ bind(*stub->continuation());
   }
@@ -1350,7 +1350,6 @@ void LIR_Assembler::align_call(LIR_Code code) {
 }
 
 void LIR_Assembler::call(LIR_OpJavaCall* op, relocInfo::relocType rtype) {
-  Assembler::IncompressibleScope scope(_masm);
   address call = __ reloc_call(Address(op->addr(), rtype));
   if (call == nullptr) {
     bailout("reloc call address stub overflow");
@@ -1361,7 +1360,6 @@ void LIR_Assembler::call(LIR_OpJavaCall* op, relocInfo::relocType rtype) {
 }
 
 void LIR_Assembler::ic_call(LIR_OpJavaCall* op) {
-  Assembler::IncompressibleScope scope(_masm);
   address call = __ ic_call(op->addr());
   if (call == nullptr) {
     bailout("reloc call address stub overflow");
@@ -1496,12 +1494,14 @@ void LIR_Assembler::emit_lock(LIR_OpLock* op) {
   Register lock = op->lock_opr()->as_register();
   Register temp = op->scratch_opr()->as_register();
   if (op->code() == lir_lock) {
+    assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
     // add debug info for NullPointerException only if one is possible
     int null_check_offset = __ lock_object(hdr, obj, lock, temp, *op->stub()->entry());
     if (op->info() != nullptr) {
       add_debug_info_for_null_check(null_check_offset, op->info());
     }
   } else if (op->code() == lir_unlock) {
+    assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
     __ unlock_object(hdr, obj, lock, temp, *op->stub()->entry());
   } else {
     Unimplemented();
@@ -1844,10 +1844,6 @@ void LIR_Assembler::leal(LIR_Opr addr, LIR_Opr dest, LIR_PatchCode patch_code, C
 void LIR_Assembler::rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info) {
   assert(!tmp->is_valid(), "don't need temporary");
 
-  Assembler::IncompressibleScope scope(_masm);
-  // Post call nops must be natural aligned due to cmodx rules.
-  align_call(lir_rtcall);
-
   __ rt_call(dest);
 
   if (info != nullptr) {

src/hotspot/cpu/riscv/c1_MacroAssembler_riscv.cpp

@@ -48,27 +48,27 @@ void C1_MacroAssembler::float_cmp(bool is_float, int unordered_result,
   }
 }
 
-int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register basic_lock, Register temp, Label& slow_case) {
-  assert_different_registers(hdr, obj, basic_lock, temp, t0, t1);
+int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Register temp, Label& slow_case) {
+  assert_different_registers(hdr, obj, disp_hdr, temp, t0, t1);
   int null_check_offset = -1;
 
   verify_oop(obj);
 
   // save object being locked into the BasicObjectLock
-  sd(obj, Address(basic_lock, BasicObjectLock::obj_offset()));
+  sd(obj, Address(disp_hdr, BasicObjectLock::obj_offset()));
 
   null_check_offset = offset();
 
-  lightweight_lock(basic_lock, obj, hdr, temp, t1, slow_case);
+  lightweight_lock(disp_hdr, obj, hdr, temp, t1, slow_case);
 
   return null_check_offset;
 }
 
-void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register basic_lock, Register temp, Label& slow_case) {
-  assert_different_registers(hdr, obj, basic_lock, temp, t0, t1);
+void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Register temp, Label& slow_case) {
+  assert_different_registers(hdr, obj, disp_hdr, temp, t0, t1);
 
   // load object
-  ld(obj, Address(basic_lock, BasicObjectLock::obj_offset()));
+  ld(obj, Address(disp_hdr, BasicObjectLock::obj_offset()));
   verify_oop(obj);
 
   lightweight_unlock(obj, hdr, temp, t1, slow_case);

src/hotspot/cpu/riscv/c1_MacroAssembler_riscv.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1999, 2024, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
  * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
@@ -56,19 +56,19 @@ using MacroAssembler::null_check;
                  Register result);
 
   // locking
-  // hdr       : must be x10, contents destroyed
-  // obj       : must point to the object to lock, contents preserved
-  // basic_lock: must point to the basic_lock, contents preserved
-  // temp      : temporary register, must not be scratch register t0 or t1
+  // hdr     : must be x10, contents destroyed
+  // obj     : must point to the object to lock, contents preserved
+  // disp_hdr: must point to the displaced header location, contents preserved
+  // temp : temporary register, must not be scratch register t0 or t1
   // returns code offset at which to add null check debug information
-  int lock_object(Register swap, Register obj, Register basic_lock, Register temp, Label& slow_case);
+  int lock_object(Register swap, Register obj, Register disp_hdr, Register temp, Label& slow_case);
 
   // unlocking
-  // hdr       : contents destroyed
-  // obj       : must point to the object to lock, contents preserved
-  // basic_lock: must be x10 & must point to the basic lock, contents destroyed
-  // temp      : temporary register, must not be scratch register t0 or t1
-  void unlock_object(Register swap, Register obj, Register basic_lock, Register temp, Label& slow_case);
+  // hdr     : contents destroyed
+  // obj     : must point to the object to lock, contents preserved
+  // disp_hdr: must be x10 & must point to the displaced header location, contents destroyed
+  // temp : temporary register, must not be scratch register t0 or t1
+  void unlock_object(Register swap, Register obj, Register lock, Register temp, Label& slow_case);
 
   void initialize_object(
     Register obj,                      // result: pointer to object after successful allocation

src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp

@@ -1687,7 +1687,6 @@ void C2_MacroAssembler::arrays_hashcode(Register ary, Register cnt, Register res
                                         Register tmp4, Register tmp5, Register tmp6,
                                         BasicType eltype)
 {
-  assert(!UseRVV, "sanity");
   assert_different_registers(ary, cnt, result, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, t0, t1);
 
   const int elsize = arrays_hashcode_elsize(eltype);
@@ -1760,143 +1759,29 @@ void C2_MacroAssembler::arrays_hashcode(Register ary, Register cnt, Register res
   BLOCK_COMMENT("} // arrays_hashcode");
 }
 
-void C2_MacroAssembler::arrays_hashcode_v(Register ary, Register cnt, Register result,
-                                          Register tmp1, Register tmp2, Register tmp3,
-                                          BasicType eltype)
-{
-  assert(UseRVV, "sanity");
-  assert(StubRoutines::riscv::arrays_hashcode_powers_of_31() != nullptr, "sanity");
-  assert_different_registers(ary, cnt, result, tmp1, tmp2, tmp3, t0, t1);
-
-  // The MaxVectorSize should have been set by detecting RVV max vector register
-  // size when check UseRVV (i.e. MaxVectorSize == VM_Version::_initial_vector_length).
-  // Let's use T_INT as all hashCode calculations eventually deal with ints.
-  const int lmul = 2;
-  const int stride = MaxVectorSize / sizeof(jint) * lmul;
-
-  const int elsize_bytes = arrays_hashcode_elsize(eltype);
-  const int elsize_shift = exact_log2(elsize_bytes);
-
-  switch (eltype) {
-    case T_BOOLEAN: BLOCK_COMMENT("arrays_hashcode_v(unsigned byte) {"); break;
-    case T_CHAR:    BLOCK_COMMENT("arrays_hashcode_v(char) {");          break;
-    case T_BYTE:    BLOCK_COMMENT("arrays_hashcode_v(byte) {");          break;
-    case T_SHORT:   BLOCK_COMMENT("arrays_hashcode_v(short) {");         break;
-    case T_INT:     BLOCK_COMMENT("arrays_hashcode_v(int) {");           break;
-    default:
-      ShouldNotReachHere();
-  }
-
-  const Register pow31_highest = tmp1;
-  const Register ary_end       = tmp2;
-  const Register consumed      = tmp3;
-
-  const VectorRegister v_sum    = v2;
-  const VectorRegister v_src    = v4;
-  const VectorRegister v_coeffs = v6;
-  const VectorRegister v_tmp    = v8;
-
-  const address adr_pows31 = StubRoutines::riscv::arrays_hashcode_powers_of_31()
-                           + sizeof(jint);
-  Label VEC_LOOP, DONE, SCALAR_TAIL, SCALAR_TAIL_LOOP;
-
-  // NB: at this point (a) 'result' already has some value,
-  // (b) 'cnt' is not 0 or 1, see java code for details.
-
-  andi(t0, cnt, ~(stride - 1));
-  beqz(t0, SCALAR_TAIL);
-
-  la(t1, ExternalAddress(adr_pows31));
-  lw(pow31_highest, Address(t1, -1 * sizeof(jint)));
-
-  vsetvli(consumed, cnt, Assembler::e32, Assembler::m2);
-  vle32_v(v_coeffs, t1); // 31^^(stride - 1) ... 31^^0
-  vmv_v_x(v_sum, x0);
-
-  bind(VEC_LOOP);
-  arrays_hashcode_elload_v(v_src, v_tmp, ary, eltype);
-  vmul_vv(v_src, v_src, v_coeffs);
-  vmadd_vx(v_sum, pow31_highest, v_src);
-  mulw(result, result, pow31_highest);
-  shadd(ary, consumed, ary, t0, elsize_shift);
-  subw(cnt, cnt, consumed);
-  andi(t1, cnt, ~(stride - 1));
-  bnez(t1, VEC_LOOP);
-
-  vmv_s_x(v_tmp, x0);
-  vredsum_vs(v_sum, v_sum, v_tmp);
-  vmv_x_s(t0, v_sum);
-  addw(result, result, t0);
-  beqz(cnt, DONE);
-
-  bind(SCALAR_TAIL);
-  shadd(ary_end, cnt, ary, t0, elsize_shift);
-
-  bind(SCALAR_TAIL_LOOP);
-  arrays_hashcode_elload(t0, Address(ary), eltype);
-  slli(t1, result, 5);      // optimize 31 * result
-  subw(result, t1, result); // with result<<5 - result
-  addw(result, result, t0);
-  addi(ary, ary, elsize_bytes);
-  bne(ary, ary_end, SCALAR_TAIL_LOOP);
-
-  bind(DONE);
-  BLOCK_COMMENT("} // arrays_hashcode_v");
-}
-
 int C2_MacroAssembler::arrays_hashcode_elsize(BasicType eltype) {
   switch (eltype) {
-    case T_BOOLEAN: return sizeof(jboolean);
-    case T_BYTE:    return sizeof(jbyte);
-    case T_SHORT:   return sizeof(jshort);
-    case T_CHAR:    return sizeof(jchar);
-    case T_INT:     return sizeof(jint);
-    default:
-      ShouldNotReachHere();
-      return -1;
+  case T_BOOLEAN: return sizeof(jboolean);
+  case T_BYTE:    return sizeof(jbyte);
+  case T_SHORT:   return sizeof(jshort);
+  case T_CHAR:    return sizeof(jchar);
+  case T_INT:     return sizeof(jint);
+  default:
+    ShouldNotReachHere();
+    return -1;
   }
 }
 
 void C2_MacroAssembler::arrays_hashcode_elload(Register dst, Address src, BasicType eltype) {
   switch (eltype) {
-    // T_BOOLEAN used as surrogate for unsigned byte
-    case T_BOOLEAN: lbu(dst, src);   break;
-    case T_BYTE:     lb(dst, src);   break;
-    case T_SHORT:    lh(dst, src);   break;
-    case T_CHAR:    lhu(dst, src);   break;
-    case T_INT:      lw(dst, src);   break;
-    default:
-      ShouldNotReachHere();
-  }
-}
-
-void C2_MacroAssembler::arrays_hashcode_elload_v(VectorRegister vdst,
-                                                 VectorRegister vtmp,
-                                                 Register src,
-                                                 BasicType eltype) {
-  assert_different_registers(vdst, vtmp);
-  switch (eltype) {
-    case T_BOOLEAN:
-      vle8_v(vtmp, src);
-      vzext_vf4(vdst, vtmp);
-      break;
-    case T_BYTE:
-      vle8_v(vtmp, src);
-      vsext_vf4(vdst, vtmp);
-      break;
-    case T_CHAR:
-      vle16_v(vtmp, src);
-      vzext_vf2(vdst, vtmp);
-      break;
-    case T_SHORT:
-      vle16_v(vtmp, src);
-      vsext_vf2(vdst, vtmp);
-      break;
-    case T_INT:
-      vle32_v(vdst, src);
-      break;
-    default:
-      ShouldNotReachHere();
+  // T_BOOLEAN used as surrogate for unsigned byte
+  case T_BOOLEAN: lbu(dst, src);   break;
+  case T_BYTE:     lb(dst, src);   break;
+  case T_SHORT:    lh(dst, src);   break;
+  case T_CHAR:    lhu(dst, src);   break;
+  case T_INT:      lw(dst, src);   break;
+  default:
+    ShouldNotReachHere();
   }
 }
 

src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.hpp

@@ -92,15 +92,11 @@
                        Register tmp3, Register tmp4,
                        Register tmp5, Register tmp6,
                        BasicType eltype);
+
+  // helper function for arrays_hashcode
   int arrays_hashcode_elsize(BasicType eltype);
   void arrays_hashcode_elload(Register dst, Address src, BasicType eltype);
 
-  void arrays_hashcode_v(Register ary, Register cnt, Register result,
-                         Register tmp1, Register tmp2, Register tmp3,
-                         BasicType eltype);
-  void arrays_hashcode_elload_v(VectorRegister vdst, VectorRegister vtmp,
-                                Register src, BasicType eltype);
-
   void string_equals(Register r1, Register r2,
                      Register result, Register cnt1);
 

src/hotspot/cpu/riscv/frame_riscv.cpp

@@ -217,7 +217,8 @@ bool frame::safe_for_sender(JavaThread *thread) {
 
     nmethod* nm = sender_blob->as_nmethod_or_null();
     if (nm != nullptr) {
-      if (nm->is_deopt_entry(sender_pc) || nm->method()->is_method_handle_intrinsic()) {
+      if (nm->is_deopt_mh_entry(sender_pc) || nm->is_deopt_entry(sender_pc) ||
+          nm->method()->is_method_handle_intrinsic()) {
         return false;
       }
     }
@@ -426,6 +427,49 @@ JavaThread** frame::saved_thread_address(const frame& f) {
   return thread_addr;
 }
 
+//------------------------------------------------------------------------------
+// frame::verify_deopt_original_pc
+//
+// Verifies the calculated original PC of a deoptimization PC for the
+// given unextended SP.
+#ifdef ASSERT
+void frame::verify_deopt_original_pc(nmethod* nm, intptr_t* unextended_sp) {
+  frame fr;
+
+  // This is ugly but it's better than to change {get,set}_original_pc
+  // to take an SP value as argument.  And it's only a debugging
+  // method anyway.
+  fr._unextended_sp = unextended_sp;
+
+  assert_cond(nm != nullptr);
+  address original_pc = nm->get_original_pc(&fr);
+  assert(nm->insts_contains_inclusive(original_pc),
+         "original PC must be in the main code section of the compiled method (or must be immediately following it)");
+}
+#endif
+
+//------------------------------------------------------------------------------
+// frame::adjust_unextended_sp
+#ifdef ASSERT
+void frame::adjust_unextended_sp() {
+  // On riscv, sites calling method handle intrinsics and lambda forms are treated
+  // as any other call site. Therefore, no special action is needed when we are
+  // returning to any of these call sites.
+
+  if (_cb != nullptr) {
+    nmethod* sender_nm = _cb->as_nmethod_or_null();
+    if (sender_nm != nullptr) {
+      // If the sender PC is a deoptimization point, get the original PC.
+      if (sender_nm->is_deopt_entry(_pc) ||
+          sender_nm->is_deopt_mh_entry(_pc)) {
+        verify_deopt_original_pc(sender_nm, _unextended_sp);
+      }
+    }
+  }
+}
+#endif
+
+
 //------------------------------------------------------------------------------
 // frame::sender_for_interpreter_frame
 frame frame::sender_for_interpreter_frame(RegisterMap* map) const {

src/hotspot/cpu/riscv/frame_riscv.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2024, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -179,10 +179,17 @@
     int _offset_unextended_sp; // for use in stack-chunk frames
   };
 
+  void adjust_unextended_sp() NOT_DEBUG_RETURN;
+
   intptr_t* ptr_at_addr(int offset) const {
     return (intptr_t*) addr_at(offset);
   }
 
+#ifdef ASSERT
+  // Used in frame::sender_for_{interpreter,compiled}_frame
+  static void verify_deopt_original_pc(nmethod* nm, intptr_t* unextended_sp);
+#endif
+
  public:
   // Constructors
 

src/hotspot/cpu/riscv/frame_riscv.inline.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2024, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  * Copyright (c) 2020, 2023, Huawei Technologies Co., Ltd. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
@@ -114,6 +114,8 @@ inline void frame::init(intptr_t* ptr_sp, intptr_t* ptr_fp, address pc) {
 }
 
 inline void frame::setup(address pc) {
+  adjust_unextended_sp();
+
   address original_pc = get_deopt_original_pc();
   if (original_pc != nullptr) {
     _pc = original_pc;
@@ -213,6 +215,7 @@ inline frame::frame(intptr_t* ptr_sp, intptr_t* ptr_fp) {
   // value.
 
   _cb = CodeCache::find_blob(_pc);
+  adjust_unextended_sp();
 
   address original_pc = get_deopt_original_pc();
   if (original_pc != nullptr) {

src/hotspot/cpu/riscv/gc/g1/g1BarrierSetAssembler_riscv.cpp

@@ -87,54 +87,15 @@ void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm
   }
 }
 
-void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm,
-                                                             DecoratorSet decorators,
-                                                             Register start,
-                                                             Register count,
-                                                             Register tmp,
-                                                             RegSet saved_regs) {
+void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
+                                                             Register start, Register count, Register tmp, RegSet saved_regs) {
+  __ push_reg(saved_regs, sp);
   assert_different_registers(start, count, tmp);
-
-  Label loop, next, done;
-
-  // Zero count? Nothing to do.
-  __ beqz(count, done);
-
-  // Calculate the number of card marks to set. Since the object might start and
-  // end within a card, we need to calculate this via the card table indexes of
-  // the actual start and last addresses covered by the object.
-  // Temporarily use the count register for the last element address.
-  __ shadd(count, count, start, tmp, LogBytesPerHeapOop); // end = start + count << LogBytesPerHeapOop
-  __ subi(count, count, BytesPerHeapOop);                 // Use last element address for end.
-
-  __ srli(start, start, CardTable::card_shift());
-  __ srli(count, count, CardTable::card_shift());
-  __ sub(count, count, start);                            // Number of bytes to mark - 1.
-
-  // Add card table base offset to start.
-  Address card_table_address(xthread, G1ThreadLocalData::card_table_base_offset());
-  __ ld(tmp, card_table_address);
-  __ add(start, start, tmp);
-
-  __ bind(loop);
-  if (UseCondCardMark) {
-    __ add(tmp, start, count);
-    __ lbu(tmp, Address(tmp, 0));
-    static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
-    __ subi(tmp, tmp, G1CardTable::clean_card_val()); // Convert to clean_card_value() to a comparison
-                                                      // against zero to avoid use of an extra temp.
-    __ bnez(tmp, next);
-  }
-
-  __ add(tmp, start, count);
-  static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
-  __ sb(zr, Address(tmp, 0));
-
-  __ bind(next);
-  __ subi(count, count, 1);
-  __ bgez(count, loop);
-
-  __ bind(done);
+  assert_different_registers(c_rarg0, count);
+  __ mv(c_rarg0, start);
+  __ mv(c_rarg1, count);
+  __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), 2);
+  __ pop_reg(saved_regs, sp);
 }
 
 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
@@ -228,40 +189,47 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
 
 }
 
-static void generate_post_barrier(MacroAssembler* masm,
-                                  const Register store_addr,
-                                  const Register new_val,
-                                  const Register thread,
-                                  const Register tmp1,
-                                  const Register tmp2,
-                                  Label& done,
-                                  bool new_val_may_be_null) {
-  assert(thread == xthread, "must be");
-  assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg);
+static void generate_post_barrier_fast_path(MacroAssembler* masm,
+                                            const Register store_addr,
+                                            const Register new_val,
+                                            const Register tmp1,
+                                            const Register tmp2,
+                                            Label& done,
+                                            bool new_val_may_be_null) {
   // Does store cross heap regions?
   __ xorr(tmp1, store_addr, new_val);                    // tmp1 := store address ^ new value
   __ srli(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes);  // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
   __ beqz(tmp1, done);
-
   // Crosses regions, storing null?
   if (new_val_may_be_null) {
     __ beqz(new_val, done);
   }
-  // Storing region crossing non-null, is card clean?
+  // Storing region crossing non-null, is card young?
   __ srli(tmp1, store_addr, CardTable::card_shift());    // tmp1 := card address relative to card table base
-
-  Address card_table_address(xthread, G1ThreadLocalData::card_table_base_offset());
-  __ ld(tmp2, card_table_address);                       // tmp2 := card table base address
+  __ load_byte_map_base(tmp2);                           // tmp2 := card table base address
   __ add(tmp1, tmp1, tmp2);                              // tmp1 := card address
-  if (UseCondCardMark) {
-    static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
-    __ lbu(tmp2, Address(tmp1, 0));                      // tmp2 := card
-    __ subi(tmp2, tmp2, G1CardTable::clean_card_val());  // Convert to clean_card_value() to a comparison
-                                                         // against zero to avoid use of an extra temp.
-    __ bnez(tmp2, done);
-  }
-  static_assert((uint)G1CardTable::dirty_card_val() == 0, "must be to use zr");
-  __ sb(zr, Address(tmp1, 0));
+  __ lbu(tmp2, Address(tmp1));                           // tmp2 := card
+}
+
+static void generate_post_barrier_slow_path(MacroAssembler* masm,
+                                            const Register thread,
+                                            const Register tmp1,
+                                            const Register tmp2,
+                                            Label& done,
+                                            Label& runtime) {
+  __ membar(MacroAssembler::StoreLoad);  // StoreLoad membar
+  __ lbu(tmp2, Address(tmp1));           // tmp2 := card
+  __ beqz(tmp2, done, true);
+  // Storing a region crossing, non-null oop, card is clean.
+  // Dirty card and log.
+  STATIC_ASSERT(CardTable::dirty_card_val() == 0);
+  __ sb(zr, Address(tmp1));       // *(card address) := dirty_card_val
+  generate_queue_test_and_insertion(masm,
+                                    G1ThreadLocalData::dirty_card_queue_index_offset(),
+                                    G1ThreadLocalData::dirty_card_queue_buffer_offset(),
+                                    runtime,
+                                    thread, tmp1, tmp2, t0);
+  __ j(done);
 }
 
 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
@@ -270,8 +238,27 @@ void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
                                                   Register thread,
                                                   Register tmp1,
                                                   Register tmp2) {
+  assert(thread == xthread, "must be");
+  assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, t0);
+  assert(store_addr != noreg && new_val != noreg && tmp1 != noreg && tmp2 != noreg,
+         "expecting a register");
+
   Label done;
-  generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
+  Label runtime;
+
+  generate_post_barrier_fast_path(masm, store_addr, new_val, tmp1, tmp2, done, true /* new_val_may_be_null */);
+  // If card is young, jump to done (tmp2 holds the card value)
+  __ mv(t0, (int)G1CardTable::g1_young_card_val());
+  __ beq(tmp2, t0, done);   // card == young_card_val?
+  generate_post_barrier_slow_path(masm, thread, tmp1, tmp2, done, runtime);
+
+  __ bind(runtime);
+  // save the live input values
+  RegSet saved = RegSet::of(store_addr);
+  __ push_reg(saved, sp);
+  __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), tmp1, thread);
+  __ pop_reg(saved, sp);
+
   __ bind(done);
 }
 
@@ -331,10 +318,37 @@ void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
                                                      Register thread,
                                                      Register tmp1,
                                                      Register tmp2,
-                                                     bool new_val_may_be_null) {
-  Label done;
-  generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, new_val_may_be_null);
-  __ bind(done);
+                                                     G1PostBarrierStubC2* stub) {
+  assert(thread == xthread, "must be");
+  assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, t0);
+  assert(store_addr != noreg && new_val != noreg && tmp1 != noreg && tmp2 != noreg,
+         "expecting a register");
+
+  stub->initialize_registers(thread, tmp1, tmp2);
+
+  bool new_val_may_be_null = (stub->barrier_data() & G1C2BarrierPostNotNull) == 0;
+  generate_post_barrier_fast_path(masm, store_addr, new_val, tmp1, tmp2, *stub->continuation(), new_val_may_be_null);
+  // If card is not young, jump to stub (slow path) (tmp2 holds the card value)
+  __ mv(t0, (int)G1CardTable::g1_young_card_val());
+  __ bne(tmp2, t0, *stub->entry(), true);
+
+  __ bind(*stub->continuation());
+}
+
+void G1BarrierSetAssembler::generate_c2_post_barrier_stub(MacroAssembler* masm,
+                                                          G1PostBarrierStubC2* stub) const {
+  Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
+  Label runtime;
+  Register thread = stub->thread();
+  Register tmp1 = stub->tmp1(); // tmp1 holds the card address.
+  Register tmp2 = stub->tmp2();
+
+  __ bind(*stub->entry());
+  generate_post_barrier_slow_path(masm, thread, tmp1, tmp2, *stub->continuation(), runtime);
+
+  __ bind(runtime);
+  generate_c2_barrier_runtime_call(masm, stub, tmp1, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry));
+  __ j(*stub->continuation());
 }
 
 #endif // COMPILER2
@@ -429,19 +443,20 @@ void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrier
   __ j(*stub->continuation());
 }
 
-#undef __
-
-void G1BarrierSetAssembler::g1_write_barrier_post_c1(MacroAssembler* masm,
-                                                     Register store_addr,
-                                                     Register new_val,
-                                                     Register thread,
-                                                     Register tmp1,
-                                                     Register tmp2) {
-  Label done;
-  generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
-  masm->bind(done);
+void G1BarrierSetAssembler::gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub) {
+  G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
+  __ bind(*stub->entry());
+  assert(stub->addr()->is_register(), "Precondition");
+  assert(stub->new_val()->is_register(), "Precondition");
+  Register new_val_reg = stub->new_val()->as_register();
+  __ beqz(new_val_reg, *stub->continuation(), /* is_far */ true);
+  ce->store_parameter(stub->addr()->as_pointer_register(), 0);
+  __ far_call(RuntimeAddress(bs->post_barrier_c1_runtime_code_blob()->code_begin()));
+  __ j(*stub->continuation());
 }
 
+#undef __
+
 #define __ sasm->
 
 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
@@ -492,6 +507,74 @@ void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler*
   __ epilogue();
 }
 
+void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler* sasm) {
+  __ prologue("g1_post_barrier", false);
+
+  // arg0 : store_address
+  Address store_addr(fp, 2 * BytesPerWord); // 2 BytesPerWord from fp
+
+  BarrierSet* bs = BarrierSet::barrier_set();
+  CardTableBarrierSet* ctbs = barrier_set_cast<CardTableBarrierSet>(bs);
+
+  Label done;
+  Label runtime;
+
+  // At this point we know new_value is non-null and the new_value crosses regions.
+  // Must check to see if card is already dirty
+  const Register thread = xthread;
+
+  Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()));
+  Address buffer(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset()));
+
+  const Register card_offset = t1;
+  // RA is free here, so we can use it to hold the byte_map_base.
+  const Register byte_map_base = ra;
+
+  assert_different_registers(card_offset, byte_map_base, t0);
+
+  __ load_parameter(0, card_offset);
+  __ srli(card_offset, card_offset, CardTable::card_shift());
+  __ load_byte_map_base(byte_map_base);
+
+  // Convert card offset into an address in card_addr
+  Register card_addr = card_offset;
+  __ add(card_addr, byte_map_base, card_addr);
+
+  __ lbu(t0, Address(card_addr, 0));
+  __ sub(t0, t0, (int)G1CardTable::g1_young_card_val());
+  __ beqz(t0, done);
+
+  assert((int)CardTable::dirty_card_val() == 0, "must be 0");
+
+  __ membar(MacroAssembler::StoreLoad);
+  __ lbu(t0, Address(card_addr, 0));
+  __ beqz(t0, done);
+
+  // storing region crossing non-null, card is clean.
+  // dirty card and log.
+  __ sb(zr, Address(card_addr, 0));
+
+  __ ld(t0, queue_index);
+  __ beqz(t0, runtime);
+  __ subi(t0, t0, wordSize);
+  __ sd(t0, queue_index);
+
+  // Reuse RA to hold buffer_addr
+  const Register buffer_addr = ra;
+
+  __ ld(buffer_addr, buffer);
+  __ add(t0, buffer_addr, t0);
+  __ sd(card_addr, Address(t0, 0));
+  __ j(done);
+
+  __ bind(runtime);
+  __ push_call_clobbered_registers();
+  __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
+  __ pop_call_clobbered_registers();
+  __ bind(done);
+  __ epilogue();
+}
+
 #undef __
 
 #endif // COMPILER1

src/hotspot/cpu/riscv/gc/g1/g1BarrierSetAssembler_riscv.hpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018, 2025, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2018, 2024, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2020, 2024, Huawei Technologies Co., Ltd. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -35,7 +35,9 @@ class LIR_Assembler;
 #endif
 class StubAssembler;
 class G1PreBarrierStub;
+class G1PostBarrierStub;
 class G1PreBarrierStubC2;
+class G1PostBarrierStubC2;
 
 class G1BarrierSetAssembler: public ModRefBarrierSetAssembler {
 protected:
@@ -66,16 +68,10 @@ protected:
 public:
 #ifdef COMPILER1
   void gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub);
+  void gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub);
 
   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
-
-  void g1_write_barrier_post_c1(MacroAssembler* masm,
-                                Register store_addr,
-                                Register new_val,
-                                Register thread,
-                                Register tmp1,
-                                Register tmp2);
-
+  void generate_c1_post_barrier_runtime_stub(StubAssembler* sasm);
 #endif
 
 #ifdef COMPILER2
@@ -94,7 +90,9 @@ public:
                                 Register thread,
                                 Register tmp1,
                                 Register tmp2,
-                                bool new_val_may_be_null);
+                                G1PostBarrierStubC2* c2_stub);
+  void generate_c2_post_barrier_stub(MacroAssembler* masm,
+                                     G1PostBarrierStubC2* stub) const;
 #endif
 
   void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,

src/hotspot/cpu/riscv/gc/g1/g1_riscv.ad

@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2024, 2025, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2024, Oracle and/or its affiliates. All rights reserved.
 // Copyright (c) 2024, Huawei Technologies Co., Ltd. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
@@ -63,13 +63,13 @@ static void write_barrier_post(MacroAssembler* masm,
                                Register new_val,
                                Register tmp1,
                                Register tmp2) {
-  if (!G1BarrierStubC2::needs_post_barrier(node)) {
+  if (!G1PostBarrierStubC2::needs_barrier(node)) {
     return;
   }
   Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
   G1BarrierSetAssembler* g1_asm = static_cast<G1BarrierSetAssembler*>(BarrierSet::barrier_set()->barrier_set_assembler());
-  bool new_val_may_be_null = G1BarrierStubC2::post_new_val_may_be_null(node);
-  g1_asm->g1_write_barrier_post_c2(masm, store_addr, new_val, xthread, tmp1, tmp2, new_val_may_be_null);
+  G1PostBarrierStubC2* const stub = G1PostBarrierStubC2::create(node);
+  g1_asm->g1_write_barrier_post_c2(masm, store_addr, new_val, xthread, tmp1, tmp2, stub);
 }
 
 %}