forked from OERV-BSP/u-boot
Legacy SPI flash devices used a 24-bit (3-byte) addressing scheme, limiting the addressable memory to 16 MB. To support larger densities (256 Mbit and higher), extended addressing schemes, such as 32-bit (4-byte) addressing, were introduced. If the flash density exceeds 16 MB and CONFIG_SPI_FLASH_BAR is disabled, the device will use a 4-byte addressing mode. Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20250707043738.795179-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
6.6 KiB
6.6 KiB