forked from OERV-BSP/u-boot
85cfabe895
These operations rely on a customized M-mode CSR, MHCR, which isn't available when running in S mode. Let's fallback to the generic weak stub when running in S mode to avoid illegal accesses. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
35 lines
652 B
C
35 lines
652 B
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (c) 2025 Yao Zi <ziyao@disroot.org>
|
|
*/
|
|
|
|
#include <asm/io.h>
|
|
#include <cpu_func.h>
|
|
#include <linux/bitops.h>
|
|
|
|
#define CSR_MHCR 0x7c1
|
|
#define CSR_MHCR_IE BIT(0)
|
|
#define CSR_MHCR_DE BIT(1)
|
|
|
|
#if CONFIG_IS_ENABLED(RISCV_MMODE)
|
|
void icache_enable(void)
|
|
{
|
|
csr_write(CSR_MHCR, csr_read(CSR_MHCR) | CSR_MHCR_IE);
|
|
}
|
|
|
|
void dcache_enable(void)
|
|
{
|
|
csr_write(CSR_MHCR, csr_read(CSR_MHCR) | CSR_MHCR_DE);
|
|
}
|
|
|
|
int icache_status(void)
|
|
{
|
|
return (csr_read(CSR_MHCR) & CSR_MHCR_IE) != 0;
|
|
}
|
|
|
|
int dcache_status(void)
|
|
{
|
|
return (csr_read(CSR_MHCR) & CSR_MHCR_DE) != 0;
|
|
}
|
|
#endif /* CONFIG_IS_ENABLED(RISCV_MMODE) */
|