The mini u-boot is getting exception because of an initial
stack pointer address is used at near the top of memory,
and while executing u-boot is assigned pre-malloc and
global_data memory after initial stack pointer and updated
the stack pointer. Serial driver is used pre-malloc area
for serial operations before relocation. But pre-malloc area
is cleared while doing BSS at relocation time. The u-boot is
called board_init() function and doing printf, relocation serial
driver is not initialized yet, so it is using before relocation
serial operations but it is cleared by BSS and got the exception.
To fix, change an initial stack pointer address from near the
top of memory to near the relocation memory.
Fixes: 685874939a ("configs: versal: update initial stack pointer")
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250407134544.3951763-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add support for loading the secure & non-secure pdi images and PL
bitstream on the Versal Gen2 platform. The FPGA driver is enabled
to load the bitstream in PDI format on the AMD Versal Gen2 device.
PDI is the new programmable device image format for Versal Gen2,
and the bitstream for the Versal Gen2 platform is generated exclusively
in this format.
With the enhanced SMC format in TF-A ensuring transparent payload
forwarding for Versal Gen2, the u-boot driver must now handle the
word swapping of PDI address that was previously done in TF-A for
this API. The source code for the Versal2 loadpdi command and the
CONFIG_CMD_VERSAL2 configuration has been removed. It now utilizes
the fpga load <dev> <address> <length> command to load secure &
non-secure pdi images.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250327105200.1262615-3-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add support for loading the secure & non-secure pdi images and
PL bitstream on the Versal NET platform. The FPGA driver is enabled
to load the bitstream in PDI format on the AMD Versal NET device.
PDI is the new programmable device image format for Versal NET,
and the bitstream for the Versal NET platform is generated exclusively
in this format.
The source code for the versalnet loadpdi command and the
CONFIG_CMD_VERSAL_NET configuration has been removed. It now utilizes
the fpga load <dev> <address> <length> command to load secure &
non-secure pdi images.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250327105200.1262615-2-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Introducing additional flag to check whether an FPGA driver is able to
load a particular FPGA bitstream image.
Generally, flag variable is used to enable or disable certain features,
specify additional parameters (such as error handling), or modify how
the function operates.
Hence, in this function flags is an integer that can be used to pass
configuration options to the fpga_load function. Here, it's
initialized to 0, meaning no special options are enabled, but it could
modify the flags to influence the function's behavior.
Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@altera.com>
Link: https://lore.kernel.org/r/20250314021953.18379-3-muhammad.hazim.izzat.zamri@altera.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Enabling the capability to automatically perform FPGA configuration
when booting Linux FIT image via bootm command. The FPGA
configuration bitstream shall be packed within the FIT image.
The FPGA data (full or partial) is checked by the SDM hardware,
for Intel SDM Mailbox based devices. Hence always return full
bitstream.
Second function is to enable the HPS to FPGA bridges when FPGA load
is completed successfully. This is to ensure the FPGA is accessible
by the HPS.
Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@altera.com>
Link: https://lore.kernel.org/r/20250314021953.18379-2-muhammad.hazim.izzat.zamri@altera.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER()
macro to declare a `buf' variable pointer into an array allocated on the
stack. It then calls the memset() function to clear the useable portion
of the array using the idiomatic expression `sizeof(buf)'.
While this would indeed work fine for an array, in the present case we
end up clearing only the size of a pointer.
Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead.
Fixes: b86f43de0b ("xilinx: zynqmp: Add support for runtime dfu_alt_info setup")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250407170529.893307-6-vincent.stehle@arm.com
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER()
macro to declare a `buf' variable pointer into an array allocated on the
stack. It then calls the memset() function to clear the useable portion
of the array using the idiomatic expression `sizeof(buf)'.
While this would indeed work fine for an array, in the present case we
end up clearing only the size of a pointer.
Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead.
Fixes: c67fecd212 ("ARM: zynq: Enable capsule update for qspi and mmc")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250407170529.893307-5-vincent.stehle@arm.com
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER()
macro to declare a `buf' variable pointer into an array allocated on the
stack. It then calls the memset() function to clear the useable portion
of the array using the idiomatic expression `sizeof(buf)'.
While this would indeed work fine for an array, in the present case we
end up clearing only the size of a pointer.
Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead.
Fixes: 064c8978b4 ("arm64: versal: Enable capsule update (SD)")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250407170529.893307-4-vincent.stehle@arm.com
Added extended support for retrieving the PMC muti boot mode
register via the firmware interface, which is preferred when
U-Boot runs in EL2 and cannot directly access PMC registers
via raw reads. Ideally, all secure registers should be accessed
via xilinx_pm_request(). Introduced the secure
zynqmp_pm_get_pmc_multi_boot_reg() call, which uses
xilinx_pm_request() to read the PMC multi boot mode register.
BootROM increments the MultiBoot register (PMC_MULTI_BOOT) read
address offset by 32 KB and retries. For SD and eMMC boot modes,
it can search up to 8191 FAT files for the identification string.
A 13-bit mask (0x1FFF) is applied to PMC_MULTI_BOOT_MASK to obtain
the correct values in BootROM.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250305134845.3182193-1-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Added extended support for retrieving the boot mode register
via the firmware interface, which is preferred when U-Boot
runs in EL2 and cannot directly access CRP registers via raw
reads. Ideally, all secure registers should be accessed via
xilinx_pm_request(). Introduced the secure zynqmp_pm_get_bootmode_reg()
call, which uses xilinx_pm_request() to read the boot mode register.
When CONFIG_ZYNQMP_FIRMWARE is enabled, the secure
zynqmp_pm_get_bootmode_reg() call is used; otherwise,
direct raw reads are performed in the case of mini U-Boot.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250219115301.3661036-1-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Turn anonymous enum TCM_LOCK/TCM_SPLIT into enum tcm_mode {}, set
TCM_LOCK as 0 and TCM_SPLIT as 1 to match LOCK and SPLIT macros in
mach-zynqmp/mp.c, and unify all the functions and their parameters
on this one single enum tcm_mode {} instead of a mix of bool and u8.
No functional change intended.
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Love Kumar <love.kumar@amd.com>
Link: https://lore.kernel.org/r/20250206213039.42756-1-marex@denx.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
A small fix for the cr50 which is a TPM but doesn't support all
the TPM functionality. Since it deviates from our normal TIS compliant
TPMs it can't be started twice since running the selftests twice hangs.
When FIT image with multiple dtbs are involved for R5 boot process,
R5 SPL starts off with the first instance of dtb to probe the
eeprom, then once we have identified the type of board, invocation
of setup_multi_dtb_fit will replace the gd->fdt_blob with the proper
board dtb match. However, when we do this, two things happen:
a) Prior to the invocation of setup_multi_dtb_fit, as part of the eeprom
discovery process, i2c controller device is already probed and marked
as exclusive with the match of the very first tisci match (from the
original boot dtb). This list is stored in the info->dev_list of the
first probe.
b) When the second dtb is loaded, tisci is probed again (since this is a
new node) and the new info->dev_list is empty.
At this stage, the exclusive devices such as i2c instances used to
probe the board information is left in the old info->dev_list that is
no longer used actively by the system using the replaced dtb.
As a result of this, the cleanup we intend to do with
ti_sci_cmd_release_exclusive_devices is no longer complete and
leaves the instances such as i2c for eeprom marked used as we scan just
the new info->dev_list.
This creates a problem when Device Manager(DM) firmware starts up later
on in the boot process and identifies that this instance of i2c is
already marked active, so it assumes this can no longer be controlled
by software and is marked internally as reserved and HLOS can no
longer control these instances. This defeated the purpose of
ti_sci_cmd_release_exclusive_devices.
NOTE: This scheme works just fine if the FIT has just a single dtb as
the info->dev_list is upto date.
To fix this, let us make ti_sci_cmd_release_exclusive_devices scan the
all registrations of tisci instances and cleanup all exclusive devices
that have ever been registered.
As part of this, change the prototype of release_exclusive_devices to
drop the handle since that has no further meaning now.
Though this issue was identified on AM64-sk, this can be present in
other builds which use multi-fit-dtb for R5 SPL startup.
Fixes: 9566b777ae ("firmware: ti_sci: Add a command for releasing all exclusive devices")
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
iomux_match_device() returns -ENOENT instead of the end index, which means
console_stop() is never called at the moment for unused consoles.
This prevents e.g. f_acm from releasing the USB gadget interface when
removing it from stdio/stderr/stdin.
Fixes: b672c1619b ("IOMUX: Split out iomux_match_device() helper")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
The tpm_auto_start() function is used in tests and assumes that it can
open the TPM even if it is already open and a locality claimed. The cr50
driver does not use the common TPM2 TIS code so lacks a check for the
is_open field of struct tpm_chip and in fact it doesn't use that struct.
Add an equivalent check to cr50_i2c_open().
This fixes all init sequences on that TPM -- e.g 'tpm init && tpm init'
or 'tpm autostart && tpm init' used to hang
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Jerome Forissier <jerome.forissier@linaro.org> says:
This series replaces the dynamic initcalls (with function pointers) with
static calls, and gets rid of initcall_run_list(), init_sequence_f,
init_sequence_f_r and init_sequence_r. This makes the code simpler and the
binary slighlty smaller: -2281 bytes/-0.21 % with LTO enabled and -510
bytes/-0.05 % with LTO disabled (xilinx_zynqmp_kria_defconfig).
Execution time doesn't seem to change noticeably. There is no impact on
the SPL.
The inline assembly fixes, although they look unrelated, are triggered
on some platforms with LTO enabled. For example: kirkwood_defconfig.
CI: https://source.denx.de/u-boot/custodians/u-boot-net/-/pipelines/25514
Link: https://lore.kernel.org/r/20250404135038.2134570-1-jerome.forissier@linaro.org
Change board_init_f(), board_init_f_r() and board_init_r() to make
static calls instead of iterating over the init_sequence_f,
init_sequence_f_r and init_sequence_r arrays, respectively. This makes
the code a simpler (and even more so when initcall_run_list() is
later removed) and it reduces the binary size as well. Tested with
xilinx_zynqmp_kria_defconfig; bloat-o-meter results:
- With LTO
add/remove: 106/196 grow/shrink: 10/28 up/down: 31548/-33829 (-2281)
Total: Before=1070471, After=1068190, chg -0.21%
- Without LTO
add/remove: 0/54 grow/shrink: 3/0 up/down: 2322/-2832 (-510)
Total: Before=1121723, After=1121213, chg -0.05%
Execution time does not change in a noticeable way.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
The mcr and msr instructions are available in Thumb mode only if
Thumb2 is supported. Therefore, if __thumb2__ is not set, make
sure we switch to ARM mode by inserting a .arm directive in the
inline assembly.
Fixes LTO link errors with kirkwood platforms, triggered by a later
commit:
tools/buildman/buildman -o /tmp/build -eP sheevaplug
[...]
{standard input}:24085: Error: selected processor does not support `mrc p15,0,r3,c1,c0,0' in Thumb mode
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tom reports that generating the ESL file we need for authenticated
capsule updates fails to work on azure which expects a RO git tree.
Move it to $(objtree)
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
UART-A can be exposed through uSD, this was tested on Transformer T20
but should work on all Ventana-based boards.
TX is exported on SDD pingroup corresponding to uSD CLK pin
RX is exported on SDB which is CMD pin in uSD slot
Signed-off-by: Artur Kowalski <arturkow2000@gmail.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The Tegra Note 7 is a mini tablet computer and the second Tegra 4
based mobile device designed by Nvidia that runs the Android operating
system. The Tegra Note has a 7" IPS display with 1280 x 800 (217 ppi)
resolution. The 1 GB of RAM and 16 GB of internal memory can be
supplemented with a microSDXC card giving up to 64 GB of additional
storage.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The ASUS Transformer Pad TF701T is an Android tablet computer made by
ASUS, successor to the ASUS Transformer Pad Infinity. The tablet includes
a Tegra 4 T114 processor clocked at 1.9 GHz, and an upgraded 2560×1600
pixel resolution screen, increasing the pixel density to 300 PPI and
a mobile dock. Transformers (t114) board derives from Nvidia Macallan
development board.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The clock initialization routine sets the DISP* clock parent to PLLC,
resulting in DC failure in the case when PLLD was previously configured.
This issue disrupts chainloading and to prevent failures caused by DISP*
clock parent conflicts, clock initialization should not modify DISP*. The
DC driver handles DISP* configuration.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Most device headers contain SoC specific part and common Tegra post part.
Add a generic header which can be used by any Tegra device of one of the
supported SoC generations (T20, T30, T114, T124 or T210) without need in
device specific configuration.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Link CFG_SYS_NS16550_COM1 value to chosen CONFIG_TEGRA_ENABLE_UART Tegra
wide. Remove all CFG_SYS_NS16550_COM1 from device headers.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Applies same logic to general Tegra pincontrol driver as is done to Tegra20
by commit:
a35bf832d7 ("pinctrl: tegra20: detect unknown/invalid pin/func
configurations")
Suggested-by: Artur Kowalski <arturkow2000@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Tegra20 driver doesn't know about some pin configurations and even about
some pins. In case when pin configuration is unknown the pin would be
muxed to whatever is under function 0, in case when pin itself is
unknown, it could cause out-of-bounds array access in pinmux_set_func
and pinmux_set_pullupdown.
Signed-off-by: Artur Kowalski <arturkow2000@gmail.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The Motorola Atrix 4G (MB860) and Droid X2 (MB870) both featured a
dual-core NVIDIA Tegra 2 AP20H processor clocked at 1GHz, coupled with 1GB
of DDR2 RAM. Storage consisted of 16GB of internal flash memory, expandable
via microSD. The display was a 4.0-inch TFT LCD with a resolution of
960x540 pixels (qHD). The devices originally ran on Android up to 2.3
(Gingerbread).
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The LM3532 is a 500-kHz fixed frequency asynchronous boost converter which
provides the power for 3 high-voltage, low-side current sinks. The device
is programmable over an I2C-compatible interface and has independent
current control for all three channels.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Add support for the LCD panel module used in Motorola Atrix 4G or Droid X2.
Exact panel vendor and model are unknown. The panel has a 540x960 (qHD)
resolution and uses 24 bit RGB per pixel.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
CPCAP has a dedicated interrupt for power button. Implement this to have
more input control over the devices.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
