Commit Graph

15 Commits

Author SHA1 Message Date
Michal Simek
87bd5806e6 xilinx: mbv: Use separate DTB for binman nodes
The commit d92fdb6067 ("binman: Add option for pointing to separate
description") added support for separating binman description to own file
not the be the part of DT for OS.
The main reason is that binman is not passing dt schema validation that's
why want to keep it separated.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 14:32:00 +08:00
Martin Herren
4da366de5d riscv: Set SYS_BOOTM_LEN explicitly to 0x800000
For all riscv defconfigs that use the current default value.

This is done in provision of changing the default value to the most
common used value of 0x4000000.

Signed-off-by: Martin Herren <sputnik@on-the-web.ch>
Acked-by: Michal Simek <michal.simek@amd.com> # xilinx_mbv
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 14:32:00 +08:00
Sam Protsenko
70a4d1fa1d treewide: Remove empty board_init() function from all boards
Commit 86acdce2ba ("common: add config for board_init() call")
introduced CONFIG_BOARD_INIT option. This option can be disabled for the
boards where board_init() function is not needed. Remove empty
board_init() calls for all boards where it's possible, and disable
CONFIG_BOARD_INIT in all related defconfigs.

This cleanup was made semi-automatically using these scripts: [1].

No functional change, but the binary size for the modified boards is
reduced a bit.

[1] https://github.com/joe-skb7/uboot-convert-scripts/tree/master/remove-board-init

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm_beacon
Tested-by: Bryan Brattlof <bb@ti.com>
Acked-by: Peng Fan <peng.fan@nxp.com>  #NXP boards
2025-07-24 13:30:19 -06:00
Tom Rini
dbf7fd557a Merge patch series "Consistent Kconfig environment options CONFIG_ENV_ prefix"
Marek Vasut <marek.vasut+renesas@mailbox.org> says:

Rename the environment related variables and add ENV_ prefix, so that
all configuration options which are related to environment would have
an CONFIG_ENV_ prefix. No functional change.

Link: https://lore.kernel.org/r/20250609192701.20260-1-marek.vasut+renesas@mailbox.org
2025-06-20 12:57:47 -06:00
Marek Vasut
123682c765 env: Rename SYS_RELOC_GD_ENV_ADDR to ENV_RELOC_GD_ENV_ADDR
Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-06-20 12:15:08 -06:00
Heinrich Schuchardt
8b410cab51 configs: raise SPL_SYS_MALLOC_SIZE to 8 MiB on RISC-V
On several RISC-V boards we have seen that 1 MiB is a insufficient value
for CONFIG_SPL_SYS_MALLOC_SIZE.

For instance qemu-riscv32_spl_defconfig fails booting because u-boot.itb
exceeds 1 MiB.

8 MiB is a reasonable value that allows adding FPGA blobs or splash images
to main U-boot.

Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-06-09 10:43:57 +08:00
Simon Glass
d6a53f523a spl: Add an SPL_HAVE_INIT_STACK option
At present there is a hex value SPL_STACK which both determines whether
SPL has its own initial stack and the hex value of that stack.

Split off the former into SPL_HAVE_INIT_STACK with SPL_STACK depending
on that and only providing the latter.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Resync defconfig files]
2025-03-13 10:36:09 -06:00
Michal Simek
9d688e6da5 riscv: mbv: Align DT with QEMU
Align U-Boot with QEMU amd-microblaze-v-virt platform to be able to wire
it with CI.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Padmarao Begari <padmarao.begari@amd.com>
2024-10-29 18:11:49 +08:00
Tom Rini
d892702080 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-08 09:28:10 -06:00
Tom Rini
18e791c404 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-04-22 17:40:37 -06:00
Michal Simek
451b2ea211 riscv: mbv: Enable SPL and binman
Enable SPL and binman to generate u-boot.img (machine mode) and u-boot.itb
(supervisor mode). DTB is placed at fixed address to ensure that it is 8
byte aligned which is not ensured when dtb is attached behind SPL binary
that's why SPL and U-Boot are taking DTB from the same address.
Also align addresses for both defconfigs.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/85506bce5580d448f095f267d029e3932c5e9990.1707911544.git.michal.simek@amd.com
2024-03-01 08:41:39 +01:00
Michal Simek
eb950dcbf8 riscv: mbv: Switch to OF_SEPARATE with fixed address
Hardcode DTB address to specific address.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a5ad3c8d21be311254dd950e4e322d13cacdc176.1707911544.git.michal.simek@amd.com
2024-03-01 08:41:38 +01:00
Michal Simek
466368e848 riscv: mbv: Enable REMAKE_ELF by default
Create also u-boot.elf out of u-boot ELF. It is better to align it with
other Xilinx SOC where u-boot.elf also exists and tools like bootgen works
only with files with .elf extension.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/50bc5a360c37accd0eee1eecfd291b145a29acd0.1707911544.git.michal.simek@amd.com
2024-03-01 08:41:38 +01:00
Michal Simek
8ef750872e riscv: mbv: Align addresses with default DT
Better to align everything with memory map described in DT to avoid
mistakes. Execute both modes form the same address to make address map more
understandable.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/be54c668d5626ccd702507a86c2a95d1eaefc690.1707911544.git.michal.simek@amd.com
2024-03-01 08:41:38 +01:00
Michal Simek
7576ab2fac riscv: Add support for AMD/Xilinx MicroBlaze V
MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP.
It is hardware compatible with classic MicroBlaze processor.

The patch contains initial wiring and configuration for initial HW design
with memory, cpu, interrupt controller, timers and uartlite console
(interrupt controller is listed but U-Boot is not using it).

Provided DT is just describing one configuration and should be taken only
as example.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
2023-12-18 11:08:49 +08:00