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Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next

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This commit is contained in:
Tom Rini
2025-03-11 19:05:03 -06:00
parent 38880f39e2 4226433858
commit 8540eba3e0
11 changed files with 294 additions and 291 deletions
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74
board/gdsys/a38x/ihs_phys.c
View File

@@ -123,9 +123,9 @@ struct gpio_mii {
{ 2, {}, {}, 46, 24, 1 },
};
static int mii_mdio_init(struct bb_miiphy_bus *bus)
static int mii_mdio_init(const int k)
{
struct gpio_mii *gpio_mii = bus->priv;
struct gpio_mii *gpio_mii = &gpio_mii_set[k];
char name[32] = {};
struct udevice *gpio_dev1 = NULL;
struct udevice *gpio_dev2 = NULL;
@@ -164,27 +164,27 @@ static int mii_mdio_init(struct bb_miiphy_bus *bus)
return 0;
}
static int mii_mdio_active(struct bb_miiphy_bus *bus)
static int mii_mdio_active(struct mii_dev *miidev)
{
struct gpio_mii *gpio_mii = bus->priv;
struct gpio_mii *gpio_mii = miidev->priv;
dm_gpio_set_value(&gpio_mii->mdc_gpio, gpio_mii->mdio_value);
return 0;
}
static int mii_mdio_tristate(struct bb_miiphy_bus *bus)
static int mii_mdio_tristate(struct mii_dev *miidev)
{
struct gpio_mii *gpio_mii = bus->priv;
struct gpio_mii *gpio_mii = miidev->priv;
dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_IN);
return 0;
}
static int mii_set_mdio(struct bb_miiphy_bus *bus, int v)
static int mii_set_mdio(struct mii_dev *miidev, int v)
{
struct gpio_mii *gpio_mii = bus->priv;
struct gpio_mii *gpio_mii = miidev->priv;
dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_OUT);
dm_gpio_set_value(&gpio_mii->mdio_gpio, v);
@@ -193,9 +193,9 @@ static int mii_set_mdio(struct bb_miiphy_bus *bus, int v)
return 0;
}
static int mii_get_mdio(struct bb_miiphy_bus *bus, int *v)
static int mii_get_mdio(struct mii_dev *miidev, int *v)
{
struct gpio_mii *gpio_mii = bus->priv;
struct gpio_mii *gpio_mii = miidev->priv;
dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_IN);
*v = (dm_gpio_get_value(&gpio_mii->mdio_gpio));
@@ -203,51 +203,61 @@ static int mii_get_mdio(struct bb_miiphy_bus *bus, int *v)
return 0;
}
static int mii_set_mdc(struct bb_miiphy_bus *bus, int v)
static int mii_set_mdc(struct mii_dev *miidev, int v)
{
struct gpio_mii *gpio_mii = bus->priv;
struct gpio_mii *gpio_mii = miidev->priv;
dm_gpio_set_value(&gpio_mii->mdc_gpio, v);
return 0;
}
static int mii_delay(struct bb_miiphy_bus *bus)
static int mii_delay(struct mii_dev *miidev)
{
udelay(1);
return 0;
}
static const struct bb_miiphy_bus_ops mii_bb_miiphy_bus_ops = {
.mdio_active = mii_mdio_active,
.mdio_tristate = mii_mdio_tristate,
.set_mdio = mii_set_mdio,
.get_mdio = mii_get_mdio,
.set_mdc = mii_set_mdc,
.delay = mii_delay,
};
static int mii_bb_miiphy_read(struct mii_dev *miidev, int addr,
int devad, int reg)
{
return bb_miiphy_read(miidev, &mii_bb_miiphy_bus_ops,
addr, devad, reg);
}
static int mii_bb_miiphy_write(struct mii_dev *miidev, int addr,
int devad, int reg, u16 value)
{
return bb_miiphy_write(miidev, &mii_bb_miiphy_bus_ops,
addr, devad, reg, value);
}
int register_miiphy_bus(uint k, struct mii_dev **bus)
{
struct bb_miiphy_bus *bb_miiphy = bb_miiphy_alloc();
struct mii_dev *mdiodev;
struct mii_dev *mdiodev = mdio_alloc();
int retval;
if (!bb_miiphy)
return -ENOMEM;
mdiodev = &bb_miiphy->mii;
snprintf(mdiodev->name, MDIO_NAME_LEN, "ihs%d", k);
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
/* Copy the bus accessors and private data */
bb_miiphy->mdio_active = mii_mdio_active;
bb_miiphy->mdio_tristate = mii_mdio_tristate;
bb_miiphy->set_mdio = mii_set_mdio;
bb_miiphy->get_mdio = mii_get_mdio;
bb_miiphy->set_mdc = mii_set_mdc;
bb_miiphy->delay = mii_delay;
bb_miiphy->priv = &gpio_mii_set[k];
mdiodev->read = mii_bb_miiphy_read;
mdiodev->write = mii_bb_miiphy_write;
mdiodev->priv = &gpio_mii_set[k];
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
*bus = &bb_miiphy->mii;
*bus = mdiodev;
return mii_mdio_init(bb_miiphy);
return mii_mdio_init(k);
}
struct porttype *get_porttype(uint octo_phy_mask, uint k)

13
common/miiphyutil.c
View File

@@ -55,14 +55,6 @@ struct mii_dev *miiphy_get_dev_by_name(const char *devname)
return NULL;
}
void mdio_init(struct mii_dev *bus)
{
memset(bus, 0, sizeof(*bus));
/* initialize mii_dev struct fields */
INIT_LIST_HEAD(&bus->link);
}
struct mii_dev *mdio_alloc(void)
{
struct mii_dev *bus;
@@ -71,7 +63,10 @@ struct mii_dev *mdio_alloc(void)
if (!bus)
return bus;
mdio_init(bus);
memset(bus, 0, sizeof(*bus));
/* initialize mii_dev struct fields */
INIT_LIST_HEAD(&bus->link);
return bus;
}

8
configs/rcar3_salvator-x_defconfig
View File

@@ -28,6 +28,8 @@ CONFIG_CMD_DFU=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_DM_USB_GADGET=y
CONFIG_OF_LIST="renesas/r8a77951-salvator-x renesas/r8a77960-salvator-x renesas/r8a77965-salvator-x"
CONFIG_MULTI_DTB_FIT_LZO=y
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
@@ -74,4 +76,10 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Renesas"
CONFIG_USB_GADGET_VENDOR_NUM=0x045b
CONFIG_USB_GADGET_PRODUCT_NUM=0x023c
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_RENESAS_USBHS=y
CONFIG_USB_STORAGE=y

17
drivers/clk/renesas/rzg2l-cpg.c
View File

@@ -70,17 +70,12 @@ static int rzg2l_cpg_clk_set(struct clk *clk, bool enable)
dev_dbg(clk->dev, "%s %s clock %u\n", enable ? "enable" : "disable",
is_mod_clk(clk->id) ? "module" : "core", cpg_clk_id);
if (!is_mod_clk(clk->id)) {
/*
* Non-module clocks are always on. Ignore attempts to enable
* them and reject attempts to disable them.
*/
if (enable)
return 0;
dev_err(clk->dev, "ID %lu is not a module clock\n", clk->id);
return -EINVAL;
}
/*
* Non-module clocks are always on. Ignore attempts to enable or disable
* them.
*/
if (!is_mod_clk(clk->id))
return 0;
for (i = 0; i < data->info->num_mod_clks; i++) {
if (data->info->mod_clks[i].id == cpg_clk_id) {

1
drivers/net/Kconfig
View File

@@ -852,6 +852,7 @@ config RENESAS_ETHER_SWITCH
config RENESAS_RAVB
bool "Renesas Ethernet AVB MAC"
depends on RCAR_64
select BITBANGMII
select PHYLIB
select PHY_ETHERNET_ID
help

77
drivers/net/designware.c
View File

@@ -227,9 +227,9 @@ static int dw_dm_mdio_init(const char *name, void *priv)
#endif
#if IS_ENABLED(CONFIG_BITBANGMII) && IS_ENABLED(CONFIG_DM_GPIO)
static int dw_eth_bb_mdio_active(struct bb_miiphy_bus *bus)
static int dw_eth_bb_mdio_active(struct mii_dev *miidev)
{
struct dw_eth_dev *priv = bus->priv;
struct dw_eth_dev *priv = miidev->priv;
struct gpio_desc *desc = &priv->mdio_gpio;
desc->flags = 0;
@@ -238,9 +238,9 @@ static int dw_eth_bb_mdio_active(struct bb_miiphy_bus *bus)
return 0;
}
static int dw_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus)
static int dw_eth_bb_mdio_tristate(struct mii_dev *miidev)
{
struct dw_eth_dev *priv = bus->priv;
struct dw_eth_dev *priv = miidev->priv;
struct gpio_desc *desc = &priv->mdio_gpio;
desc->flags = 0;
@@ -249,9 +249,9 @@ static int dw_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus)
return 0;
}
static int dw_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
static int dw_eth_bb_set_mdio(struct mii_dev *miidev, int v)
{
struct dw_eth_dev *priv = bus->priv;
struct dw_eth_dev *priv = miidev->priv;
if (v)
dm_gpio_set_value(&priv->mdio_gpio, 1);
@@ -261,18 +261,18 @@ static int dw_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
return 0;
}
static int dw_eth_bb_get_mdio(struct bb_miiphy_bus *bus, int *v)
static int dw_eth_bb_get_mdio(struct mii_dev *miidev, int *v)
{
struct dw_eth_dev *priv = bus->priv;
struct dw_eth_dev *priv = miidev->priv;
*v = dm_gpio_get_value(&priv->mdio_gpio);
return 0;
}
static int dw_eth_bb_set_mdc(struct bb_miiphy_bus *bus, int v)
static int dw_eth_bb_set_mdc(struct mii_dev *miidev, int v)
{
struct dw_eth_dev *priv = bus->priv;
struct dw_eth_dev *priv = miidev->priv;
if (v)
dm_gpio_set_value(&priv->mdc_gpio, 1);
@@ -282,28 +282,48 @@ static int dw_eth_bb_set_mdc(struct bb_miiphy_bus *bus, int v)
return 0;
}
static int dw_eth_bb_delay(struct bb_miiphy_bus *bus)
static int dw_eth_bb_delay(struct mii_dev *miidev)
{
struct dw_eth_dev *priv = bus->priv;
struct dw_eth_dev *priv = miidev->priv;
udelay(priv->bb_delay);
return 0;
}
static const struct bb_miiphy_bus_ops dw_eth_bb_miiphy_bus_ops = {
.mdio_active = dw_eth_bb_mdio_active,
.mdio_tristate = dw_eth_bb_mdio_tristate,
.set_mdio = dw_eth_bb_set_mdio,
.get_mdio = dw_eth_bb_get_mdio,
.set_mdc = dw_eth_bb_set_mdc,
.delay = dw_eth_bb_delay,
};
static int dw_bb_miiphy_read(struct mii_dev *miidev, int addr,
int devad, int reg)
{
return bb_miiphy_read(miidev, &dw_eth_bb_miiphy_bus_ops,
addr, devad, reg);
}
static int dw_bb_miiphy_write(struct mii_dev *miidev, int addr,
int devad, int reg, u16 value)
{
return bb_miiphy_write(miidev, &dw_eth_bb_miiphy_bus_ops,
addr, devad, reg, value);
}
static int dw_bb_mdio_init(const char *name, struct udevice *dev)
{
struct dw_eth_dev *dwpriv = dev_get_priv(dev);
struct bb_miiphy_bus *bb_miiphy = bb_miiphy_alloc();
struct mii_dev *bus;
struct mii_dev *bus = mdio_alloc();
int ret;
if (!bb_miiphy) {
if (!bus) {
printf("Failed to allocate MDIO bus\n");
return -ENOMEM;
}
bus = &bb_miiphy->mii;
debug("\n%s: use bitbang mii..\n", dev->name);
ret = gpio_request_by_name(dev, "snps,mdc-gpio", 0,
&dwpriv->mdc_gpio,
@@ -325,21 +345,13 @@ static int dw_bb_mdio_init(const char *name, struct udevice *dev)
dwpriv->dev = dev;
snprintf(bus->name, sizeof(bus->name), "%s", name);
bus->read = bb_miiphy_read;
bus->write = bb_miiphy_write;
bus->read = dw_bb_miiphy_read;
bus->write = dw_bb_miiphy_write;
#if CONFIG_IS_ENABLED(DM_GPIO)
bus->reset = dw_mdio_reset;
#endif
bus->priv = dwpriv;
/* Copy the bus accessors and private data */
bb_miiphy->mdio_active = dw_eth_bb_mdio_active;
bb_miiphy->mdio_tristate = dw_eth_bb_mdio_tristate;
bb_miiphy->set_mdio = dw_eth_bb_set_mdio;
bb_miiphy->get_mdio = dw_eth_bb_get_mdio;
bb_miiphy->set_mdc = dw_eth_bb_set_mdc;
bb_miiphy->delay = dw_eth_bb_delay;
return mdio_register(bus);
}
#endif
@@ -840,7 +852,6 @@ int designware_eth_probe(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
struct dw_eth_dev *priv = dev_get_priv(dev);
bool __maybe_unused bbmiiphy = false;
phys_addr_t iobase = pdata->iobase;
void *ioaddr;
int ret, err;
@@ -932,8 +943,7 @@ int designware_eth_probe(struct udevice *dev)
priv->max_speed = pdata->max_speed;
#if IS_ENABLED(CONFIG_BITBANGMII) && IS_ENABLED(CONFIG_DM_GPIO)
bbmiiphy = dev_read_bool(dev, "snps,bitbang-mii");
if (bbmiiphy) {
if (dev_read_bool(dev, "snps,bitbang-mii")) {
ret = dw_bb_mdio_init(dev->name, dev);
if (ret) {
err = ret;
@@ -963,12 +973,7 @@ int designware_eth_probe(struct udevice *dev)
/* continue here for cleanup if no PHY found */
err = ret;
mdio_unregister(priv->bus);
#if IS_ENABLED(CONFIG_BITBANGMII) && IS_ENABLED(CONFIG_DM_GPIO)
if (bbmiiphy)
bb_miiphy_free(container_of(priv->bus, struct bb_miiphy_bus, mii));
else
#endif
mdio_free(priv->bus);
mdio_free(priv->bus);
mdio_err:
#ifdef CONFIG_CLK

216
drivers/net/phy/miiphybb.c
View File

@@ -14,40 +14,16 @@
#include <ioports.h>
#include <ppc_asm.tmpl>
#include <malloc.h>
#include <miiphy.h>
#include <asm/global_data.h>
static inline struct bb_miiphy_bus *bb_miiphy_getbus(struct mii_dev *miidev)
{
return container_of(miidev, struct bb_miiphy_bus, mii);
}
struct bb_miiphy_bus *bb_miiphy_alloc(void)
{
struct bb_miiphy_bus *bus;
bus = malloc(sizeof(*bus));
if (!bus)
return bus;
mdio_init(&bus->mii);
return bus;
}
void bb_miiphy_free(struct bb_miiphy_bus *bus)
{
free(bus);
}
/*****************************************************************************
*
* Utility to send the preamble, address, and register (common to read
* and write).
*/
static void miiphy_pre(struct bb_miiphy_bus *bus, char read,
unsigned char addr, unsigned char reg)
static void miiphy_pre(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops,
char read, unsigned char addr, unsigned char reg)
{
int j;
@@ -59,62 +35,62 @@ static void miiphy_pre(struct bb_miiphy_bus *bus, char read,
* but it is safer and will be much more robust.
*/
bus->mdio_active(bus);
bus->set_mdio(bus, 1);
ops->mdio_active(miidev);
ops->set_mdio(miidev, 1);
for (j = 0; j < 32; j++) {
bus->set_mdc(bus, 0);
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
ops->set_mdc(miidev, 0);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
}
/* send the start bit (01) and the read opcode (10) or write (10) */
bus->set_mdc(bus, 0);
bus->set_mdio(bus, 0);
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
bus->set_mdc(bus, 0);
bus->set_mdio(bus, 1);
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
bus->set_mdc(bus, 0);
bus->set_mdio(bus, read);
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
bus->set_mdc(bus, 0);
bus->set_mdio(bus, !read);
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
ops->set_mdc(miidev, 0);
ops->set_mdio(miidev, 0);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
ops->set_mdc(miidev, 0);
ops->set_mdio(miidev, 1);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
ops->set_mdc(miidev, 0);
ops->set_mdio(miidev, read);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
ops->set_mdc(miidev, 0);
ops->set_mdio(miidev, !read);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
/* send the PHY address */
for (j = 0; j < 5; j++) {
bus->set_mdc(bus, 0);
ops->set_mdc(miidev, 0);
if ((addr & 0x10) == 0) {
bus->set_mdio(bus, 0);
ops->set_mdio(miidev, 0);
} else {
bus->set_mdio(bus, 1);
ops->set_mdio(miidev, 1);
}
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
addr <<= 1;
}
/* send the register address */
for (j = 0; j < 5; j++) {
bus->set_mdc(bus, 0);
ops->set_mdc(miidev, 0);
if ((reg & 0x10) == 0) {
bus->set_mdio(bus, 0);
ops->set_mdio(miidev, 0);
} else {
bus->set_mdio(bus, 1);
ops->set_mdio(miidev, 1);
}
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
reg <<= 1;
}
}
@@ -126,62 +102,57 @@ static void miiphy_pre(struct bb_miiphy_bus *bus, char read,
* Returns:
* 0 on success
*/
int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg)
int bb_miiphy_read(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops,
int addr, int devad, int reg)
{
unsigned short rdreg; /* register working value */
int v;
int j; /* counter */
struct bb_miiphy_bus *bus;
bus = bb_miiphy_getbus(miidev);
if (bus == NULL) {
return -1;
}
miiphy_pre (bus, 1, addr, reg);
miiphy_pre(miidev, ops, 1, addr, reg);
/* tri-state our MDIO I/O pin so we can read */
bus->set_mdc(bus, 0);
bus->mdio_tristate(bus);
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
ops->set_mdc(miidev, 0);
ops->mdio_tristate(miidev);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
/* check the turnaround bit: the PHY should be driving it to zero */
bus->get_mdio(bus, &v);
ops->get_mdio(miidev, &v);
if (v != 0) {
/* puts ("PHY didn't drive TA low\n"); */
for (j = 0; j < 32; j++) {
bus->set_mdc(bus, 0);
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
ops->set_mdc(miidev, 0);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
}
/* There is no PHY, return */
return -1;
}
bus->set_mdc(bus, 0);
bus->delay(bus);
ops->set_mdc(miidev, 0);
ops->delay(miidev);
/* read 16 bits of register data, MSB first */
rdreg = 0;
for (j = 0; j < 16; j++) {
bus->set_mdc(bus, 1);
bus->delay(bus);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
rdreg <<= 1;
bus->get_mdio(bus, &v);
ops->get_mdio(miidev, &v);
rdreg |= (v & 0x1);
bus->set_mdc(bus, 0);
bus->delay(bus);
ops->set_mdc(miidev, 0);
ops->delay(miidev);
}
bus->set_mdc(bus, 1);
bus->delay(bus);
bus->set_mdc(bus, 0);
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
ops->set_mdc(miidev, 0);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
debug("%s[%s](0x%x) @ 0x%x = 0x%04x\n", __func__, miidev->name, reg, addr, rdreg);
@@ -195,54 +166,47 @@ int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg)
* Returns:
* 0 on success
*/
int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg,
u16 value)
int bb_miiphy_write(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops,
int addr, int devad, int reg, u16 value)
{
struct bb_miiphy_bus *bus;
int j; /* counter */
bus = bb_miiphy_getbus(miidev);
if (bus == NULL) {
/* Bus not found! */
return -1;
}
miiphy_pre (bus, 0, addr, reg);
miiphy_pre(miidev, ops, 0, addr, reg);
/* send the turnaround (10) */
bus->set_mdc(bus, 0);
bus->set_mdio(bus, 1);
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
bus->set_mdc(bus, 0);
bus->set_mdio(bus, 0);
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
ops->set_mdc(miidev, 0);
ops->set_mdio(miidev, 1);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
ops->set_mdc(miidev, 0);
ops->set_mdio(miidev, 0);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
/* write 16 bits of register data, MSB first */
for (j = 0; j < 16; j++) {
bus->set_mdc(bus, 0);
ops->set_mdc(miidev, 0);
if ((value & 0x00008000) == 0) {
bus->set_mdio(bus, 0);
ops->set_mdio(miidev, 0);
} else {
bus->set_mdio(bus, 1);
ops->set_mdio(miidev, 1);
}
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
value <<= 1;
}
/*
* Tri-state the MDIO line.
*/
bus->mdio_tristate(bus);
bus->set_mdc(bus, 0);
bus->delay(bus);
bus->set_mdc(bus, 1);
bus->delay(bus);
ops->mdio_tristate(miidev);
ops->set_mdc(miidev, 0);
ops->delay(miidev);
ops->set_mdc(miidev, 1);
ops->delay(miidev);
return 0;
}

81
drivers/net/ravb.c
View File

@@ -354,8 +354,15 @@ static int ravb_mac_init(struct ravb_priv *eth)
/* Disable MAC Interrupt */
writel(0, eth->iobase + RAVB_REG_ECSIPR);
/* Recv frame limit set register */
writel(RFLR_RFL_MIN, eth->iobase + RAVB_REG_RFLR);
/*
* Set receive frame length
*
* The length set here describes the frame from the destination address
* up to and including the CRC data. However only the frame data,
* excluding the CRC, are transferred to memory. To allow for the
* largest frames add the CRC length to the maximum Rx descriptor size.
*/
writel(RFLR_RFL_MIN + ETH_FCS_LEN, eth->iobase + RAVB_REG_RFLR);
return 0;
}
@@ -491,27 +498,27 @@ static void ravb_stop(struct udevice *dev)
}
/* Bitbang MDIO access */
static int ravb_bb_mdio_active(struct bb_miiphy_bus *bus)
static int ravb_bb_mdio_active(struct mii_dev *miidev)
{
struct ravb_priv *eth = bus->priv;
struct ravb_priv *eth = miidev->priv;
setbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MMD);
return 0;
}
static int ravb_bb_mdio_tristate(struct bb_miiphy_bus *bus)
static int ravb_bb_mdio_tristate(struct mii_dev *miidev)
{
struct ravb_priv *eth = bus->priv;
struct ravb_priv *eth = miidev->priv;
clrbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MMD);
return 0;
}
static int ravb_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
static int ravb_bb_set_mdio(struct mii_dev *miidev, int v)
{
struct ravb_priv *eth = bus->priv;
struct ravb_priv *eth = miidev->priv;
if (v)
setbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MDO);
@@ -521,18 +528,18 @@ static int ravb_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
return 0;
}
static int ravb_bb_get_mdio(struct bb_miiphy_bus *bus, int *v)
static int ravb_bb_get_mdio(struct mii_dev *miidev, int *v)
{
struct ravb_priv *eth = bus->priv;
struct ravb_priv *eth = miidev->priv;
*v = (readl(eth->iobase + RAVB_REG_PIR) & PIR_MDI) >> 3;
return 0;
}
static int ravb_bb_set_mdc(struct bb_miiphy_bus *bus, int v)
static int ravb_bb_set_mdc(struct mii_dev *miidev, int v)
{
struct ravb_priv *eth = bus->priv;
struct ravb_priv *eth = miidev->priv;
if (v)
setbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MDC);
@@ -542,18 +549,40 @@ static int ravb_bb_set_mdc(struct bb_miiphy_bus *bus, int v)
return 0;
}
static int ravb_bb_delay(struct bb_miiphy_bus *bus)
static int ravb_bb_delay(struct mii_dev *miidev)
{
udelay(10);
return 0;
}
static const struct bb_miiphy_bus_ops ravb_bb_miiphy_bus_ops = {
.mdio_active = ravb_bb_mdio_active,
.mdio_tristate = ravb_bb_mdio_tristate,
.set_mdio = ravb_bb_set_mdio,
.get_mdio = ravb_bb_get_mdio,
.set_mdc = ravb_bb_set_mdc,
.delay = ravb_bb_delay,
};
static int ravb_bb_miiphy_read(struct mii_dev *miidev, int addr,
int devad, int reg)
{
return bb_miiphy_read(miidev, &ravb_bb_miiphy_bus_ops,
addr, devad, reg);
}
static int ravb_bb_miiphy_write(struct mii_dev *miidev, int addr,
int devad, int reg, u16 value)
{
return bb_miiphy_write(miidev, &ravb_bb_miiphy_bus_ops,
addr, devad, reg, value);
}
static int ravb_probe(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
struct ravb_priv *eth = dev_get_priv(dev);
struct bb_miiphy_bus *bb_miiphy;
struct mii_dev *mdiodev;
void __iomem *iobase;
int ret;
@@ -565,32 +594,22 @@ static int ravb_probe(struct udevice *dev)
if (ret < 0)
goto err_mdio_alloc;
bb_miiphy = bb_miiphy_alloc();
if (!bb_miiphy) {
mdiodev = mdio_alloc();
if (!mdiodev) {
ret = -ENOMEM;
goto err_mdio_alloc;
}
mdiodev = &bb_miiphy->mii;
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
mdiodev->read = ravb_bb_miiphy_read;
mdiodev->write = ravb_bb_miiphy_write;
mdiodev->priv = eth;
snprintf(mdiodev->name, sizeof(mdiodev->name), dev->name);
/* Copy the bus accessors and private data */
bb_miiphy->mdio_active = ravb_bb_mdio_active;
bb_miiphy->mdio_tristate = ravb_bb_mdio_tristate;
bb_miiphy->set_mdio = ravb_bb_set_mdio;
bb_miiphy->get_mdio = ravb_bb_get_mdio;
bb_miiphy->set_mdc = ravb_bb_set_mdc;
bb_miiphy->delay = ravb_bb_delay;
bb_miiphy->priv = eth;
ret = mdio_register(mdiodev);
if (ret < 0)
goto err_mdio_register;
eth->bus = &bb_miiphy->mii;
eth->bus = mdiodev;
/* Bring up PHY */
ret = clk_enable_bulk(&eth->clks);
@@ -610,7 +629,7 @@ static int ravb_probe(struct udevice *dev)
err_mdio_reset:
clk_release_bulk(&eth->clks);
err_mdio_register:
bb_miiphy_free(bb_miiphy);
mdio_free(mdiodev);
err_mdio_alloc:
unmap_physmem(eth->iobase, MAP_NOCACHE);
return ret;

70
drivers/net/sh_eth.c
View File

@@ -644,9 +644,9 @@ static void sh_ether_stop(struct udevice *dev)
}
/******* for bb_miiphy *******/
static int sh_eth_bb_mdio_active(struct bb_miiphy_bus *bus)
static int sh_eth_bb_mdio_active(struct mii_dev *miidev)
{
struct sh_eth_dev *eth = bus->priv;
struct sh_eth_dev *eth = miidev->priv;
struct sh_eth_info *port_info = &eth->port_info[eth->port];
sh_eth_write(port_info, sh_eth_read(port_info, PIR) | PIR_MMD, PIR);
@@ -654,9 +654,9 @@ static int sh_eth_bb_mdio_active(struct bb_miiphy_bus *bus)
return 0;
}
static int sh_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus)
static int sh_eth_bb_mdio_tristate(struct mii_dev *miidev)
{
struct sh_eth_dev *eth = bus->priv;
struct sh_eth_dev *eth = miidev->priv;
struct sh_eth_info *port_info = &eth->port_info[eth->port];
sh_eth_write(port_info, sh_eth_read(port_info, PIR) & ~PIR_MMD, PIR);
@@ -664,9 +664,9 @@ static int sh_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus)
return 0;
}
static int sh_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
static int sh_eth_bb_set_mdio(struct mii_dev *miidev, int v)
{
struct sh_eth_dev *eth = bus->priv;
struct sh_eth_dev *eth = miidev->priv;
struct sh_eth_info *port_info = &eth->port_info[eth->port];
if (v)
@@ -679,9 +679,9 @@ static int sh_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
return 0;
}
static int sh_eth_bb_get_mdio(struct bb_miiphy_bus *bus, int *v)
static int sh_eth_bb_get_mdio(struct mii_dev *miidev, int *v)
{
struct sh_eth_dev *eth = bus->priv;
struct sh_eth_dev *eth = miidev->priv;
struct sh_eth_info *port_info = &eth->port_info[eth->port];
*v = (sh_eth_read(port_info, PIR) & PIR_MDI) >> 3;
@@ -689,9 +689,9 @@ static int sh_eth_bb_get_mdio(struct bb_miiphy_bus *bus, int *v)
return 0;
}
static int sh_eth_bb_set_mdc(struct bb_miiphy_bus *bus, int v)
static int sh_eth_bb_set_mdc(struct mii_dev *miidev, int v)
{
struct sh_eth_dev *eth = bus->priv;
struct sh_eth_dev *eth = miidev->priv;
struct sh_eth_info *port_info = &eth->port_info[eth->port];
if (v)
@@ -704,19 +704,41 @@ static int sh_eth_bb_set_mdc(struct bb_miiphy_bus *bus, int v)
return 0;
}
static int sh_eth_bb_delay(struct bb_miiphy_bus *bus)
static int sh_eth_bb_delay(struct mii_dev *miidev)
{
udelay(10);
return 0;
}
static const struct bb_miiphy_bus_ops sh_ether_bb_miiphy_bus_ops = {
.mdio_active = sh_eth_bb_mdio_active,
.mdio_tristate = sh_eth_bb_mdio_tristate,
.set_mdio = sh_eth_bb_set_mdio,
.get_mdio = sh_eth_bb_get_mdio,
.set_mdc = sh_eth_bb_set_mdc,
.delay = sh_eth_bb_delay,
};
static int sh_eth_bb_miiphy_read(struct mii_dev *miidev, int addr,
int devad, int reg)
{
return bb_miiphy_read(miidev, &sh_ether_bb_miiphy_bus_ops,
addr, devad, reg);
}
static int sh_eth_bb_miiphy_write(struct mii_dev *miidev, int addr,
int devad, int reg, u16 value)
{
return bb_miiphy_write(miidev, &sh_ether_bb_miiphy_bus_ops,
addr, devad, reg, value);
}
static int sh_ether_probe(struct udevice *udev)
{
struct eth_pdata *pdata = dev_get_plat(udev);
struct sh_ether_priv *priv = dev_get_priv(udev);
struct sh_eth_dev *eth = &priv->shdev;
struct bb_miiphy_bus *bb_miiphy;
struct mii_dev *mdiodev;
int ret;
@@ -727,32 +749,22 @@ static int sh_ether_probe(struct udevice *udev)
if (ret < 0)
return ret;
#endif
bb_miiphy = bb_miiphy_alloc();
if (!bb_miiphy) {
mdiodev = mdio_alloc();
if (!mdiodev) {
ret = -ENOMEM;
return ret;
}
mdiodev = &bb_miiphy->mii;
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
mdiodev->read = sh_eth_bb_miiphy_read;
mdiodev->write = sh_eth_bb_miiphy_write;
mdiodev->priv = eth;
snprintf(mdiodev->name, sizeof(mdiodev->name), udev->name);
/* Copy the bus accessors and private data */
bb_miiphy->mdio_active = sh_eth_bb_mdio_active;
bb_miiphy->mdio_tristate = sh_eth_bb_mdio_tristate;
bb_miiphy->set_mdio = sh_eth_bb_set_mdio;
bb_miiphy->get_mdio = sh_eth_bb_get_mdio;
bb_miiphy->set_mdc = sh_eth_bb_set_mdc;
bb_miiphy->delay = sh_eth_bb_delay;
bb_miiphy->priv = eth;
ret = mdio_register(mdiodev);
if (ret < 0)
goto err_mdio_register;
priv->bus = &bb_miiphy->mii;
priv->bus = mdiodev;
eth->port = CFG_SH_ETHER_USE_PORT;
eth->port_info[eth->port].phy_addr = CFG_SH_ETHER_PHY_ADDR;
@@ -782,7 +794,7 @@ err_phy_config:
clk_disable(&priv->clk);
#endif
err_mdio_register:
bb_miiphy_free(bb_miiphy);
mdio_free(mdiodev);
return ret;
}

1
drivers/pinctrl/Makefile
View File

@@ -15,7 +15,6 @@ obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
obj-$(CONFIG_ARCH_NPCM) += nuvoton/
obj-$(CONFIG_PINCTRL_QCOM) += qcom/
obj-$(CONFIG_ARCH_RENESAS) += renesas/
obj-$(CONFIG_ARCH_RZN1) += renesas/
obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
obj-$(CONFIG_PINCTRL_SUNXI) += sunxi/
obj-$(CONFIG_$(XPL_)PINCTRL_TEGRA) += tegra/

27
include/miiphy.h
View File

@@ -42,7 +42,6 @@ struct phy_device *mdio_phydev_for_ethname(const char *devname);
void miiphy_listdev(void);
void mdio_init(struct mii_dev *bus);
struct mii_dev *mdio_alloc(void);
void mdio_free(struct mii_dev *bus);
int mdio_register(struct mii_dev *bus);
@@ -62,23 +61,19 @@ void mdio_list_devices(void);
#define BB_MII_DEVNAME "bb_miiphy"
struct bb_miiphy_bus {
int (*mdio_active)(struct bb_miiphy_bus *bus);
int (*mdio_tristate)(struct bb_miiphy_bus *bus);
int (*set_mdio)(struct bb_miiphy_bus *bus, int v);
int (*get_mdio)(struct bb_miiphy_bus *bus, int *v);
int (*set_mdc)(struct bb_miiphy_bus *bus, int v);
int (*delay)(struct bb_miiphy_bus *bus);
void *priv;
struct mii_dev mii;
struct bb_miiphy_bus_ops {
int (*mdio_active)(struct mii_dev *miidev);
int (*mdio_tristate)(struct mii_dev *miidev);
int (*set_mdio)(struct mii_dev *miidev, int v);
int (*get_mdio)(struct mii_dev *miidev, int *v);
int (*set_mdc)(struct mii_dev *miidev, int v);
int (*delay)(struct mii_dev *miidev);
};
struct bb_miiphy_bus *bb_miiphy_alloc(void);
void bb_miiphy_free(struct bb_miiphy_bus *bus);
int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg);
int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg,
u16 value);
int bb_miiphy_read(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops,
int addr, int devad, int reg);
int bb_miiphy_write(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops,
int addr, int devad, int reg, u16 value);
#endif
/* phy seed setup */