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spi: atmel-quadspi: Port collected fixes from Linux v5.10 and v5.15

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Port changes from a 4 piece patch series from Linux kernel v5.10, merged
with v5.10-rc1-83-gc732b7567d869 ("Merge series "spi: atmel-quadspi: Fix
AHB memory accesses" from Tudor Ambarus …").

Port the single fix v5.15-rc1-14-g09134c5322df9 ("spi: Fixed division by
zero warning").

Reduces differences between linux and u-boot driver.

Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
Cc: Yoshitaka Ikeda <ikeda@nskint.co.jp>
Signed-off-by: Alexander Dahl <ada@thorsis.com>
This commit is contained in:
Alexander Dahl
2025-01-23 13:12:10 +01:00
committed by Eugen Hristev
parent d3ded566db
commit 6a9e8d6d21
1 changed files with 14 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

27
drivers/spi/atmel-quadspi.c
View File

@@ -474,7 +474,7 @@ static int atmel_qspi_set_cfg(struct atmel_qspi *aq,
return mode;
ifr |= atmel_qspi_modes[mode].config;
if (op->dummy.buswidth && op->dummy.nbytes)
if (op->dummy.nbytes)
dummy_cycles = op->dummy.nbytes * 8 / op->dummy.buswidth;
/*
@@ -529,10 +529,14 @@ static int atmel_qspi_set_cfg(struct atmel_qspi *aq,
if (dummy_cycles)
ifr |= QSPI_IFR_NBDUM(dummy_cycles);
/* Set data enable */
if (op->data.nbytes)
/* Set data enable and data transfer type. */
if (op->data.nbytes) {
ifr |= QSPI_IFR_DATAEN;
if (op->addr.nbytes)
ifr |= QSPI_IFR_TFRTYP_MEM;
}
/*
* If the QSPI controller is set in regular SPI mode, set it in
* Serial Memory Mode (SMM).
@@ -545,27 +549,24 @@ static int atmel_qspi_set_cfg(struct atmel_qspi *aq,
/* Clear pending interrupts */
(void)atmel_qspi_read(aq, QSPI_SR);
if (aq->caps->has_ricr) {
if (!op->addr.nbytes && op->data.dir == SPI_MEM_DATA_IN)
ifr |= QSPI_IFR_APBTFRTYP_READ;
/* Set QSPI Instruction Frame registers */
/* Set QSPI Instruction Frame registers. */
if (op->addr.nbytes && !op->data.nbytes)
atmel_qspi_write(iar, aq, QSPI_IAR);
if (aq->caps->has_ricr) {
if (op->data.dir == SPI_MEM_DATA_IN)
atmel_qspi_write(icr, aq, QSPI_RICR);
else
atmel_qspi_write(icr, aq, QSPI_WICR);
atmel_qspi_write(ifr, aq, QSPI_IFR);
} else {
if (op->data.dir == SPI_MEM_DATA_OUT)
if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_OUT)
ifr |= QSPI_IFR_SAMA5D2_WRITE_TRSFR;
/* Set QSPI Instruction Frame registers */
atmel_qspi_write(iar, aq, QSPI_IAR);
atmel_qspi_write(icr, aq, QSPI_ICR);
atmel_qspi_write(ifr, aq, QSPI_IFR);
}
atmel_qspi_write(ifr, aq, QSPI_IFR);
return 0;
}