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arm: socfpga:agilex5: Fix system manager watchdog mode setting

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This commit is to fix the system manager watchdog mode setting to support
until mode_4 for Agilex5. This changes can refer to system manager register
map on wddbg fields.

In Agilex7 it is not detected as an issue because Agilex7 only have 4 watchdog
until mode_3 and it is already been set correctly for it to halt on any CPU in
debug mode. However, in Agilex5 this fix is needed in order to enable the watchdog
pause feature for mode_4 when entering debug mode. If 0xF is not been set on mode_4,
the Watchdog Timers will not halt on any CPU. As by default value, the pause signal
does not assert when any CPU is in debug mode and the watchdog continue to count.

Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
This commit is contained in:
Muhammad Hazim Izzat Zamri
2025-01-13 10:08:07 +08:00
committed by Tien Fong Chee
parent 2eed5a1ff3
commit 5a77a0b039
1 changed files with 1 additions and 1 deletions
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2
arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
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@@ -145,7 +145,7 @@ void populate_sysmgr_pinmux(void);
#define SYSMGR_DMAPERIPH_ALL_NS 0xFFFFFFFF
#define SYSMGR_WDDBG_PAUSE_ALL_CPU 0x0F0F0F0F
#define SYSMGR_WDDBG_PAUSE_ALL_CPU 0xFF0F0F0F
#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)
#define SYSMGR_SOC64_DDR_MODE_MSK BIT(0)