Merge tag 'sound-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "Lots of code development have been see in ASoC side as usual, while
  the continued development on memalloc helper and USB-audio low-
  latency support are found in the rest.

  Note that a few changes in the unusual places like arch/sh are
  included, which are a part of ASoC DAI format cleanups.

  ALSA core:

   - Continued memalloc helper updates and cleanups, now supporting
     non-coherent and non-contiguous pages

   - Fixes for races in mixer OSS layer

  ASoC:

   - A new version of the audio graph card which supports a wider range
     of systems

   - Several conversions to YAML DT bindings

   - Continuing cleanups to the SOF and Intel code

   - Move of the Cirrus DSP framework into drivers/firmware to allow for
     future use by non-audio DSPs

   - An overhaul of the cs42l42 driver, correcting many problems

   - DAI format terminology conversions over many drivers for cleanups

   - Support for AMD Vangogh and Yelow Cap, Cirrus CS35L41, Maxim
     MAX98520 and MAX98360A, Mediatek MT8195, Nuvoton NAU8821, nVidia
     Tegra210, NXP i.MX8ULP, Qualcomm AudioReach, Realtek ALC5682I-VS,
     RT5682S, and RT9120 and Rockchip RV1126 and RK3568

  USB-audio:

   - Continued improvements on low-latency playback

   - Quirks for Pioneer devices, Line6 HX-Stomp XL, Audient iD14

  HD-audio:

   - Reduce excessive udelay() calls on Intel platforms; this should
     reduce the CPU load with PulseAudio

   - Quirks for HP and Clevo laptops

  FireWire:

   - Support for meter information on MOTU"

* tag 'sound-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (513 commits)
  ALSA: usb-audio: Add quirk for Audient iD14
  ALSA: hda/realtek: Add quirk for Clevo PC70HS
  ALSA: usb-audio: Line6 HX-Stomp XL USB_ID for 48k-fixed quirk
  ALSA: usb-audio: Add registration quirk for JBL Quantum 400
  ASoC: rsnd: Fix an error handling path in 'rsnd_node_count()'
  ASoC: tlv320aic3x: Make aic3x_remove() return void
  ASoC: Intel: soc-acpi: use const for all uses of snd_soc_acpi_codecs
  ASoC: Intel: soc-acpi-cht: shrink tables using compatible IDs
  ASoC: Intel: soc-acpi-byt: shrink tables using compatible IDs
  ASoC: Intel: sof_rt5682: use comp_ids to enumerate rt5682s
  ASoC: Intel: sof_rt5682: detect codec variant in probe function
  ASoC: soc-acpi: add comp_ids field for machine driver matching
  ASoC: mediatek: mt8195: add mt8195-mt6359-rt1011-rt5682 bindings document
  ASoC: mediatek: mt8195: add machine driver with mt6359, rt1011 and rt5682
  ASoC: Stop dummy from overriding hwparams
  ASoC: topology: Change topology device to card device
  ASoC: topology: Use correct device for prints
  ASoC: topology: Check for dapm widget completeness
  ASoC: topology: Add header payload_size verification
  ASoC: core: Remove invalid snd_soc_component_set_jack call
  ...
This commit is contained in:
Linus Torvalds
2021-11-03 07:49:25 -07:00
477 changed files with 48256 additions and 8003 deletions
+1 -1
View File
@@ -1002,7 +1002,7 @@ typedef int __bitwise snd_ctl_elem_iface_t;
#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */
// (1 << 3) is unused.
/* (1 << 3) is unused. */
#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4) /* TLV read is possible */
#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5) /* TLV write is possible */
#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
+150
View File
@@ -13,6 +13,7 @@
#define SNDRV_FIREWIRE_EVENT_DIGI00X_MESSAGE 0x746e736c
#define SNDRV_FIREWIRE_EVENT_MOTU_NOTIFICATION 0x64776479
#define SNDRV_FIREWIRE_EVENT_TASCAM_CONTROL 0x7473636d
#define SNDRV_FIREWIRE_EVENT_MOTU_REGISTER_DSP_CHANGE 0x4d545244
struct snd_firewire_event_common {
unsigned int type; /* SNDRV_FIREWIRE_EVENT_xxx */
@@ -65,6 +66,12 @@ struct snd_firewire_event_tascam_control {
struct snd_firewire_tascam_change changes[0];
};
struct snd_firewire_event_motu_register_dsp_change {
unsigned int type;
__u32 count; /* The number of changes. */
__u32 changes[]; /* Encoded event for change of register DSP. */
};
union snd_firewire_event {
struct snd_firewire_event_common common;
struct snd_firewire_event_lock_status lock_status;
@@ -73,6 +80,7 @@ union snd_firewire_event {
struct snd_firewire_event_digi00x_message digi00x_message;
struct snd_firewire_event_tascam_control tascam_control;
struct snd_firewire_event_motu_notification motu_notification;
struct snd_firewire_event_motu_register_dsp_change motu_register_dsp_change;
};
@@ -80,6 +88,9 @@ union snd_firewire_event {
#define SNDRV_FIREWIRE_IOCTL_LOCK _IO('H', 0xf9)
#define SNDRV_FIREWIRE_IOCTL_UNLOCK _IO('H', 0xfa)
#define SNDRV_FIREWIRE_IOCTL_TASCAM_STATE _IOR('H', 0xfb, struct snd_firewire_tascam_state)
#define SNDRV_FIREWIRE_IOCTL_MOTU_REGISTER_DSP_METER _IOR('H', 0xfc, struct snd_firewire_motu_register_dsp_meter)
#define SNDRV_FIREWIRE_IOCTL_MOTU_COMMAND_DSP_METER _IOR('H', 0xfd, struct snd_firewire_motu_command_dsp_meter)
#define SNDRV_FIREWIRE_IOCTL_MOTU_REGISTER_DSP_PARAMETER _IOR('H', 0xfe, struct snd_firewire_motu_register_dsp_parameter)
#define SNDRV_FIREWIRE_TYPE_DICE 1
#define SNDRV_FIREWIRE_TYPE_FIREWORKS 2
@@ -108,4 +119,143 @@ struct snd_firewire_tascam_state {
__be32 data[SNDRV_FIREWIRE_TASCAM_STATE_COUNT];
};
/*
* In below MOTU models, software is allowed to control their DSP by accessing to registers.
* - 828mk2
* - 896hd
* - Traveler
* - 8 pre
* - Ultralite
* - 4 pre
* - Audio Express
*
* On the other hand, the status of DSP is split into specific messages included in the sequence of
* isochronous packet. ALSA firewire-motu driver gathers the messages and allow userspace applications
* to read it via ioctl. In 828mk2, 896hd, and Traveler, hardware meter for all of physical inputs
* are put into the message, while one pair of physical outputs is selected. The selection is done by
* LSB one byte in asynchronous write quadlet transaction to 0x'ffff'f000'0b2c.
*
* I note that V3HD/V4HD uses asynchronous transaction for the purpose. The destination address is
* registered to 0x'ffff'f000'0b38 and '0b3c by asynchronous write quadlet request. The size of
* message differs between 23 and 51 quadlets. For the case, the number of mixer bus can be extended
* up to 12.
*/
#define SNDRV_FIREWIRE_MOTU_REGISTER_DSP_METER_INPUT_COUNT 24
#define SNDRV_FIREWIRE_MOTU_REGISTER_DSP_METER_OUTPUT_COUNT 24
#define SNDRV_FIREWIRE_MOTU_REGISTER_DSP_METER_COUNT \
(SNDRV_FIREWIRE_MOTU_REGISTER_DSP_METER_INPUT_COUNT + SNDRV_FIREWIRE_MOTU_REGISTER_DSP_METER_OUTPUT_COUNT)
/**
* struct snd_firewire_motu_register_dsp_meter - the container for meter information in DSP
* controlled by register access
* @data: Signal level meters. The mapping between position and input/output channel is
* model-dependent.
*
* The structure expresses the part of DSP status for hardware meter. The u8 storage includes linear
* value for audio signal level between 0x00 and 0x7f.
*/
struct snd_firewire_motu_register_dsp_meter {
__u8 data[SNDRV_FIREWIRE_MOTU_REGISTER_DSP_METER_COUNT];
};
#define SNDRV_FIREWIRE_MOTU_REGISTER_DSP_MIXER_COUNT 4
#define SNDRV_FIREWIRE_MOTU_REGISTER_DSP_MIXER_SRC_COUNT 20
#define SNDRV_FIREWIRE_MOTU_REGISTER_DSP_INPUT_COUNT 10
#define SNDRV_FIREWIRE_MOTU_REGISTER_DSP_ALIGNED_INPUT_COUNT (SNDRV_FIREWIRE_MOTU_REGISTER_DSP_INPUT_COUNT + 2)
/**
* snd_firewire_motu_register_dsp_parameter - the container for parameters of DSP controlled
* by register access.
* @mixer.source.gain: The gain of source to mixer.
* @mixer.source.pan: The L/R balance of source to mixer.
* @mixer.source.flag: The flag of source to mixer, including mute, solo.
* @mixer.source.paired_balance: The L/R balance of paired source to mixer, only for 4 pre and
* Audio Express.
* @mixer.source.paired_width: The width of paired source to mixer, only for 4 pre and
* Audio Express.
* @mixer.output.paired_volume: The volume of paired output from mixer.
* @mixer.output.paired_flag: The flag of paired output from mixer.
* @output.main_paired_volume: The volume of paired main output.
* @output.hp_paired_volume: The volume of paired hp output.
* @output.hp_paired_assignment: The source assigned to paired hp output.
* @output.reserved: Padding for 32 bit alignment for future extension.
* @line_input.boost_flag: The flags of boost for line inputs, only for 828mk2 and Traveler.
* @line_input.nominal_level_flag: The flags of nominal level for line inputs, only for 828mk2 and
* Traveler.
* @line_input.reserved: Padding for 32 bit alignment for future extension.
* @input.gain_and_invert: The value including gain and invert for input, only for Ultralite, 4 pre
* and Audio Express.
* @input.flag: The flag of input; e.g. jack detection, phantom power, and pad, only for Ultralite,
* 4 pre and Audio express.
* @reserved: Padding so that the size of structure is kept to 512 byte, but for future extension.
*
* The structure expresses the set of parameters for DSP controlled by register access.
*/
struct snd_firewire_motu_register_dsp_parameter {
struct {
struct {
__u8 gain[SNDRV_FIREWIRE_MOTU_REGISTER_DSP_MIXER_SRC_COUNT];
__u8 pan[SNDRV_FIREWIRE_MOTU_REGISTER_DSP_MIXER_SRC_COUNT];
__u8 flag[SNDRV_FIREWIRE_MOTU_REGISTER_DSP_MIXER_SRC_COUNT];
__u8 paired_balance[SNDRV_FIREWIRE_MOTU_REGISTER_DSP_MIXER_SRC_COUNT];
__u8 paired_width[SNDRV_FIREWIRE_MOTU_REGISTER_DSP_MIXER_SRC_COUNT];
} source[SNDRV_FIREWIRE_MOTU_REGISTER_DSP_MIXER_COUNT];
struct {
__u8 paired_volume[SNDRV_FIREWIRE_MOTU_REGISTER_DSP_MIXER_COUNT];
__u8 paired_flag[SNDRV_FIREWIRE_MOTU_REGISTER_DSP_MIXER_COUNT];
} output;
} mixer;
struct {
__u8 main_paired_volume;
__u8 hp_paired_volume;
__u8 hp_paired_assignment;
__u8 reserved[5];
} output;
struct {
__u8 boost_flag;
__u8 nominal_level_flag;
__u8 reserved[6];
} line_input;
struct {
__u8 gain_and_invert[SNDRV_FIREWIRE_MOTU_REGISTER_DSP_ALIGNED_INPUT_COUNT];
__u8 flag[SNDRV_FIREWIRE_MOTU_REGISTER_DSP_ALIGNED_INPUT_COUNT];
} input;
__u8 reserved[64];
};
/*
* In below MOTU models, software is allowed to control their DSP by command in frame of
* asynchronous transaction to 0x'ffff'0001'0000:
*
* - 828 mk3 (FireWire only and Hybrid)
* - 896 mk3 (FireWire only and Hybrid)
* - Ultralite mk3 (FireWire only and Hybrid)
* - Traveler mk3
* - Track 16
*
* On the other hand, the states of hardware meter is split into specific messages included in the
* sequence of isochronous packet. ALSA firewire-motu driver gathers the message and allow userspace
* application to read it via ioctl.
*/
#define SNDRV_FIREWIRE_MOTU_COMMAND_DSP_METER_COUNT 400
/**
* struct snd_firewire_motu_command_dsp_meter - the container for meter information in DSP
* controlled by command
* @data: Signal level meters. The mapping between position and signal channel is model-dependent.
*
* The structure expresses the part of DSP status for hardware meter. The 32 bit storage is
* estimated to include IEEE 764 32 bit single precision floating point (binary32) value. It is
* expected to be linear value (not logarithm) for audio signal level between 0.0 and +1.0.
*/
struct snd_firewire_motu_command_dsp_meter {
#ifdef __KERNEL__
__u32 data[SNDRV_FIREWIRE_MOTU_COMMAND_DSP_METER_COUNT];
#else
float data[SNDRV_FIREWIRE_MOTU_COMMAND_DSP_METER_COUNT];
#endif
};
#endif /* _UAPI_SOUND_FIREWIRE_H_INCLUDED */
+208
View File
@@ -0,0 +1,208 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef __SND_AR_TOKENS_H__
#define __SND_AR_TOKENS_H__
#define APM_SUB_GRAPH_PERF_MODE_LOW_POWER 0x1
#define APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY 0x2
#define APM_SUB_GRAPH_DIRECTION_TX 0x1
#define APM_SUB_GRAPH_DIRECTION_RX 0x2
/** Scenario ID Audio Playback */
#define APM_SUB_GRAPH_SID_AUDIO_PLAYBACK 0x1
/* Scenario ID Audio Record */
#define APM_SUB_GRAPH_SID_AUDIO_RECORD 0x2
/* Scenario ID Voice call. */
#define APM_SUB_GRAPH_SID_VOICE_CALL 0x3
/* container capability ID Pre/Post Processing (PP) */
#define APM_CONTAINER_CAP_ID_PP 0x1
/* container capability ID Compression/Decompression (CD) */
#define APM_CONTAINER_CAP_ID_CD 0x2
/* container capability ID End Point(EP) */
#define APM_CONTAINER_CAP_ID_EP 0x3
/* container capability ID Offload (OLC) */
#define APM_CONTAINER_CAP_ID_OLC 0x4
/* container graph position Stream */
#define APM_CONT_GRAPH_POS_STREAM 0x1
/* container graph position Per Stream Per Device*/
#define APM_CONT_GRAPH_POS_PER_STR_PER_DEV 0x2
/* container graph position Stream-Device */
#define APM_CONT_GRAPH_POS_STR_DEV 0x3
/* container graph position Global Device */
#define APM_CONT_GRAPH_POS_GLOBAL_DEV 0x4
#define APM_PROC_DOMAIN_ID_MDSP 0x1
#define APM_PROC_DOMAIN_ID_ADSP 0x2
#define APM_PROC_DOMAIN_ID_SDSP 0x4
#define APM_PROC_DOMAIN_ID_CDSP 0x5
#define PCM_INTERLEAVED 1
#define PCM_DEINTERLEAVED_PACKED 2
#define PCM_DEINTERLEAVED_UNPACKED 3
#define AR_I2S_WS_SRC_EXTERNAL 0
#define AR_I2S_WS_SRC_INTERNAL 1
enum ar_event_types {
AR_EVENT_NONE = 0,
AR_PGA_DAPM_EVENT
};
/*
* Kcontrol IDs
*/
#define SND_SOC_AR_TPLG_FE_BE_GRAPH_CTL_MIX 256
#define SND_SOC_AR_TPLG_VOL_CTL 257
/**
* %AR_TKN_U32_SUB_GRAPH_INSTANCE_ID: Sub Graph Instance Id
*
* %AR_TKN_U32_SUB_GRAPH_PERF_MODE: Performance mode of subgraph
* APM_SUB_GRAPH_PERF_MODE_LOW_POWER = 1,
* APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY = 2
*
* %AR_TKN_U32_SUB_GRAPH_DIRECTION: Direction of subgraph
* APM_SUB_GRAPH_DIRECTION_TX = 1,
* APM_SUB_GRAPH_DIRECTION_RX = 2
*
* %AR_TKN_U32_SUB_GRAPH_SCENARIO_ID: Scenario ID for subgraph
* APM_SUB_GRAPH_SID_AUDIO_PLAYBACK = 1,
* APM_SUB_GRAPH_SID_AUDIO_RECORD = 2,
* APM_SUB_GRAPH_SID_VOICE_CALL = 3
*
* %AR_TKN_U32_CONTAINER_INSTANCE_ID: Container Instance ID
*
* %AR_TKN_U32_CONTAINER_CAPABILITY_ID: Container capability ID
* APM_CONTAINER_CAP_ID_PP = 1,
* APM_CONTAINER_CAP_ID_CD = 2,
* APM_CONTAINER_CAP_ID_EP = 3,
* APM_CONTAINER_CAP_ID_OLC = 4
*
* %AR_TKN_U32_CONTAINER_STACK_SIZE: Stack size in the container.
*
* %AR_TKN_U32_CONTAINER_GRAPH_POS: Graph Position
* APM_CONT_GRAPH_POS_STREAM = 1,
* APM_CONT_GRAPH_POS_PER_STR_PER_DEV = 2,
* APM_CONT_GRAPH_POS_STR_DEV = 3,
* APM_CONT_GRAPH_POS_GLOBAL_DEV = 4
*
* %AR_TKN_U32_CONTAINER_PROC_DOMAIN: Processor domain of container
* APM_PROC_DOMAIN_ID_MDSP = 1,
* APM_PROC_DOMAIN_ID_ADSP = 2,
* APM_PROC_DOMAIN_ID_SDSP = 4,
* APM_PROC_DOMAIN_ID_CDSP = 5
*
* %AR_TKN_U32_MODULE_ID: Module ID
*
* %AR_TKN_U32_MODULE_INSTANCE_ID: Module Instance ID.
*
* %AR_TKN_U32_MODULE_MAX_IP_PORTS: Module maximum input ports
*
* %AR_TKN_U32_MODULE_MAX_OP_PORTS: Module maximum output ports.
*
* %AR_TKN_U32_MODULE_IN_PORTS: Number of in ports
*
* %AR_TKN_U32_MODULE_OUT_PORTS: Number of out ports.
*
* %AR_TKN_U32_MODULE_SRC_OP_PORT_ID: Source module output port ID
*
* %AR_TKN_U32_MODULE_DST_IN_PORT_ID: Destination module input port ID
*
* %AR_TKN_U32_MODULE_HW_IF_IDX: Interface index types for I2S/LPAIF
*
* %AR_TKN_U32_MODULE_HW_IF_TYPE: Interface type
* LPAIF = 0,
* LPAIF_RXTX = 1,
* LPAIF_WSA = 2,
* LPAIF_VA = 3,
* LPAIF_AXI = 4
*
* %AR_TKN_U32_MODULE_FMT_INTERLEAVE: PCM Interleaving
* PCM_INTERLEAVED = 1,
* PCM_DEINTERLEAVED_PACKED = 2,
* PCM_DEINTERLEAVED_UNPACKED = 3
*
* %AR_TKN_U32_MODULE_FMT_DATA: data format
* FIXED POINT = 1,
* IEC60958 PACKETIZED = 3,
* IEC60958 PACKETIZED NON LINEAR = 8,
* COMPR OVER PCM PACKETIZED = 7,
* IEC61937 PACKETIZED = 2,
* GENERIC COMPRESSED = 5
*
* %AR_TKN_U32_MODULE_FMT_SAMPLE_RATE: sample rate
*
* %AR_TKN_U32_MODULE_FMT_BIT_DEPTH: bit depth
*
* %AR_TKN_U32_MODULE_SD_LINE_IDX: I2S serial data line idx
* I2S_SD0 = 1,
* I2S_SD1 = 2,
* I2S_SD2 = 3,
* I2S_SD3 = 4,
* I2S_QUAD01 = 5,
* I2S_QUAD23 = 6,
* I2S_6CHS = 7,
* I2S_8CHS = 8
*
* %AR_TKN_U32_MODULE_WS_SRC: Word Select Source
* AR_I2S_WS_SRC_EXTERNAL = 0,
* AR_I2S_WS_SRC_INTERNAL = 1,
*
* %AR_TKN_U32_MODULE_FRAME_SZ_FACTOR: Frame size factor
*
* %AR_TKN_U32_MODULE_LOG_CODE: Log Module Code
*
* %AR_TKN_U32_MODULE_LOG_TAP_POINT_ID: logging tap point of this module
*
* %AR_TKN_U32_MODULE_LOG_MODE: logging mode
* LOG_WAIT = 0,
* LOG_IMMEDIATELY = 1
*
* %AR_TKN_DAI_INDEX: dai index
*
*/
/* DAI Tokens */
#define AR_TKN_DAI_INDEX 1
/* SUB GRAPH Tokens */
#define AR_TKN_U32_SUB_GRAPH_INSTANCE_ID 2
#define AR_TKN_U32_SUB_GRAPH_PERF_MODE 3
#define AR_TKN_U32_SUB_GRAPH_DIRECTION 4
#define AR_TKN_U32_SUB_GRAPH_SCENARIO_ID 5
/* Container Tokens */
#define AR_TKN_U32_CONTAINER_INSTANCE_ID 100
#define AR_TKN_U32_CONTAINER_CAPABILITY_ID 101
#define AR_TKN_U32_CONTAINER_STACK_SIZE 102
#define AR_TKN_U32_CONTAINER_GRAPH_POS 103
#define AR_TKN_U32_CONTAINER_PROC_DOMAIN 104
/* Module Tokens */
#define AR_TKN_U32_MODULE_ID 200
#define AR_TKN_U32_MODULE_INSTANCE_ID 201
#define AR_TKN_U32_MODULE_MAX_IP_PORTS 202
#define AR_TKN_U32_MODULE_MAX_OP_PORTS 203
#define AR_TKN_U32_MODULE_IN_PORTS 204
#define AR_TKN_U32_MODULE_OUT_PORTS 205
#define AR_TKN_U32_MODULE_SRC_OP_PORT_ID 206
#define AR_TKN_U32_MODULE_DST_IN_PORT_ID 207
#define AR_TKN_U32_MODULE_SRC_INSTANCE_ID 208
#define AR_TKN_U32_MODULE_DST_INSTANCE_ID 209
#define AR_TKN_U32_MODULE_HW_IF_IDX 250
#define AR_TKN_U32_MODULE_HW_IF_TYPE 251
#define AR_TKN_U32_MODULE_FMT_INTERLEAVE 252
#define AR_TKN_U32_MODULE_FMT_DATA 253
#define AR_TKN_U32_MODULE_FMT_SAMPLE_RATE 254
#define AR_TKN_U32_MODULE_FMT_BIT_DEPTH 255
#define AR_TKN_U32_MODULE_SD_LINE_IDX 256
#define AR_TKN_U32_MODULE_WS_SRC 257
#define AR_TKN_U32_MODULE_FRAME_SZ_FACTOR 258
#define AR_TKN_U32_MODULE_LOG_CODE 259
#define AR_TKN_U32_MODULE_LOG_TAP_POINT_ID 260
#define AR_TKN_U32_MODULE_LOG_MODE 261
#endif /* __SND_AR_TOKENS_H__ */
+1
View File
@@ -51,6 +51,7 @@
#define SOF_TKN_SCHED_CORE 203
#define SOF_TKN_SCHED_FRAMES 204
#define SOF_TKN_SCHED_TIME_DOMAIN 205
#define SOF_TKN_SCHED_DYNAMIC_PIPELINE 206
/* volume */
#define SOF_TKN_VOLUME_RAMP_STEP_TYPE 250